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type abi Date: Wed, 21 Jun 2023 15:39:55 +0800 Message-Id: <20230621073955.2567-1-shiyulong@iscas.ac.cn> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-CM-TRANSID: qwCowAAHDxthqZJkUwpNAg--.6806S2 X-Coremail-Antispam: 1UD129KBjvAXoWDAw1fuFWUXFyftr18tF1UZFb_yoW7KF47Wo Z7Crs5Z3WDGw1UCFZ8Jrn5t3WIvr4IyrWDJrykK3sFgrWDXF9YvF4UtF4UCrsrtrsxJry7 XF95tr4rZrW7CF4fn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYQ7AC8VAFwI0_Gr0_Xr1l1xkIjI8I6I8E6xAIw20EY4v20xva j40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2 x7M28EF7xvwVC0I7IYx2IY67AKxVW8JVW5JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8 JVWxJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r xl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E 8cxan2IY04v7M4kE6xkIj40Ew7xC0wCY02Avz4vEOx0_GF4l42xK82IYc2Ij64vIr41l4I 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gcc/ChangeLog: * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/abi-10.c: Add float16 tuple type case. * gcc.target/riscv/rvv/base/abi-11.c: Ditto. * gcc.target/riscv/rvv/base/abi-12.c: Ditto. * gcc.target/riscv/rvv/base/abi-15.c: Ditto. * gcc.target/riscv/rvv/base/abi-8.c: Ditto. * gcc.target/riscv/rvv/base/abi-9.c: Ditto. * gcc.target/riscv/rvv/base/abi-17.c: New test. * gcc.target/riscv/rvv/base/abi-18.c: New test. --- gcc/config/riscv/vector.md | 31 ++- .../gcc.target/riscv/rvv/base/abi-10.c | 25 ++ .../gcc.target/riscv/rvv/base/abi-11.c | 27 ++- .../gcc.target/riscv/rvv/base/abi-12.c | 27 ++- .../gcc.target/riscv/rvv/base/abi-15.c | 27 ++- .../gcc.target/riscv/rvv/base/abi-17.c | 229 ++++++++++++++++++ .../gcc.target/riscv/rvv/base/abi-18.c | 229 ++++++++++++++++++ .../gcc.target/riscv/rvv/base/abi-8.c | 27 ++- .../gcc.target/riscv/rvv/base/abi-9.c | 25 ++ 9 files changed, 630 insertions(+), 17 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index 884e7435cc2..cd87989b536 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -98,7 +98,12 @@ VNx2x8HI,VNx3x8HI,VNx4x8HI,VNx5x8HI,VNx6x8HI,VNx7x8HI,VNx8x8HI,\ VNx2x4HI,VNx3x4HI,VNx4x4HI,VNx5x4HI,VNx6x4HI,VNx7x4HI,VNx8x4HI,\ VNx2x2HI,VNx3x2HI,VNx4x2HI,VNx5x2HI,VNx6x2HI,VNx7x2HI,VNx8x2HI,\ - VNx2x1HI,VNx3x1HI,VNx4x1HI,VNx5x1HI,VNx6x1HI,VNx7x1HI,VNx8x1HI") + VNx2x1HI,VNx3x1HI,VNx4x1HI,VNx5x1HI,VNx6x1HI,VNx7x1HI,VNx8x1HI,\ + VNx2x32HF,VNx2x16HF,VNx3x16HF,VNx4x16HF,\ + VNx2x8HF,VNx3x8HF,VNx4x8HF,VNx5x8HF,VNx6x8HF,VNx7x8HF,VNx8x8HF,\ + VNx2x4HF,VNx3x4HF,VNx4x4HF,VNx5x4HF,VNx6x4HF,VNx7x4HF,VNx8x4HF,\ + VNx2x2HF,VNx3x2HF,VNx4x2HF,VNx5x2HF,VNx6x2HF,VNx7x2HF,VNx8x2HF,\ + VNx2x1HF,VNx3x1HF,VNx4x1HF,VNx5x1HF,VNx6x1HF,VNx7x1HF,VNx8x1HF") (const_int 16) (eq_attr "mode" "VNx1SI,VNx2SI,VNx4SI,VNx8SI,VNx16SI,VNx32SI,\ VNx1SF,VNx2SF,VNx4SF,VNx8SF,VNx16SF,VNx32SF,\ @@ -156,17 +161,17 @@ (symbol_ref "riscv_vector::get_vlmul(E_VNx64HImode)") ; Half float point - (eq_attr "mode" "VNx1HF") + (eq_attr "mode" "VNx1HF,VNx2x1HF,VNx3x1HF,VNx4x1HF,VNx5x1HF,VNx6x1HF,VNx7x1HF,VNx8x1HF") (symbol_ref "riscv_vector::get_vlmul(E_VNx1HFmode)") - (eq_attr "mode" "VNx2HF") + (eq_attr "mode" "VNx2HF,VNx2x2HF,VNx3x2HF,VNx4x2HF,VNx5x2HF,VNx6x2HF,VNx7x2HF,VNx8x2HF") (symbol_ref "riscv_vector::get_vlmul(E_VNx2HFmode)") - (eq_attr "mode" "VNx4HF") + (eq_attr "mode" "VNx4HF,VNx2x4HF,VNx3x4HF,VNx4x4HF,VNx5x4HF,VNx6x4HF,VNx7x4HF,VNx8x4HF") (symbol_ref "riscv_vector::get_vlmul(E_VNx4HFmode)") - (eq_attr "mode" "VNx8HF") + (eq_attr "mode" "VNx8HF,VNx2x8HF,VNx3x8HF,VNx4x8HF,VNx5x8HF,VNx6x8HF,VNx7x8HF,VNx8x8HF") (symbol_ref "riscv_vector::get_vlmul(E_VNx8HFmode)") - (eq_attr "mode" "VNx16HF") + (eq_attr "mode" "VNx16HF,VNx2x16HF,VNx3x16HF,VNx4x16HF") (symbol_ref "riscv_vector::get_vlmul(E_VNx16HFmode)") - (eq_attr "mode" "VNx32HF") + (eq_attr "mode" "VNx32HF,VNx2x32HF") (symbol_ref "riscv_vector::get_vlmul(E_VNx32HFmode)") (eq_attr "mode" "VNx64HF") (symbol_ref "riscv_vector::get_vlmul(E_VNx64HFmode)") @@ -249,17 +254,17 @@ (symbol_ref "riscv_vector::get_ratio(E_VNx64HImode)") ; Half float point. - (eq_attr "mode" "VNx1HF") + (eq_attr "mode" "VNx1HF,VNx2x1HF,VNx3x1HF,VNx4x1HF,VNx5x1HF,VNx6x1HF,VNx7x1HF,VNx8x1HF") (symbol_ref "riscv_vector::get_ratio(E_VNx1HFmode)") - (eq_attr "mode" "VNx2HF") + (eq_attr "mode" "VNx2HF,VNx2x2HF,VNx3x2HF,VNx4x2HF,VNx5x2HF,VNx6x2HF,VNx7x2HF,VNx8x2HF") (symbol_ref "riscv_vector::get_ratio(E_VNx2HFmode)") - (eq_attr "mode" "VNx4HF") + (eq_attr "mode" "VNx4HF,VNx2x4HF,VNx3x4HF,VNx4x4HF,VNx5x4HF,VNx6x4HF,VNx7x4HF,VNx8x4HF") (symbol_ref "riscv_vector::get_ratio(E_VNx4HFmode)") - (eq_attr "mode" "VNx8HF") + (eq_attr "mode" "VNx8HF,VNx2x8HF,VNx3x8HF,VNx4x8HF,VNx5x8HF,VNx6x8HF,VNx7x8HF,VNx8x8HF") (symbol_ref "riscv_vector::get_ratio(E_VNx8HFmode)") - (eq_attr "mode" "VNx16HF") + (eq_attr "mode" "VNx16HF,VNx2x16HF,VNx3x16HF,VNx4x16HF") (symbol_ref "riscv_vector::get_ratio(E_VNx16HFmode)") - (eq_attr "mode" "VNx32HF") + (eq_attr "mode" "VNx32HF,VNx2x32HF") (symbol_ref "riscv_vector::get_ratio(E_VNx32HFmode)") (eq_attr "mode" "VNx64HF") (symbol_ref "riscv_vector::get_ratio(E_VNx64HFmode)") diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-10.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-10.c index 62dd7c8663c..53ee24b1710 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-10.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-10.c @@ -173,6 +173,31 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */ +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */ +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */ +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */ +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */ +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */ +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */ +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x2_t'} } */ +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x3_t'} } */ +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x4_t'} } */ +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x5_t'} } */ +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x6_t'} } */ +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x7_t'} } */ +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x8_t'} } */ +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} /* { dg-error {unknown type name '__rvv_float16m1x2_t'} } */ +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} /* { dg-error {unknown type name '__rvv_float16m1x3_t'} } */ +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} /* { dg-error {unknown type name '__rvv_float16m1x4_t'} } */ +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} /* { dg-error {unknown type name '__rvv_float16m1x5_t'} } */ +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} /* { dg-error {unknown type name '__rvv_float16m1x6_t'} } */ +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} /* { dg-error {unknown type name '__rvv_float16m1x7_t'} } */ +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} /* { dg-error {unknown type name '__rvv_float16m1x8_t'} } */ +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} /* { dg-error {unknown type name '__rvv_float16m2x2_t'} } */ +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} /* { dg-error {unknown type name '__rvv_float16m2x3_t'} } */ +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} /* { dg-error {unknown type name '__rvv_float16m2x4_t'} } */ +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} /* { dg-error {unknown type name '__rvv_float16m4x2_t'} } */ void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */ void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */ void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-11.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-11.c index a524b415880..66ce59b693e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-11.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-11.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -march=rv32gc_zve64f -mabi=ilp32d" } */ +/* { dg-options "-O3 -march=rv32gc_zve64f_zvfhmin -mabi=ilp32d" } */ void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} @@ -173,6 +173,31 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-12.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-12.c index 925aa9eccc3..d05e3cb4c53 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-12.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-12.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -march=rv32gc_zve64d -mabi=ilp32d" } */ +/* { dg-options "-O3 -march=rv32gc_zve64d_zvfhmin -mabi=ilp32d" } */ void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} @@ -173,6 +173,31 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-15.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-15.c index b52d86c6a36..c1e5b1aaf50 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-15.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-15.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -march=rv32gc_zve32f -mabi=ilp32d" } */ +/* { dg-options "-O3 -march=rv32gc_zve32f_zvfhmin -mabi=ilp32d" } */ void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x2_t'} } */ void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x2_t'} } */ @@ -173,6 +173,31 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */ void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */ void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */ +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */ +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */ +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */ +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */ +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */ +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */ +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */ +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */ void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */ void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-17.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-17.c new file mode 100644 index 00000000000..79715e9b233 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-17.c @@ -0,0 +1,229 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=rv32gc_zve32x_zvfhmin -mabi=ilp32d" } */ + +void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x2_t'} } */ +void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x2_t'} } */ +void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x3_t'} } */ +void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x3_t'} } */ +void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x4_t'} } */ +void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x4_t'} } */ +void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x5_t'} } */ +void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x5_t'} } */ +void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x6_t'} } */ +void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x6_t'} } */ +void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x7_t'} } */ +void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x7_t'} } */ +void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_int8mf8x8_t'} } */ +void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} /* { dg-error {unknown type name '__rvv_uint8mf8x8_t'} } */ +void f___rvv_int8mf4x2_t () {__rvv_int8mf4x2_t t;} +void f___rvv_uint8mf4x2_t () {__rvv_uint8mf4x2_t t;} +void f___rvv_int8mf4x3_t () {__rvv_int8mf4x3_t t;} +void f___rvv_uint8mf4x3_t () {__rvv_uint8mf4x3_t t;} +void f___rvv_int8mf4x4_t () {__rvv_int8mf4x4_t t;} +void f___rvv_uint8mf4x4_t () {__rvv_uint8mf4x4_t t;} +void f___rvv_int8mf4x5_t () {__rvv_int8mf4x5_t t;} +void f___rvv_uint8mf4x5_t () {__rvv_uint8mf4x5_t t;} +void f___rvv_int8mf4x6_t () {__rvv_int8mf4x6_t t;} +void f___rvv_uint8mf4x6_t () {__rvv_uint8mf4x6_t t;} +void f___rvv_int8mf4x7_t () {__rvv_int8mf4x7_t t;} +void f___rvv_uint8mf4x7_t () {__rvv_uint8mf4x7_t t;} +void f___rvv_int8mf4x8_t () {__rvv_int8mf4x8_t t;} +void f___rvv_uint8mf4x8_t () {__rvv_uint8mf4x8_t t;} +void f___rvv_int8mf2x2_t () {__rvv_int8mf2x2_t t;} +void f___rvv_uint8mf2x2_t () {__rvv_uint8mf2x2_t t;} +void f___rvv_int8mf2x3_t () {__rvv_int8mf2x3_t t;} +void f___rvv_uint8mf2x3_t () {__rvv_uint8mf2x3_t t;} +void f___rvv_int8mf2x4_t () {__rvv_int8mf2x4_t t;} +void f___rvv_uint8mf2x4_t () {__rvv_uint8mf2x4_t t;} +void f___rvv_int8mf2x5_t () {__rvv_int8mf2x5_t t;} +void f___rvv_uint8mf2x5_t () {__rvv_uint8mf2x5_t t;} +void f___rvv_int8mf2x6_t () {__rvv_int8mf2x6_t t;} +void f___rvv_uint8mf2x6_t () {__rvv_uint8mf2x6_t t;} +void f___rvv_int8mf2x7_t () {__rvv_int8mf2x7_t t;} +void f___rvv_uint8mf2x7_t () {__rvv_uint8mf2x7_t t;} +void f___rvv_int8mf2x8_t () {__rvv_int8mf2x8_t t;} +void f___rvv_uint8mf2x8_t () {__rvv_uint8mf2x8_t t;} +void f___rvv_int8m1x2_t () {__rvv_int8m1x2_t t;} +void f___rvv_uint8m1x2_t () {__rvv_uint8m1x2_t t;} +void f___rvv_int8m1x3_t () {__rvv_int8m1x3_t t;} +void f___rvv_uint8m1x3_t () {__rvv_uint8m1x3_t t;} +void f___rvv_int8m1x4_t () {__rvv_int8m1x4_t t;} +void f___rvv_uint8m1x4_t () {__rvv_uint8m1x4_t t;} +void f___rvv_int8m1x5_t () {__rvv_int8m1x5_t t;} +void f___rvv_uint8m1x5_t () {__rvv_uint8m1x5_t t;} +void f___rvv_int8m1x6_t () {__rvv_int8m1x6_t t;} +void f___rvv_uint8m1x6_t () {__rvv_uint8m1x6_t t;} +void f___rvv_int8m1x7_t () {__rvv_int8m1x7_t t;} +void f___rvv_uint8m1x7_t () {__rvv_uint8m1x7_t t;} +void f___rvv_int8m1x8_t () {__rvv_int8m1x8_t t;} +void f___rvv_uint8m1x8_t () {__rvv_uint8m1x8_t t;} +void f___rvv_int8m2x2_t () {__rvv_int8m2x2_t t;} +void f___rvv_uint8m2x2_t () {__rvv_uint8m2x2_t t;} +void f___rvv_int8m2x3_t () {__rvv_int8m2x3_t t;} +void f___rvv_uint8m2x3_t () {__rvv_uint8m2x3_t t;} +void f___rvv_int8m2x4_t () {__rvv_int8m2x4_t t;} +void f___rvv_uint8m2x4_t () {__rvv_uint8m2x4_t t;} +void f___rvv_int8m4x2_t () {__rvv_int8m4x2_t t;} +void f___rvv_uint8m4x2_t () {__rvv_uint8m4x2_t t;} +void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x2_t'} } */ +void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x2_t'} } */ +void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x3_t'} } */ +void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x3_t'} } */ +void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x4_t'} } */ +void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x4_t'} } */ +void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x5_t'} } */ +void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x5_t'} } */ +void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x6_t'} } */ +void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x6_t'} } */ +void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x7_t'} } */ +void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x7_t'} } */ +void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_int16mf4x8_t'} } */ +void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_uint16mf4x8_t'} } */ +void f___rvv_int16mf2x2_t () {__rvv_int16mf2x2_t t;} +void f___rvv_uint16mf2x2_t () {__rvv_uint16mf2x2_t t;} +void f___rvv_int16mf2x3_t () {__rvv_int16mf2x3_t t;} +void f___rvv_uint16mf2x3_t () {__rvv_uint16mf2x3_t t;} +void f___rvv_int16mf2x4_t () {__rvv_int16mf2x4_t t;} +void f___rvv_uint16mf2x4_t () {__rvv_uint16mf2x4_t t;} +void f___rvv_int16mf2x5_t () {__rvv_int16mf2x5_t t;} +void f___rvv_uint16mf2x5_t () {__rvv_uint16mf2x5_t t;} +void f___rvv_int16mf2x6_t () {__rvv_int16mf2x6_t t;} +void f___rvv_uint16mf2x6_t () {__rvv_uint16mf2x6_t t;} +void f___rvv_int16mf2x7_t () {__rvv_int16mf2x7_t t;} +void f___rvv_uint16mf2x7_t () {__rvv_uint16mf2x7_t t;} +void f___rvv_int16mf2x8_t () {__rvv_int16mf2x8_t t;} +void f___rvv_uint16mf2x8_t () {__rvv_uint16mf2x8_t t;} +void f___rvv_int16m1x2_t () {__rvv_int16m1x2_t t;} +void f___rvv_uint16m1x2_t () {__rvv_uint16m1x2_t t;} +void f___rvv_int16m1x3_t () {__rvv_int16m1x3_t t;} +void f___rvv_uint16m1x3_t () {__rvv_uint16m1x3_t t;} +void f___rvv_int16m1x4_t () {__rvv_int16m1x4_t t;} +void f___rvv_uint16m1x4_t () {__rvv_uint16m1x4_t t;} +void f___rvv_int16m1x5_t () {__rvv_int16m1x5_t t;} +void f___rvv_uint16m1x5_t () {__rvv_uint16m1x5_t t;} +void f___rvv_int16m1x6_t () {__rvv_int16m1x6_t t;} +void f___rvv_uint16m1x6_t () {__rvv_uint16m1x6_t t;} +void f___rvv_int16m1x7_t () {__rvv_int16m1x7_t t;} +void f___rvv_uint16m1x7_t () {__rvv_uint16m1x7_t t;} +void f___rvv_int16m1x8_t () {__rvv_int16m1x8_t t;} +void f___rvv_uint16m1x8_t () {__rvv_uint16m1x8_t t;} +void f___rvv_int16m2x2_t () {__rvv_int16m2x2_t t;} +void f___rvv_uint16m2x2_t () {__rvv_uint16m2x2_t t;} +void f___rvv_int16m2x3_t () {__rvv_int16m2x3_t t;} +void f___rvv_uint16m2x3_t () {__rvv_uint16m2x3_t t;} +void f___rvv_int16m2x4_t () {__rvv_int16m2x4_t t;} +void f___rvv_uint16m2x4_t () {__rvv_uint16m2x4_t t;} +void f___rvv_int16m4x2_t () {__rvv_int16m4x2_t t;} +void f___rvv_uint16m4x2_t () {__rvv_uint16m4x2_t t;} +void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x2_t'} } */ +void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x2_t'} } */ +void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x3_t'} } */ +void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x3_t'} } */ +void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x4_t'} } */ +void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x4_t'} } */ +void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x5_t'} } */ +void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x5_t'} } */ +void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x6_t'} } */ +void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x6_t'} } */ +void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x7_t'} } */ +void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x7_t'} } */ +void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_int32mf2x8_t'} } */ +void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_uint32mf2x8_t'} } */ +void f___rvv_int32m1x2_t () {__rvv_int32m1x2_t t;} +void f___rvv_uint32m1x2_t () {__rvv_uint32m1x2_t t;} +void f___rvv_int32m1x3_t () {__rvv_int32m1x3_t t;} +void f___rvv_uint32m1x3_t () {__rvv_uint32m1x3_t t;} +void f___rvv_int32m1x4_t () {__rvv_int32m1x4_t t;} +void f___rvv_uint32m1x4_t () {__rvv_uint32m1x4_t t;} +void f___rvv_int32m1x5_t () {__rvv_int32m1x5_t t;} +void f___rvv_uint32m1x5_t () {__rvv_uint32m1x5_t t;} +void f___rvv_int32m1x6_t () {__rvv_int32m1x6_t t;} +void f___rvv_uint32m1x6_t () {__rvv_uint32m1x6_t t;} +void f___rvv_int32m1x7_t () {__rvv_int32m1x7_t t;} +void f___rvv_uint32m1x7_t () {__rvv_uint32m1x7_t t;} +void f___rvv_int32m1x8_t () {__rvv_int32m1x8_t t;} +void f___rvv_uint32m1x8_t () {__rvv_uint32m1x8_t t;} +void f___rvv_int32m2x2_t () {__rvv_int32m2x2_t t;} +void f___rvv_uint32m2x2_t () {__rvv_uint32m2x2_t t;} +void f___rvv_int32m2x3_t () {__rvv_int32m2x3_t t;} +void f___rvv_uint32m2x3_t () {__rvv_uint32m2x3_t t;} +void f___rvv_int32m2x4_t () {__rvv_int32m2x4_t t;} +void f___rvv_uint32m2x4_t () {__rvv_uint32m2x4_t t;} +void f___rvv_int32m4x2_t () {__rvv_int32m4x2_t t;} +void f___rvv_uint32m4x2_t () {__rvv_uint32m4x2_t t;} +void f___rvv_int64m1x2_t () {__rvv_int64m1x2_t t;} /* { dg-error {unknown type name '__rvv_int64m1x2_t'} } */ +void f___rvv_uint64m1x2_t () {__rvv_uint64m1x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x2_t'} } */ +void f___rvv_int64m1x3_t () {__rvv_int64m1x3_t t;} /* { dg-error {unknown type name '__rvv_int64m1x3_t'} } */ +void f___rvv_uint64m1x3_t () {__rvv_uint64m1x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x3_t'} } */ +void f___rvv_int64m1x4_t () {__rvv_int64m1x4_t t;} /* { dg-error {unknown type name '__rvv_int64m1x4_t'} } */ +void f___rvv_uint64m1x4_t () {__rvv_uint64m1x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x4_t'} } */ +void f___rvv_int64m1x5_t () {__rvv_int64m1x5_t t;} /* { dg-error {unknown type name '__rvv_int64m1x5_t'} } */ +void f___rvv_uint64m1x5_t () {__rvv_uint64m1x5_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x5_t'} } */ +void f___rvv_int64m1x6_t () {__rvv_int64m1x6_t t;} /* { dg-error {unknown type name '__rvv_int64m1x6_t'} } */ +void f___rvv_uint64m1x6_t () {__rvv_uint64m1x6_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x6_t'} } */ +void f___rvv_int64m1x7_t () {__rvv_int64m1x7_t t;} /* { dg-error {unknown type name '__rvv_int64m1x7_t'} } */ +void f___rvv_uint64m1x7_t () {__rvv_uint64m1x7_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x7_t'} } */ +void f___rvv_int64m1x8_t () {__rvv_int64m1x8_t t;} /* { dg-error {unknown type name '__rvv_int64m1x8_t'} } */ +void f___rvv_uint64m1x8_t () {__rvv_uint64m1x8_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x8_t'} } */ +void f___rvv_int64m2x2_t () {__rvv_int64m2x2_t t;} /* { dg-error {unknown type name '__rvv_int64m2x2_t'} } */ +void f___rvv_uint64m2x2_t () {__rvv_uint64m2x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x2_t'} } */ +void f___rvv_int64m2x3_t () {__rvv_int64m2x3_t t;} /* { dg-error {unknown type name '__rvv_int64m2x3_t'} } */ +void f___rvv_uint64m2x3_t () {__rvv_uint64m2x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x3_t'} } */ +void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type name '__rvv_int64m2x4_t'} } */ +void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */ +void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */ +void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */ +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */ +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */ +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */ +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */ +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */ +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */ +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */ +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} +void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */ +void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */ +void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */ +void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x5_t'} } */ +void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x6_t'} } */ +void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x7_t'} } */ +void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x8_t'} } */ +void f___rvv_float32m1x2_t () {__rvv_float32m1x2_t t;} +void f___rvv_float32m1x3_t () {__rvv_float32m1x3_t t;} +void f___rvv_float32m1x4_t () {__rvv_float32m1x4_t t;} +void f___rvv_float32m1x5_t () {__rvv_float32m1x5_t t;} +void f___rvv_float32m1x6_t () {__rvv_float32m1x6_t t;} +void f___rvv_float32m1x7_t () {__rvv_float32m1x7_t t;} +void f___rvv_float32m1x8_t () {__rvv_float32m1x8_t t;} +void f___rvv_float32m2x2_t () {__rvv_float32m2x2_t t;} +void f___rvv_float32m2x3_t () {__rvv_float32m2x3_t t;} +void f___rvv_float32m2x4_t () {__rvv_float32m2x4_t t;} +void f___rvv_float32m4x2_t () {__rvv_float32m4x2_t t;} +void f___rvv_float64m1x2_t () {__rvv_float64m1x2_t t;} /* { dg-error {unknown type name '__rvv_float64m1x2_t'} } */ +void f___rvv_float64m1x3_t () {__rvv_float64m1x3_t t;} /* { dg-error {unknown type name '__rvv_float64m1x3_t'} } */ +void f___rvv_float64m1x4_t () {__rvv_float64m1x4_t t;} /* { dg-error {unknown type name '__rvv_float64m1x4_t'} } */ +void f___rvv_float64m1x5_t () {__rvv_float64m1x5_t t;} /* { dg-error {unknown type name '__rvv_float64m1x5_t'} } */ +void f___rvv_float64m1x6_t () {__rvv_float64m1x6_t t;} /* { dg-error {unknown type name '__rvv_float64m1x6_t'} } */ +void f___rvv_float64m1x7_t () {__rvv_float64m1x7_t t;} /* { dg-error {unknown type name '__rvv_float64m1x7_t'} } */ +void f___rvv_float64m1x8_t () {__rvv_float64m1x8_t t;} /* { dg-error {unknown type name '__rvv_float64m1x8_t'} } */ +void f___rvv_float64m2x2_t () {__rvv_float64m2x2_t t;} /* { dg-error {unknown type name '__rvv_float64m2x2_t'} } */ +void f___rvv_float64m2x3_t () {__rvv_float64m2x3_t t;} /* { dg-error {unknown type name '__rvv_float64m2x3_t'} } */ +void f___rvv_float64m2x4_t () {__rvv_float64m2x4_t t;} /* { dg-error {unknown type name '__rvv_float64m2x4_t'} } */ +void f___rvv_float64m4x2_t () {__rvv_float64m4x2_t t;} /* { dg-error {unknown type name '__rvv_float64m4x2_t'} } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c new file mode 100644 index 00000000000..402e8f6ba22 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-18.c @@ -0,0 +1,229 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=rv32gc_zve32x_zvl64b_zvfhmin -mabi=ilp32d" } */ + +void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} +void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} +void f___rvv_int8mf8x3_t () {__rvv_int8mf8x3_t t;} +void f___rvv_uint8mf8x3_t () {__rvv_uint8mf8x3_t t;} +void f___rvv_int8mf8x4_t () {__rvv_int8mf8x4_t t;} +void f___rvv_uint8mf8x4_t () {__rvv_uint8mf8x4_t t;} +void f___rvv_int8mf8x5_t () {__rvv_int8mf8x5_t t;} +void f___rvv_uint8mf8x5_t () {__rvv_uint8mf8x5_t t;} +void f___rvv_int8mf8x6_t () {__rvv_int8mf8x6_t t;} +void f___rvv_uint8mf8x6_t () {__rvv_uint8mf8x6_t t;} +void f___rvv_int8mf8x7_t () {__rvv_int8mf8x7_t t;} +void f___rvv_uint8mf8x7_t () {__rvv_uint8mf8x7_t t;} +void f___rvv_int8mf8x8_t () {__rvv_int8mf8x8_t t;} +void f___rvv_uint8mf8x8_t () {__rvv_uint8mf8x8_t t;} +void f___rvv_int8mf4x2_t () {__rvv_int8mf4x2_t t;} +void f___rvv_uint8mf4x2_t () {__rvv_uint8mf4x2_t t;} +void f___rvv_int8mf4x3_t () {__rvv_int8mf4x3_t t;} +void f___rvv_uint8mf4x3_t () {__rvv_uint8mf4x3_t t;} +void f___rvv_int8mf4x4_t () {__rvv_int8mf4x4_t t;} +void f___rvv_uint8mf4x4_t () {__rvv_uint8mf4x4_t t;} +void f___rvv_int8mf4x5_t () {__rvv_int8mf4x5_t t;} +void f___rvv_uint8mf4x5_t () {__rvv_uint8mf4x5_t t;} +void f___rvv_int8mf4x6_t () {__rvv_int8mf4x6_t t;} +void f___rvv_uint8mf4x6_t () {__rvv_uint8mf4x6_t t;} +void f___rvv_int8mf4x7_t () {__rvv_int8mf4x7_t t;} +void f___rvv_uint8mf4x7_t () {__rvv_uint8mf4x7_t t;} +void f___rvv_int8mf4x8_t () {__rvv_int8mf4x8_t t;} +void f___rvv_uint8mf4x8_t () {__rvv_uint8mf4x8_t t;} +void f___rvv_int8mf2x2_t () {__rvv_int8mf2x2_t t;} +void f___rvv_uint8mf2x2_t () {__rvv_uint8mf2x2_t t;} +void f___rvv_int8mf2x3_t () {__rvv_int8mf2x3_t t;} +void f___rvv_uint8mf2x3_t () {__rvv_uint8mf2x3_t t;} +void f___rvv_int8mf2x4_t () {__rvv_int8mf2x4_t t;} +void f___rvv_uint8mf2x4_t () {__rvv_uint8mf2x4_t t;} +void f___rvv_int8mf2x5_t () {__rvv_int8mf2x5_t t;} +void f___rvv_uint8mf2x5_t () {__rvv_uint8mf2x5_t t;} +void f___rvv_int8mf2x6_t () {__rvv_int8mf2x6_t t;} +void f___rvv_uint8mf2x6_t () {__rvv_uint8mf2x6_t t;} +void f___rvv_int8mf2x7_t () {__rvv_int8mf2x7_t t;} +void f___rvv_uint8mf2x7_t () {__rvv_uint8mf2x7_t t;} +void f___rvv_int8mf2x8_t () {__rvv_int8mf2x8_t t;} +void f___rvv_uint8mf2x8_t () {__rvv_uint8mf2x8_t t;} +void f___rvv_int8m1x2_t () {__rvv_int8m1x2_t t;} +void f___rvv_uint8m1x2_t () {__rvv_uint8m1x2_t t;} +void f___rvv_int8m1x3_t () {__rvv_int8m1x3_t t;} +void f___rvv_uint8m1x3_t () {__rvv_uint8m1x3_t t;} +void f___rvv_int8m1x4_t () {__rvv_int8m1x4_t t;} +void f___rvv_uint8m1x4_t () {__rvv_uint8m1x4_t t;} +void f___rvv_int8m1x5_t () {__rvv_int8m1x5_t t;} +void f___rvv_uint8m1x5_t () {__rvv_uint8m1x5_t t;} +void f___rvv_int8m1x6_t () {__rvv_int8m1x6_t t;} +void f___rvv_uint8m1x6_t () {__rvv_uint8m1x6_t t;} +void f___rvv_int8m1x7_t () {__rvv_int8m1x7_t t;} +void f___rvv_uint8m1x7_t () {__rvv_uint8m1x7_t t;} +void f___rvv_int8m1x8_t () {__rvv_int8m1x8_t t;} +void f___rvv_uint8m1x8_t () {__rvv_uint8m1x8_t t;} +void f___rvv_int8m2x2_t () {__rvv_int8m2x2_t t;} +void f___rvv_uint8m2x2_t () {__rvv_uint8m2x2_t t;} +void f___rvv_int8m2x3_t () {__rvv_int8m2x3_t t;} +void f___rvv_uint8m2x3_t () {__rvv_uint8m2x3_t t;} +void f___rvv_int8m2x4_t () {__rvv_int8m2x4_t t;} +void f___rvv_uint8m2x4_t () {__rvv_uint8m2x4_t t;} +void f___rvv_int8m4x2_t () {__rvv_int8m4x2_t t;} +void f___rvv_uint8m4x2_t () {__rvv_uint8m4x2_t t;} +void f___rvv_int16mf4x2_t () {__rvv_int16mf4x2_t t;} +void f___rvv_uint16mf4x2_t () {__rvv_uint16mf4x2_t t;} +void f___rvv_int16mf4x3_t () {__rvv_int16mf4x3_t t;} +void f___rvv_uint16mf4x3_t () {__rvv_uint16mf4x3_t t;} +void f___rvv_int16mf4x4_t () {__rvv_int16mf4x4_t t;} +void f___rvv_uint16mf4x4_t () {__rvv_uint16mf4x4_t t;} +void f___rvv_int16mf4x5_t () {__rvv_int16mf4x5_t t;} +void f___rvv_uint16mf4x5_t () {__rvv_uint16mf4x5_t t;} +void f___rvv_int16mf4x6_t () {__rvv_int16mf4x6_t t;} +void f___rvv_uint16mf4x6_t () {__rvv_uint16mf4x6_t t;} +void f___rvv_int16mf4x7_t () {__rvv_int16mf4x7_t t;} +void f___rvv_uint16mf4x7_t () {__rvv_uint16mf4x7_t t;} +void f___rvv_int16mf4x8_t () {__rvv_int16mf4x8_t t;} +void f___rvv_uint16mf4x8_t () {__rvv_uint16mf4x8_t t;} +void f___rvv_int16mf2x2_t () {__rvv_int16mf2x2_t t;} +void f___rvv_uint16mf2x2_t () {__rvv_uint16mf2x2_t t;} +void f___rvv_int16mf2x3_t () {__rvv_int16mf2x3_t t;} +void f___rvv_uint16mf2x3_t () {__rvv_uint16mf2x3_t t;} +void f___rvv_int16mf2x4_t () {__rvv_int16mf2x4_t t;} +void f___rvv_uint16mf2x4_t () {__rvv_uint16mf2x4_t t;} +void f___rvv_int16mf2x5_t () {__rvv_int16mf2x5_t t;} +void f___rvv_uint16mf2x5_t () {__rvv_uint16mf2x5_t t;} +void f___rvv_int16mf2x6_t () {__rvv_int16mf2x6_t t;} +void f___rvv_uint16mf2x6_t () {__rvv_uint16mf2x6_t t;} +void f___rvv_int16mf2x7_t () {__rvv_int16mf2x7_t t;} +void f___rvv_uint16mf2x7_t () {__rvv_uint16mf2x7_t t;} +void f___rvv_int16mf2x8_t () {__rvv_int16mf2x8_t t;} +void f___rvv_uint16mf2x8_t () {__rvv_uint16mf2x8_t t;} +void f___rvv_int16m1x2_t () {__rvv_int16m1x2_t t;} +void f___rvv_uint16m1x2_t () {__rvv_uint16m1x2_t t;} +void f___rvv_int16m1x3_t () {__rvv_int16m1x3_t t;} +void f___rvv_uint16m1x3_t () {__rvv_uint16m1x3_t t;} +void f___rvv_int16m1x4_t () {__rvv_int16m1x4_t t;} +void f___rvv_uint16m1x4_t () {__rvv_uint16m1x4_t t;} +void f___rvv_int16m1x5_t () {__rvv_int16m1x5_t t;} +void f___rvv_uint16m1x5_t () {__rvv_uint16m1x5_t t;} +void f___rvv_int16m1x6_t () {__rvv_int16m1x6_t t;} +void f___rvv_uint16m1x6_t () {__rvv_uint16m1x6_t t;} +void f___rvv_int16m1x7_t () {__rvv_int16m1x7_t t;} +void f___rvv_uint16m1x7_t () {__rvv_uint16m1x7_t t;} +void f___rvv_int16m1x8_t () {__rvv_int16m1x8_t t;} +void f___rvv_uint16m1x8_t () {__rvv_uint16m1x8_t t;} +void f___rvv_int16m2x2_t () {__rvv_int16m2x2_t t;} +void f___rvv_uint16m2x2_t () {__rvv_uint16m2x2_t t;} +void f___rvv_int16m2x3_t () {__rvv_int16m2x3_t t;} +void f___rvv_uint16m2x3_t () {__rvv_uint16m2x3_t t;} +void f___rvv_int16m2x4_t () {__rvv_int16m2x4_t t;} +void f___rvv_uint16m2x4_t () {__rvv_uint16m2x4_t t;} +void f___rvv_int16m4x2_t () {__rvv_int16m4x2_t t;} +void f___rvv_uint16m4x2_t () {__rvv_uint16m4x2_t t;} +void f___rvv_int32mf2x2_t () {__rvv_int32mf2x2_t t;} +void f___rvv_uint32mf2x2_t () {__rvv_uint32mf2x2_t t;} +void f___rvv_int32mf2x3_t () {__rvv_int32mf2x3_t t;} +void f___rvv_uint32mf2x3_t () {__rvv_uint32mf2x3_t t;} +void f___rvv_int32mf2x4_t () {__rvv_int32mf2x4_t t;} +void f___rvv_uint32mf2x4_t () {__rvv_uint32mf2x4_t t;} +void f___rvv_int32mf2x5_t () {__rvv_int32mf2x5_t t;} +void f___rvv_uint32mf2x5_t () {__rvv_uint32mf2x5_t t;} +void f___rvv_int32mf2x6_t () {__rvv_int32mf2x6_t t;} +void f___rvv_uint32mf2x6_t () {__rvv_uint32mf2x6_t t;} +void f___rvv_int32mf2x7_t () {__rvv_int32mf2x7_t t;} +void f___rvv_uint32mf2x7_t () {__rvv_uint32mf2x7_t t;} +void f___rvv_int32mf2x8_t () {__rvv_int32mf2x8_t t;} +void f___rvv_uint32mf2x8_t () {__rvv_uint32mf2x8_t t;} +void f___rvv_int32m1x2_t () {__rvv_int32m1x2_t t;} +void f___rvv_uint32m1x2_t () {__rvv_uint32m1x2_t t;} +void f___rvv_int32m1x3_t () {__rvv_int32m1x3_t t;} +void f___rvv_uint32m1x3_t () {__rvv_uint32m1x3_t t;} +void f___rvv_int32m1x4_t () {__rvv_int32m1x4_t t;} +void f___rvv_uint32m1x4_t () {__rvv_uint32m1x4_t t;} +void f___rvv_int32m1x5_t () {__rvv_int32m1x5_t t;} +void f___rvv_uint32m1x5_t () {__rvv_uint32m1x5_t t;} +void f___rvv_int32m1x6_t () {__rvv_int32m1x6_t t;} +void f___rvv_uint32m1x6_t () {__rvv_uint32m1x6_t t;} +void f___rvv_int32m1x7_t () {__rvv_int32m1x7_t t;} +void f___rvv_uint32m1x7_t () {__rvv_uint32m1x7_t t;} +void f___rvv_int32m1x8_t () {__rvv_int32m1x8_t t;} +void f___rvv_uint32m1x8_t () {__rvv_uint32m1x8_t t;} +void f___rvv_int32m2x2_t () {__rvv_int32m2x2_t t;} +void f___rvv_uint32m2x2_t () {__rvv_uint32m2x2_t t;} +void f___rvv_int32m2x3_t () {__rvv_int32m2x3_t t;} +void f___rvv_uint32m2x3_t () {__rvv_uint32m2x3_t t;} +void f___rvv_int32m2x4_t () {__rvv_int32m2x4_t t;} +void f___rvv_uint32m2x4_t () {__rvv_uint32m2x4_t t;} +void f___rvv_int32m4x2_t () {__rvv_int32m4x2_t t;} +void f___rvv_uint32m4x2_t () {__rvv_uint32m4x2_t t;} +void f___rvv_int64m1x2_t () {__rvv_int64m1x2_t t;} /* { dg-error {unknown type name '__rvv_int64m1x2_t'} } */ +void f___rvv_uint64m1x2_t () {__rvv_uint64m1x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x2_t'} } */ +void f___rvv_int64m1x3_t () {__rvv_int64m1x3_t t;} /* { dg-error {unknown type name '__rvv_int64m1x3_t'} } */ +void f___rvv_uint64m1x3_t () {__rvv_uint64m1x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x3_t'} } */ +void f___rvv_int64m1x4_t () {__rvv_int64m1x4_t t;} /* { dg-error {unknown type name '__rvv_int64m1x4_t'} } */ +void f___rvv_uint64m1x4_t () {__rvv_uint64m1x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x4_t'} } */ +void f___rvv_int64m1x5_t () {__rvv_int64m1x5_t t;} /* { dg-error {unknown type name '__rvv_int64m1x5_t'} } */ +void f___rvv_uint64m1x5_t () {__rvv_uint64m1x5_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x5_t'} } */ +void f___rvv_int64m1x6_t () {__rvv_int64m1x6_t t;} /* { dg-error {unknown type name '__rvv_int64m1x6_t'} } */ +void f___rvv_uint64m1x6_t () {__rvv_uint64m1x6_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x6_t'} } */ +void f___rvv_int64m1x7_t () {__rvv_int64m1x7_t t;} /* { dg-error {unknown type name '__rvv_int64m1x7_t'} } */ +void f___rvv_uint64m1x7_t () {__rvv_uint64m1x7_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x7_t'} } */ +void f___rvv_int64m1x8_t () {__rvv_int64m1x8_t t;} /* { dg-error {unknown type name '__rvv_int64m1x8_t'} } */ +void f___rvv_uint64m1x8_t () {__rvv_uint64m1x8_t t;} /* { dg-error {unknown type name '__rvv_uint64m1x8_t'} } */ +void f___rvv_int64m2x2_t () {__rvv_int64m2x2_t t;} /* { dg-error {unknown type name '__rvv_int64m2x2_t'} } */ +void f___rvv_uint64m2x2_t () {__rvv_uint64m2x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x2_t'} } */ +void f___rvv_int64m2x3_t () {__rvv_int64m2x3_t t;} /* { dg-error {unknown type name '__rvv_int64m2x3_t'} } */ +void f___rvv_uint64m2x3_t () {__rvv_uint64m2x3_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x3_t'} } */ +void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type name '__rvv_int64m2x4_t'} } */ +void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */ +void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */ +void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */ +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} +void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} +void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} +void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} +void f___rvv_float32mf2x5_t () {__rvv_float32mf2x5_t t;} +void f___rvv_float32mf2x6_t () {__rvv_float32mf2x6_t t;} +void f___rvv_float32mf2x7_t () {__rvv_float32mf2x7_t t;} +void f___rvv_float32mf2x8_t () {__rvv_float32mf2x8_t t;} +void f___rvv_float32m1x2_t () {__rvv_float32m1x2_t t;} +void f___rvv_float32m1x3_t () {__rvv_float32m1x3_t t;} +void f___rvv_float32m1x4_t () {__rvv_float32m1x4_t t;} +void f___rvv_float32m1x5_t () {__rvv_float32m1x5_t t;} +void f___rvv_float32m1x6_t () {__rvv_float32m1x6_t t;} +void f___rvv_float32m1x7_t () {__rvv_float32m1x7_t t;} +void f___rvv_float32m1x8_t () {__rvv_float32m1x8_t t;} +void f___rvv_float32m2x2_t () {__rvv_float32m2x2_t t;} +void f___rvv_float32m2x3_t () {__rvv_float32m2x3_t t;} +void f___rvv_float32m2x4_t () {__rvv_float32m2x4_t t;} +void f___rvv_float32m4x2_t () {__rvv_float32m4x2_t t;} +void f___rvv_float64m1x2_t () {__rvv_float64m1x2_t t;} /* { dg-error {unknown type name '__rvv_float64m1x2_t'} } */ +void f___rvv_float64m1x3_t () {__rvv_float64m1x3_t t;} /* { dg-error {unknown type name '__rvv_float64m1x3_t'} } */ +void f___rvv_float64m1x4_t () {__rvv_float64m1x4_t t;} /* { dg-error {unknown type name '__rvv_float64m1x4_t'} } */ +void f___rvv_float64m1x5_t () {__rvv_float64m1x5_t t;} /* { dg-error {unknown type name '__rvv_float64m1x5_t'} } */ +void f___rvv_float64m1x6_t () {__rvv_float64m1x6_t t;} /* { dg-error {unknown type name '__rvv_float64m1x6_t'} } */ +void f___rvv_float64m1x7_t () {__rvv_float64m1x7_t t;} /* { dg-error {unknown type name '__rvv_float64m1x7_t'} } */ +void f___rvv_float64m1x8_t () {__rvv_float64m1x8_t t;} /* { dg-error {unknown type name '__rvv_float64m1x8_t'} } */ +void f___rvv_float64m2x2_t () {__rvv_float64m2x2_t t;} /* { dg-error {unknown type name '__rvv_float64m2x2_t'} } */ +void f___rvv_float64m2x3_t () {__rvv_float64m2x3_t t;} /* { dg-error {unknown type name '__rvv_float64m2x3_t'} } */ +void f___rvv_float64m2x4_t () {__rvv_float64m2x4_t t;} /* { dg-error {unknown type name '__rvv_float64m2x4_t'} } */ +void f___rvv_float64m4x2_t () {__rvv_float64m4x2_t t;} /* { dg-error {unknown type name '__rvv_float64m4x2_t'} } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-8.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-8.c index 282ee488be0..6347b25351c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-8.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-8.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -march=rv32gcv -mabi=ilp32d" } */ +/* { dg-options "-O3 -march=rv32gcv_zvfhmin -mabi=ilp32d" } */ void f___rvv_int8mf8x2_t () {__rvv_int8mf8x2_t t;} void f___rvv_uint8mf8x2_t () {__rvv_uint8mf8x2_t t;} @@ -173,6 +173,31 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-9.c b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-9.c index 37f78d1c7c7..71702ca5bbe 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/abi-9.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/abi-9.c @@ -173,6 +173,31 @@ void f___rvv_int64m2x4_t () {__rvv_int64m2x4_t t;} /* { dg-error {unknown type n void f___rvv_uint64m2x4_t () {__rvv_uint64m2x4_t t;} /* { dg-error {unknown type name '__rvv_uint64m2x4_t'} } */ void f___rvv_int64m4x2_t () {__rvv_int64m4x2_t t;} /* { dg-error {unknown type name '__rvv_int64m4x2_t'} } */ void f___rvv_uint64m4x2_t () {__rvv_uint64m4x2_t t;} /* { dg-error {unknown type name '__rvv_uint64m4x2_t'} } */ +void f___rvv_float16mf4x2_t () {__rvv_float16mf4x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x2_t'} } */ +void f___rvv_float16mf4x3_t () {__rvv_float16mf4x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x3_t'} } */ +void f___rvv_float16mf4x4_t () {__rvv_float16mf4x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x4_t'} } */ +void f___rvv_float16mf4x5_t () {__rvv_float16mf4x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x5_t'} } */ +void f___rvv_float16mf4x6_t () {__rvv_float16mf4x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x6_t'} } */ +void f___rvv_float16mf4x7_t () {__rvv_float16mf4x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x7_t'} } */ +void f___rvv_float16mf4x8_t () {__rvv_float16mf4x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf4x8_t'} } */ +void f___rvv_float16mf2x2_t () {__rvv_float16mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x2_t'} } */ +void f___rvv_float16mf2x3_t () {__rvv_float16mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x3_t'} } */ +void f___rvv_float16mf2x4_t () {__rvv_float16mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x4_t'} } */ +void f___rvv_float16mf2x5_t () {__rvv_float16mf2x5_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x5_t'} } */ +void f___rvv_float16mf2x6_t () {__rvv_float16mf2x6_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x6_t'} } */ +void f___rvv_float16mf2x7_t () {__rvv_float16mf2x7_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x7_t'} } */ +void f___rvv_float16mf2x8_t () {__rvv_float16mf2x8_t t;} /* { dg-error {unknown type name '__rvv_float16mf2x8_t'} } */ +void f___rvv_float16m1x2_t () {__rvv_float16m1x2_t t;} /* { dg-error {unknown type name '__rvv_float16m1x2_t'} } */ +void f___rvv_float16m1x3_t () {__rvv_float16m1x3_t t;} /* { dg-error {unknown type name '__rvv_float16m1x3_t'} } */ +void f___rvv_float16m1x4_t () {__rvv_float16m1x4_t t;} /* { dg-error {unknown type name '__rvv_float16m1x4_t'} } */ +void f___rvv_float16m1x5_t () {__rvv_float16m1x5_t t;} /* { dg-error {unknown type name '__rvv_float16m1x5_t'} } */ +void f___rvv_float16m1x6_t () {__rvv_float16m1x6_t t;} /* { dg-error {unknown type name '__rvv_float16m1x6_t'} } */ +void f___rvv_float16m1x7_t () {__rvv_float16m1x7_t t;} /* { dg-error {unknown type name '__rvv_float16m1x7_t'} } */ +void f___rvv_float16m1x8_t () {__rvv_float16m1x8_t t;} /* { dg-error {unknown type name '__rvv_float16m1x8_t'} } */ +void f___rvv_float16m2x2_t () {__rvv_float16m2x2_t t;} /* { dg-error {unknown type name '__rvv_float16m2x2_t'} } */ +void f___rvv_float16m2x3_t () {__rvv_float16m2x3_t t;} /* { dg-error {unknown type name '__rvv_float16m2x3_t'} } */ +void f___rvv_float16m2x4_t () {__rvv_float16m2x4_t t;} /* { dg-error {unknown type name '__rvv_float16m2x4_t'} } */ +void f___rvv_float16m4x2_t () {__rvv_float16m4x2_t t;} /* { dg-error {unknown type name '__rvv_float16m4x2_t'} } */ void f___rvv_float32mf2x2_t () {__rvv_float32mf2x2_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x2_t'} } */ void f___rvv_float32mf2x3_t () {__rvv_float32mf2x3_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x3_t'} } */ void f___rvv_float32mf2x4_t () {__rvv_float32mf2x4_t t;} /* { dg-error {unknown type name '__rvv_float32mf2x4_t'} } */