From patchwork Tue Apr 18 17:43:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 1770408 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=i+RcpWgd; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Q1B9k1jzCz23tV for ; Wed, 19 Apr 2023 03:43:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232455AbjDRRnw (ORCPT ); Tue, 18 Apr 2023 13:43:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232384AbjDRRnv (ORCPT ); Tue, 18 Apr 2023 13:43:51 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62E147A85; Tue, 18 Apr 2023 10:43:50 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F1A9663773; Tue, 18 Apr 2023 17:43:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 384B8C433D2; Tue, 18 Apr 2023 17:43:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681839829; bh=MdyZykpiq5BpjDBeaDgyaG0Z5BebUvCvzDO8pMjMAmk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=i+RcpWgdQeMdEkeQ1O9fcSc6bduSv61oX5qUnVu6cCs1Z8sBdsertOHGCiaYTrlUC ebXlgJUmgAe4Gcy6RiThLpm4S8ScoLbYBTbENHl6Y7wxzakHMlpmxxBVWMv+0m0Yqo adLqiCEp46M/vE1oFWHdDq/GCjGlOr38pD78YZGPejKOqGG8Yz1uDBLFaY2znBUVHy rSZ3rO8mTCMwuE3JfleZ7ogFRHqKNsqE1N9BlThAmnZ+MUPRHq/BcxV/wGicIUwIeH tJebQRPHQ2ZQeuuNvDxoxn1g63LqzN+3DwW3lMNG24nOf8ojwm9Q/mkCdVDEpO1FB0 6Q0t3vLcWD+gA== From: Bjorn Helgaas To: linux-pci@vger.kernel.org Cc: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-kernel@vger.kernel.org, Bjorn Helgaas , Yue Wang Subject: [PATCH 1/7] PCI: meson: Add 'Amlogic' to Kconfig prompt Date: Tue, 18 Apr 2023 12:43:30 -0500 Message-Id: <20230418174336.145585-2-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230418174336.145585-1-helgaas@kernel.org> References: <20230418174336.145585-1-helgaas@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Add the "Amlogic" vendor name to the CONFIG_PCI_MESON Kconfig prompt to match other PCIe drivers. Capitalize "Meson" to match other Meson Kconfig prompts. Signed-off-by: Bjorn Helgaas Cc: Yue Wang --- drivers/pci/controller/dwc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index d29551261e80..617fcc7563ae 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -321,7 +321,7 @@ config PCIE_HISI_STB Say Y here if you want PCIe controller support on HiSilicon STB SoCs config PCI_MESON - tristate "MESON PCIe controller" + tristate "Amlogic Meson PCIe controller" default m if ARCH_MESON depends on PCI_MSI select PCIE_DW_HOST From patchwork Tue Apr 18 17:43:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 1770410 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Mtp9TXED; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Q1B9k5qhGz23tD for ; Wed, 19 Apr 2023 03:43:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232491AbjDRRnx (ORCPT ); Tue, 18 Apr 2023 13:43:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230202AbjDRRnx (ORCPT ); Tue, 18 Apr 2023 13:43:53 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E3DF8A66; Tue, 18 Apr 2023 10:43:52 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id CC4D363773; Tue, 18 Apr 2023 17:43:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0446CC433D2; Tue, 18 Apr 2023 17:43:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681839831; bh=pEZfh99cq2P1zARfhUOHhO1PChw+njk2jDt6BjMYCjw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Mtp9TXED5GogTEZ8T49C1bheOxOdV13tPaZWyDtfEx6DRoVxxGH+UfWd1kjfVjF3U D2CtF9GF+5WKu9KitkXtLGlYniAk+03jjHy66aqxFg3smGQKfz76I8W5ZchkXCRxn4 j2vPoHg9hd3wPpzBAkTaKp2sI2QDHiKpXp4Um+O/VFJFcNU7cBaRKzilGQAvbkhVUj A/GrXMkaIqQG483ajYufK3JxaJvgr/7PnrdakOpphr8Q4BGXFZFL322bf2ezBURaJU usDxfLVHxd0DF5/D/+zzDOFZ9hKO42zgwPyOMBoQXFLaXzdKyNa3RNukcE3UltO8C0 hdRETNfVbE1bg== From: Bjorn Helgaas To: linux-pci@vger.kernel.org Cc: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-kernel@vger.kernel.org, Bjorn Helgaas , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui Subject: [PATCH 2/7] PCI: hv: Add 'Microsoft' to Kconfig prompt Date: Tue, 18 Apr 2023 12:43:31 -0500 Message-Id: <20230418174336.145585-3-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230418174336.145585-1-helgaas@kernel.org> References: <20230418174336.145585-1-helgaas@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Add the "Microsoft" vendor name to the CONFIG_PCI_HYPERV_INTERFACE Kconfig prompt so it matches other PCIe drivers and other Hyper-V prompts. Signed-off-by: Bjorn Helgaas Cc: K. Y. Srinivasan Cc: Haiyang Zhang Cc: Wei Liu Cc: Dexuan Cui Acked-by: Wei Liu --- drivers/pci/controller/Kconfig | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 42654035654a..8b1f9a3f83ea 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -285,11 +285,12 @@ config PCIE_BRCMSTB Broadcom STB based SoCs, like the Raspberry Pi 4. config PCI_HYPERV_INTERFACE - tristate "Hyper-V PCI Interface" + tristate "Microsoft Hyper-V PCI Interface" depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI help - The Hyper-V PCI Interface is a helper driver allows other drivers to - have a common interface with the Hyper-V PCI frontend driver. + The Hyper-V PCI Interface is a helper driver that allows other + drivers to have a common interface with the Hyper-V PCI frontend + driver. config PCI_LOONGSON bool "LOONGSON PCI Controller" From patchwork Tue Apr 18 17:43:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 1770411 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=KK6eHqqC; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Q1B9t3S59z23tD for ; Wed, 19 Apr 2023 03:44:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232624AbjDRRoB (ORCPT ); Tue, 18 Apr 2023 13:44:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232589AbjDRRnz (ORCPT ); Tue, 18 Apr 2023 13:43:55 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DD96B75F; Tue, 18 Apr 2023 10:43:54 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9945C63773; Tue, 18 Apr 2023 17:43:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D2921C433D2; Tue, 18 Apr 2023 17:43:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681839833; bh=zpWqmGvi9CSxKxYVFIGXgRmOWG8TbX9XjeHQATchqSY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KK6eHqqCu9DNgOk6vlUyYvD+Bax8t9CcyT6M37foWjeBIhQYTpvLeC8eigyyJ8bOK M10POSYpvjvDCgnvx8chGfPA568wJPxznF5PKMWAq6TKsvbsO0igNjJhPaXaHAQ3l5 v344IW/SR+f8KkNwDRQS+QTdtgxW7wBHP6rgP4AZDudSdYmdFOTqL/pQrMFdLVLU6a f1huk/mr434fkd8gNEmFQQsviTtj3L11XHHpImWa5qd8fEOVcy8vdgoJ4lRj9iITgW NZFzLfYXqKjBt7ih0q7BL/2eXsfK8DRMSofgE4OiusVuCX3SIe39c3Yf4RqiVHrJ2H niDh9cs/MAHiQ== From: Bjorn Helgaas To: linux-pci@vger.kernel.org Cc: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-kernel@vger.kernel.org, Bjorn Helgaas , Michal Simek Subject: [PATCH 3/7] PCI: xilinx-nwl: Add 'Xilinx' to Kconfig prompt Date: Tue, 18 Apr 2023 12:43:32 -0500 Message-Id: <20230418174336.145585-4-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230418174336.145585-1-helgaas@kernel.org> References: <20230418174336.145585-1-helgaas@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Add the "Xilinx" vendor name to the CONFIG_PCIE_XILINX_NWL Kconfig prompt so it matches other drivers. Rename from "PCIe Core" to "PCIe controller". Signed-off-by: Bjorn Helgaas Cc: Michal Simek Acked-by: Michal Simek --- drivers/pci/controller/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 8b1f9a3f83ea..5875587d8b59 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -28,7 +28,7 @@ config PCI_AARDVARK 3700 SoC. config PCIE_XILINX_NWL - bool "NWL PCIe Core" + bool "Xilinx NWL PCIe controller" depends on ARCH_ZYNQMP || COMPILE_TEST depends on PCI_MSI help From patchwork Tue Apr 18 17:43:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 1770412 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=IVgo/kKh; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Q1B9v3nycz23tD for ; Wed, 19 Apr 2023 03:44:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232599AbjDRRoB (ORCPT ); Tue, 18 Apr 2023 13:44:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231153AbjDRRn6 (ORCPT ); Tue, 18 Apr 2023 13:43:58 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAD47AF12; Tue, 18 Apr 2023 10:43:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 65B3C60A53; Tue, 18 Apr 2023 17:43:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 975E6C433EF; Tue, 18 Apr 2023 17:43:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681839834; bh=Q16TXJlROwqfBaCXwZNvd7ldzvHDAQ0Wt0AqOFPTsWQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IVgo/kKhTDiLxtreZY8GepydatRvirUF4sZhNd/I+oV3cYbG9s05xoKr8xU61c8TW 3xzGLJXli9sJCGjw99v13tefIbgzzbH0Xpn87sKDwnO3k+M4WbZgwIyrxq5f4Ux+8q Jji4Ij+YrSzZ8v0uYebc9e1NmQrDe6EdNUPVRaQDlDwpFHHlJpmlGhFeb0Pbk4nP8p LUgMVztuL5GTVbcqGV6J2njj8sAnY0LVx9L+VEVLyd7P3Vl7SQKjttWx7lG0zyONsF bOFAUj5lRcGZQO2l5VJH+SL1d8QaitsuTiWruOHoR4lQLETOhBmssz9Wusk28pZCKA X90oa6RrFlY+g== From: Bjorn Helgaas To: linux-pci@vger.kernel.org Cc: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-kernel@vger.kernel.org, Bjorn Helgaas Subject: [PATCH 4/7] PCI: Use consistent controller Kconfig menu entry language Date: Tue, 18 Apr 2023 12:43:33 -0500 Message-Id: <20230418174336.145585-5-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230418174336.145585-1-helgaas@kernel.org> References: <20230418174336.145585-1-helgaas@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Use "PCIe controller" consistently instead of "host bridge", "bus driver", etc. Annotate with "(host mode)" or "(endpoint mode)" as needed. Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/Kconfig | 22 +++++----- drivers/pci/controller/cadence/Kconfig | 10 ++--- drivers/pci/controller/dwc/Kconfig | 54 ++++++++++++------------- drivers/pci/controller/mobiveil/Kconfig | 4 +- 4 files changed, 45 insertions(+), 45 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 5875587d8b59..7690cc7bbd3f 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -69,7 +69,7 @@ config PCI_RCAR_GEN2 built-in EHCI/OHCI host controller present on each one. config PCIE_RCAR_HOST - bool "Renesas R-Car PCIe host controller" + bool "Renesas R-Car PCIe controller (host mode)" depends on ARCH_RENESAS || COMPILE_TEST depends on PCI_MSI help @@ -77,7 +77,7 @@ config PCIE_RCAR_HOST mode. config PCIE_RCAR_EP - bool "Renesas R-Car PCIe endpoint controller" + bool "Renesas R-Car PCIe controller (endpoint mode)" depends on ARCH_RENESAS || COMPILE_TEST depends on PCI_ENDPOINT help @@ -98,7 +98,7 @@ config PCI_HOST_GENERIC controller, such as the one emulated by kvmtool. config PCIE_XILINX - bool "Xilinx AXI PCIe host bridge support" + bool "Xilinx AXI PCIe controller" depends on OF || COMPILE_TEST depends on PCI_MSI help @@ -106,7 +106,7 @@ config PCIE_XILINX Host Bridge driver. config PCIE_XILINX_CPM - bool "Xilinx Versal CPM host bridge support" + bool "Xilinx Versal CPM PCI controller" depends on ARCH_ZYNQMP || COMPILE_TEST select PCI_HOST_COMMON help @@ -159,7 +159,7 @@ config PCIE_IPROC_PLATFORM through the generic platform bus interface config PCIE_IPROC_BCMA - tristate "Broadcom iProc PCIe BCMA bus driver" + tristate "Broadcom iProc BCMA PCIe controller" depends on ARM && (ARCH_BCM_IPROC || COMPILE_TEST) select PCIE_IPROC select BCMA @@ -213,7 +213,7 @@ config PCIE_ROCKCHIP depends on PCI config PCIE_ROCKCHIP_HOST - tristate "Rockchip PCIe host controller" + tristate "Rockchip PCIe controller (host mode)" depends on ARCH_ROCKCHIP || COMPILE_TEST depends on OF depends on PCI_MSI @@ -225,7 +225,7 @@ config PCIE_ROCKCHIP_HOST 4 slots. config PCIE_ROCKCHIP_EP - bool "Rockchip PCIe endpoint controller" + bool "Rockchip PCIe controller (endpoint mode)" depends on ARCH_ROCKCHIP || COMPILE_TEST depends on OF depends on PCI_ENDPOINT @@ -274,7 +274,7 @@ config VMD module will be called vmd. config PCIE_BRCMSTB - tristate "Broadcom Brcmstb PCIe host controller" + tristate "Broadcom Brcmstb PCIe controller" depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCMBCA || \ BMIPS_GENERIC || COMPILE_TEST depends on OF @@ -293,7 +293,7 @@ config PCI_HYPERV_INTERFACE driver. config PCI_LOONGSON - bool "LOONGSON PCI Controller" + bool "LOONGSON PCIe controller" depends on MACH_LOONGSON64 || COMPILE_TEST depends on OF || ACPI depends on PCI_QUIRKS @@ -303,7 +303,7 @@ config PCI_LOONGSON Loongson systems. config PCIE_MICROCHIP_HOST - bool "Microchip AXI PCIe host bridge support" + bool "Microchip AXI PCIe controller" depends on PCI_MSI && OF select PCI_HOST_COMMON help @@ -336,7 +336,7 @@ config PCIE_APPLE If unsure, say Y if you have an Apple Silicon system. config PCIE_MT7621 - tristate "MediaTek MT7621 PCIe Controller" + tristate "MediaTek MT7621 PCIe controller" depends on SOC_MT7621 || COMPILE_TEST select PHY_MT7621_PCI default SOC_MT7621 diff --git a/drivers/pci/controller/cadence/Kconfig b/drivers/pci/controller/cadence/Kconfig index 5d30564190e1..291d12711363 100644 --- a/drivers/pci/controller/cadence/Kconfig +++ b/drivers/pci/controller/cadence/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -menu "Cadence PCIe controllers support" +menu "Cadence-based PCIe controllers" depends on PCI config PCIE_CADENCE @@ -22,7 +22,7 @@ config PCIE_CADENCE_PLAT bool config PCIE_CADENCE_PLAT_HOST - bool "Cadence PCIe platform host controller" + bool "Cadence platform PCIe controller (host mode)" depends on OF select PCIE_CADENCE_HOST select PCIE_CADENCE_PLAT @@ -32,7 +32,7 @@ config PCIE_CADENCE_PLAT_HOST vendors SoCs. config PCIE_CADENCE_PLAT_EP - bool "Cadence PCIe platform endpoint controller" + bool "Cadence platform PCIe controller (endpoint mode)" depends on OF depends on PCI_ENDPOINT select PCIE_CADENCE_EP @@ -46,7 +46,7 @@ config PCI_J721E bool config PCI_J721E_HOST - bool "TI J721E PCIe platform host controller" + bool "TI J721E PCIe controller (host mode)" depends on OF select PCIE_CADENCE_HOST select PCI_J721E @@ -56,7 +56,7 @@ config PCI_J721E_HOST core. config PCI_J721E_EP - bool "TI J721E PCIe platform endpoint controller" + bool "TI J721E PCIe controller (endpoint mode)" depends on OF depends on PCI_ENDPOINT select PCIE_CADENCE_EP diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 617fcc7563ae..4c44ad9f8f2b 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -menu "DesignWare PCI Core Support" +menu "DesignWare-based PCIe controllers" depends on PCI config PCIE_DW @@ -18,7 +18,7 @@ config PCI_DRA7XX tristate config PCI_DRA7XX_HOST - tristate "TI DRA7xx PCIe controller Host Mode" + tristate "TI DRA7xx PCIe controller (host mode)" depends on SOC_DRA7XX || COMPILE_TEST depends on OF && HAS_IOMEM && TI_PIPE3 depends on PCI_MSI @@ -34,7 +34,7 @@ config PCI_DRA7XX_HOST This uses the DesignWare core. config PCI_DRA7XX_EP - tristate "TI DRA7xx PCIe controller Endpoint Mode" + tristate "TI DRA7xx PCIe controller (endpoint mode)" depends on SOC_DRA7XX || COMPILE_TEST depends on OF && HAS_IOMEM && TI_PIPE3 depends on PCI_ENDPOINT @@ -52,7 +52,7 @@ config PCIE_DW_PLAT bool config PCIE_DW_PLAT_HOST - bool "Platform bus based DesignWare PCIe Controller - Host mode" + bool "Platform bus based DesignWare PCIe controller (host mode)" depends on PCI_MSI select PCIE_DW_HOST select PCIE_DW_PLAT @@ -66,7 +66,7 @@ config PCIE_DW_PLAT_HOST selected. config PCIE_DW_PLAT_EP - bool "Platform bus based DesignWare PCIe Controller - Endpoint mode" + bool "Platform bus based DesignWare PCIe controller (endpoint mode)" depends on PCI && PCI_MSI depends on PCI_ENDPOINT select PCIE_DW_EP @@ -95,7 +95,7 @@ config PCI_IMX6 bool config PCI_IMX6_HOST - bool "Freescale i.MX6/7/8 PCIe controller host mode" + bool "Freescale i.MX6/7/8 PCIe controller (host mode)" depends on ARCH_MXC || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -107,7 +107,7 @@ config PCI_IMX6_HOST DesignWare core functions to implement the driver. config PCI_IMX6_EP - bool "Freescale i.MX6/7/8 PCIe controller endpoint mode" + bool "Freescale i.MX6/7/8 PCIe controller (endpoint mode)" depends on ARCH_MXC || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP @@ -130,7 +130,7 @@ config PCI_KEYSTONE bool config PCI_KEYSTONE_HOST - bool "PCI Keystone Host Mode" + bool "TI Keystone PCIe controller (host mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -142,7 +142,7 @@ config PCI_KEYSTONE_HOST DesignWare core functions to implement the driver. config PCI_KEYSTONE_EP - bool "PCI Keystone Endpoint Mode" + bool "TI Keystone PCIe controller (endpoint mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP @@ -154,7 +154,7 @@ config PCI_KEYSTONE_EP DesignWare core functions to implement the driver. config PCI_LAYERSCAPE - bool "Freescale Layerscape PCIe controller - Host mode" + bool "Freescale Layerscape PCIe controller (host mode)" depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) depends on PCI_MSI select PCIE_DW_HOST @@ -167,7 +167,7 @@ config PCI_LAYERSCAPE controller works in RC mode. config PCI_LAYERSCAPE_EP - bool "Freescale Layerscape PCIe controller - Endpoint mode" + bool "Freescale Layerscape PCIe controller (endpoint mode)" depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) depends on PCI_ENDPOINT select PCIE_DW_EP @@ -180,7 +180,7 @@ config PCI_LAYERSCAPE_EP config PCI_HISI depends on OF && (ARM64 || COMPILE_TEST) - bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers" + bool "HiSilicon Hip05 and Hip06 SoCs PCIe controller" depends on PCI_MSI select PCIE_DW_HOST select PCI_HOST_COMMON @@ -189,7 +189,7 @@ config PCI_HISI Hip05 and Hip06 SoCs config PCIE_QCOM - bool "Qualcomm PCIe controller" + bool "Qualcomm PCIe controller (host mode)" depends on OF && (ARCH_QCOM || COMPILE_TEST) depends on PCI_MSI select PCIE_DW_HOST @@ -200,7 +200,7 @@ config PCIE_QCOM hardware wrappers. config PCIE_QCOM_EP - tristate "Qualcomm PCIe controller - Endpoint mode" + tristate "Qualcomm PCIe controller (endpoint mode)" depends on OF && (ARCH_QCOM || COMPILE_TEST) depends on PCI_ENDPOINT select PCIE_DW_EP @@ -224,7 +224,7 @@ config PCIE_ARTPEC6 bool config PCIE_ARTPEC6_HOST - bool "Axis ARTPEC-6 PCIe controller Host Mode" + bool "Axis ARTPEC-6 PCIe controller (host mode)" depends on MACH_ARTPEC6 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -234,7 +234,7 @@ config PCIE_ARTPEC6_HOST host mode. This uses the DesignWare core. config PCIE_ARTPEC6_EP - bool "Axis ARTPEC-6 PCIe controller Endpoint Mode" + bool "Axis ARTPEC-6 PCIe controller (endpoint mode)" depends on MACH_ARTPEC6 || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP @@ -264,7 +264,7 @@ config PCIE_ROCKCHIP_DW_HOST Rockchip SoC except RK3399. config PCIE_INTEL_GW - bool "Intel Gateway PCIe host controller support" + bool "Intel Gateway PCIe controller " depends on OF && (X86 || COMPILE_TEST) depends on PCI_MSI select PCIE_DW_HOST @@ -278,7 +278,7 @@ config PCIE_KEEMBAY bool config PCIE_KEEMBAY_HOST - bool "Intel Keem Bay PCIe controller - Host mode" + bool "Intel Keem Bay PCIe controller (host mode)" depends on ARCH_KEEMBAY || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -290,7 +290,7 @@ config PCIE_KEEMBAY_HOST DesignWare core functions. config PCIE_KEEMBAY_EP - bool "Intel Keem Bay PCIe controller - Endpoint mode" + bool "Intel Keem Bay PCIe controller (endpoint mode)" depends on ARCH_KEEMBAY || COMPILE_TEST depends on PCI_MSI depends on PCI_ENDPOINT @@ -304,7 +304,7 @@ config PCIE_KEEMBAY_EP config PCIE_KIRIN depends on OF && (ARM64 || COMPILE_TEST) - tristate "HiSilicon Kirin series SoCs PCIe controllers" + tristate "HiSilicon Kirin PCIe controller" depends on PCI_MSI select PCIE_DW_HOST select REGMAP_MMIO @@ -313,7 +313,7 @@ config PCIE_KIRIN on HiSilicon Kirin series SoCs. config PCIE_HISI_STB - bool "HiSilicon STB SoCs PCIe controllers" + bool "HiSilicon STB PCIe controller" depends on ARCH_HISI || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -335,7 +335,7 @@ config PCIE_TEGRA194 tristate config PCIE_TEGRA194_HOST - tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode" + tristate "NVIDIA Tegra194 (and later) PCIe controller (host mode)" depends on ARCH_TEGRA_194_SOC || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -350,7 +350,7 @@ config PCIE_TEGRA194_HOST selected. This uses the DesignWare core. config PCIE_TEGRA194_EP - tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode" + tristate "NVIDIA Tegra194 (and later) PCIe controller (endpoint mode)" depends on ARCH_TEGRA_194_SOC || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP @@ -365,7 +365,7 @@ config PCIE_TEGRA194_EP selected. This uses the DesignWare core. config PCIE_VISCONTI_HOST - bool "Toshiba Visconti PCIe controllers" + bool "Toshiba Visconti PCIe controller" depends on ARCH_VISCONTI || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -374,7 +374,7 @@ config PCIE_VISCONTI_HOST This driver supports TMPV7708 SoC. config PCIE_UNIPHIER - bool "Socionext UniPhier PCIe host controllers" + bool "Socionext UniPhier PCIe controller (host mode)" depends on ARCH_UNIPHIER || COMPILE_TEST depends on OF && HAS_IOMEM depends on PCI_MSI @@ -384,7 +384,7 @@ config PCIE_UNIPHIER This driver supports LD20 and PXs3 SoCs. config PCIE_UNIPHIER_EP - bool "Socionext UniPhier PCIe endpoint controllers" + bool "Socionext UniPhier PCIe controller (endpoint mode)" depends on ARCH_UNIPHIER || COMPILE_TEST depends on OF && HAS_IOMEM depends on PCI_ENDPOINT @@ -407,7 +407,7 @@ config PCIE_AL Annapurna Labs PCIe controller don't need to enable this. config PCIE_FU740 - bool "SiFive FU740 PCIe host controller" + bool "SiFive FU740 PCIe controller" depends on PCI_MSI depends on SOC_SIFIVE || COMPILE_TEST select PCIE_DW_HOST diff --git a/drivers/pci/controller/mobiveil/Kconfig b/drivers/pci/controller/mobiveil/Kconfig index 1d7a07ba9ccd..bc9c624cf619 100644 --- a/drivers/pci/controller/mobiveil/Kconfig +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -menu "Mobiveil PCIe Core Support" +menu "Mobiveil-based PCIe controllers" depends on PCI config PCIE_MOBIVEIL @@ -23,7 +23,7 @@ config PCIE_MOBIVEIL_PLAT for address translation and it is a PCIe Gen4 IP. config PCIE_LAYERSCAPE_GEN4 - bool "Freescale Layerscape PCIe Gen4 controller" + bool "Freescale Layerscape Gen4 PCIe controller" depends on ARCH_LAYERSCAPE || COMPILE_TEST depends on PCI_MSI select PCIE_MOBIVEIL_HOST From patchwork Tue Apr 18 17:43:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 1770414 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=JAT2gw1T; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Q1B9x2Yxfz23tD for ; Wed, 19 Apr 2023 03:44:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232532AbjDRRoD (ORCPT ); Tue, 18 Apr 2023 13:44:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232622AbjDRRoA (ORCPT ); Tue, 18 Apr 2023 13:44:00 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4F34BBB5; Tue, 18 Apr 2023 10:43:57 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 50CA363777; Tue, 18 Apr 2023 17:43:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 79E6AC4339C; Tue, 18 Apr 2023 17:43:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681839836; bh=AL3+SyTTFCGKDjWw5td9YZ2QKfBI0GTdJPgM4AiAhe4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JAT2gw1Tw2FDwQKJRtKhP2QuKhZEZDORi5PZa6kKxzEqCrB3ljiU3FdGz2BmAod8W /R5OGZyEhdpRtwhpTEPNoCUrzjkGA+E1lIYG2z1Qm+WvzvnDvOOjgBIpl59Jdjw3lN VfEHH0iON+Rr93MQfGoDrpclF3bWSvNirIZhYRnJL0tjMDgINuKtuGeHmBtAhcfxGe 0Jn7EggHHVG4cUjuGifgMvR9FH6myR3nwPx6HD4/CCkegCZ+hZoSQaSY/D5f9pTX6m nAB2KifRYjpUqWW895aJo7HV626CPcgzQeBwif3qBcP+RMFodkFMrLbWk4VbDg98HZ oI8skUATWZrvw== From: Bjorn Helgaas To: linux-pci@vger.kernel.org Cc: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-kernel@vger.kernel.org, Bjorn Helgaas Subject: [PATCH 5/7] PCI: Sort controller Kconfig entries by vendor Date: Tue, 18 Apr 2023 12:43:34 -0500 Message-Id: <20230418174336.145585-6-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230418174336.145585-1-helgaas@kernel.org> References: <20230418174336.145585-1-helgaas@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Sort Kconfig entries by vendor so they appear in alphabetical order in menuconfig. Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/Kconfig | 456 ++++++++++++++++----------------- 1 file changed, 228 insertions(+), 228 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 7690cc7bbd3f..c52ca0c9550d 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -3,19 +3,6 @@ menu "PCI controller drivers" depends on PCI -config PCI_MVEBU - tristate "Marvell EBU PCIe controller" - depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST - depends on MVEBU_MBUS - depends on ARM - depends on OF - depends on BROKEN - select PCI_BRIDGE_EMUL - help - Add support for Marvell EBU PCIe controller. This PCIe controller - is used on 32-bit Marvell ARM SoCs: Dove, Kirkwood, Armada 370, - Armada XP, Armada 375, Armada 38x and Armada 39x. - config PCI_AARDVARK tristate "Aardvark PCIe controller" depends on (ARCH_MVEBU && ARM64) || COMPILE_TEST @@ -27,120 +14,54 @@ config PCI_AARDVARK controller is part of the South Bridge of the Marvel Armada 3700 SoC. -config PCIE_XILINX_NWL - bool "Xilinx NWL PCIe controller" - depends on ARCH_ZYNQMP || COMPILE_TEST +config PCIE_ALTERA + tristate "Altera PCIe controller" + depends on ARM || NIOS2 || ARM64 || COMPILE_TEST + help + Say Y here if you want to enable PCIe controller support on Altera + FPGA. + +config PCIE_ALTERA_MSI + tristate "Altera PCIe MSI feature" + depends on PCIE_ALTERA depends on PCI_MSI help - Say 'Y' here if you want kernel support for Xilinx - NWL PCIe controller. The controller can act as Root Port - or End Point. The current option selection will only - support root port enabling. + Say Y here if you want PCIe MSI support for the Altera FPGA. + This MSI driver supports Altera MSI to GIC controller IP. -config PCI_FTPCI100 - bool "Faraday Technology FTPCI100 PCI controller" +config PCIE_APPLE_MSI_DOORBELL_ADDR + hex + default 0xfffff000 + depends on PCIE_APPLE + +config PCIE_APPLE + tristate "Apple PCIe controller" + depends on ARCH_APPLE || COMPILE_TEST depends on OF - default ARCH_GEMINI - -config PCI_IXP4XX - bool "Intel IXP4xx PCI controller" - depends on ARM && OF - depends on ARCH_IXP4XX || COMPILE_TEST - default ARCH_IXP4XX - help - Say Y here if you want support for the PCI host controller found - in the Intel IXP4xx XScale-based network processor SoC. - -config PCI_TEGRA - bool "NVIDIA Tegra PCIe controller" - depends on ARCH_TEGRA || COMPILE_TEST depends on PCI_MSI - help - Say Y here if you want support for the PCIe host controller found - on NVIDIA Tegra SoCs. - -config PCI_RCAR_GEN2 - bool "Renesas R-Car Gen2 Internal PCI controller" - depends on ARCH_RENESAS || COMPILE_TEST - depends on ARM - help - Say Y here if you want internal PCI support on R-Car Gen2 SoC. - There are 3 internal PCI controllers available with a single - built-in EHCI/OHCI host controller present on each one. - -config PCIE_RCAR_HOST - bool "Renesas R-Car PCIe controller (host mode)" - depends on ARCH_RENESAS || COMPILE_TEST - depends on PCI_MSI - help - Say Y here if you want PCIe controller support on R-Car SoCs in host - mode. - -config PCIE_RCAR_EP - bool "Renesas R-Car PCIe controller (endpoint mode)" - depends on ARCH_RENESAS || COMPILE_TEST - depends on PCI_ENDPOINT - help - Say Y here if you want PCIe controller support on R-Car SoCs in - endpoint mode. - -config PCI_HOST_COMMON - tristate - select PCI_ECAM - -config PCI_HOST_GENERIC - tristate "Generic PCI host controller" - depends on OF - select PCI_HOST_COMMON - select IRQ_DOMAIN - help - Say Y here if you want to support a simple generic PCI host - controller, such as the one emulated by kvmtool. - -config PCIE_XILINX - bool "Xilinx AXI PCIe controller" - depends on OF || COMPILE_TEST - depends on PCI_MSI - help - Say 'Y' here if you want kernel to support the Xilinx AXI PCIe - Host Bridge driver. - -config PCIE_XILINX_CPM - bool "Xilinx Versal CPM PCI controller" - depends on ARCH_ZYNQMP || COMPILE_TEST select PCI_HOST_COMMON help - Say 'Y' here if you want kernel support for the - Xilinx Versal CPM host bridge. + Say Y here if you want to enable PCIe controller support on Apple + system-on-chips, like the Apple M1. This is required for the USB + type-A ports, Ethernet, Wi-Fi, and Bluetooth. -config PCI_XGENE - bool "X-Gene PCIe controller" - depends on ARM64 || COMPILE_TEST - depends on OF || (ACPI && PCI_QUIRKS) - help - Say Y here if you want internal PCI support on APM X-Gene SoC. - There are 5 internal PCIe ports available. Each port is GEN3 capable - and have varied lanes from x1 to x8. - -config PCI_XGENE_MSI - bool "X-Gene v1 PCIe MSI feature" - depends on PCI_XGENE - depends on PCI_MSI - default y - help - Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC. - This MSI driver supports 5 PCIe ports on the APM X-Gene v1 SoC. - -config PCI_V3_SEMI - bool "V3 Semiconductor PCI controller" - depends on OF - depends on ARM || COMPILE_TEST - default ARCH_INTEGRATOR_AP + If unsure, say Y if you have an Apple Silicon system. config PCI_VERSATILE bool "ARM Versatile PB PCI controller" depends on ARCH_VERSATILE || COMPILE_TEST +config PCIE_BRCMSTB + tristate "Broadcom Brcmstb PCIe controller" + depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCMBCA || \ + BMIPS_GENERIC || COMPILE_TEST + depends on OF + depends on PCI_MSI + default ARCH_BRCMSTB || BMIPS_GENERIC + help + Say Y here to enable PCIe host controller support for + Broadcom STB based SoCs, like the Raspberry Pi 4. + config PCIE_IPROC tristate help @@ -177,21 +98,6 @@ config PCIE_IPROC_MSI Say Y here if you want to enable MSI support for Broadcom's iProc PCIe controller -config PCIE_ALTERA - tristate "Altera PCIe controller" - depends on ARM || NIOS2 || ARM64 || COMPILE_TEST - help - Say Y here if you want to enable PCIe controller support on Altera - FPGA. - -config PCIE_ALTERA_MSI - tristate "Altera PCIe MSI feature" - depends on PCIE_ALTERA - depends on PCI_MSI - help - Say Y here if you want PCIe MSI support for the Altera FPGA. - This MSI driver supports Altera MSI to GIC controller IP. - config PCI_HOST_THUNDER_PEM bool "Cavium Thunder PCIe controller to off-chip devices" depends on ARM64 || COMPILE_TEST @@ -208,6 +114,157 @@ config PCI_HOST_THUNDER_ECAM help Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs. +config PCI_FTPCI100 + bool "Faraday Technology FTPCI100 PCI controller" + depends on OF + default ARCH_GEMINI + +config PCI_HOST_COMMON + tristate + select PCI_ECAM + +config PCI_HOST_GENERIC + tristate "Generic PCI host controller" + depends on OF + select PCI_HOST_COMMON + select IRQ_DOMAIN + help + Say Y here if you want to support a simple generic PCI host + controller, such as the one emulated by kvmtool. + +config PCIE_HISI_ERR + depends on ACPI_APEI_GHES && (ARM64 || COMPILE_TEST) + bool "HiSilicon HIP PCIe controller error handling driver" + help + Say Y here if you want error handling support + for the PCIe controller's errors on HiSilicon HIP SoCs + +config PCI_IXP4XX + bool "Intel IXP4xx PCI controller" + depends on ARM && OF + depends on ARCH_IXP4XX || COMPILE_TEST + default ARCH_IXP4XX + help + Say Y here if you want support for the PCI host controller found + in the Intel IXP4xx XScale-based network processor SoC. + +config VMD + depends on PCI_MSI && X86_64 && !UML + tristate "Intel Volume Management Device Driver" + help + Adds support for the Intel Volume Management Device (VMD). VMD is a + secondary PCI host bridge that allows PCI Express root ports, + and devices attached to them, to be removed from the default + PCI domain and placed within the VMD domain. This provides + more bus resources than are otherwise possible with a + single domain. If you know your system provides one of these and + has devices attached to it, say Y; if you are not sure, say N. + + To compile this driver as a module, choose M here: the + module will be called vmd. + +config PCI_LOONGSON + bool "LOONGSON PCIe controller" + depends on MACH_LOONGSON64 || COMPILE_TEST + depends on OF || ACPI + depends on PCI_QUIRKS + default MACH_LOONGSON64 + help + Say Y here if you want to enable PCI controller support on + Loongson systems. + +config PCI_MVEBU + tristate "Marvell EBU PCIe controller" + depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST + depends on MVEBU_MBUS + depends on ARM + depends on OF + depends on BROKEN + select PCI_BRIDGE_EMUL + help + Add support for Marvell EBU PCIe controller. This PCIe controller + is used on 32-bit Marvell ARM SoCs: Dove, Kirkwood, Armada 370, + Armada XP, Armada 375, Armada 38x and Armada 39x. + +config PCIE_MEDIATEK + tristate "MediaTek PCIe controller" + depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST + depends on OF + depends on PCI_MSI + help + Say Y here if you want to enable PCIe controller support on + MediaTek SoCs. + +config PCIE_MEDIATEK_GEN3 + tristate "MediaTek Gen3 PCIe controller" + depends on ARCH_MEDIATEK || COMPILE_TEST + depends on PCI_MSI + help + Adds support for PCIe Gen3 MAC controller for MediaTek SoCs. + This PCIe controller is compatible with Gen3, Gen2 and Gen1 speed, + and support up to 256 MSI interrupt numbers for + multi-function devices. + + Say Y here if you want to enable Gen3 PCIe controller support on + MediaTek SoCs. + +config PCIE_MT7621 + tristate "MediaTek MT7621 PCIe controller" + depends on SOC_MT7621 || COMPILE_TEST + select PHY_MT7621_PCI + default SOC_MT7621 + help + This selects a driver for the MediaTek MT7621 PCIe Controller. + +config PCIE_MICROCHIP_HOST + bool "Microchip AXI PCIe controller" + depends on PCI_MSI && OF + select PCI_HOST_COMMON + help + Say Y here if you want kernel to support the Microchip AXI PCIe + Host Bridge driver. + +config PCI_HYPERV_INTERFACE + tristate "Microsoft Hyper-V PCI Interface" + depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI + help + The Hyper-V PCI Interface is a helper driver that allows other + drivers to have a common interface with the Hyper-V PCI frontend + driver. + +config PCI_TEGRA + bool "NVIDIA Tegra PCIe controller" + depends on ARCH_TEGRA || COMPILE_TEST + depends on PCI_MSI + help + Say Y here if you want support for the PCIe host controller found + on NVIDIA Tegra SoCs. + +config PCIE_RCAR_HOST + bool "Renesas R-Car PCIe controller (host mode)" + depends on ARCH_RENESAS || COMPILE_TEST + depends on PCI_MSI + help + Say Y here if you want PCIe controller support on R-Car SoCs in host + mode. + +config PCIE_RCAR_EP + bool "Renesas R-Car PCIe controller (endpoint mode)" + depends on ARCH_RENESAS || COMPILE_TEST + depends on PCI_ENDPOINT + help + Say Y here if you want PCIe controller support on R-Car SoCs in + endpoint mode. + +config PCI_RCAR_GEN2 + bool "Renesas R-Car Gen2 Internal PCI controller" + depends on ARCH_RENESAS || COMPILE_TEST + depends on ARM + help + Say Y here if you want internal PCI support on R-Car Gen2 SoC. + There are 3 internal PCI controllers available with a single + built-in EHCI/OHCI host controller present on each one. + config PCIE_ROCKCHIP bool depends on PCI @@ -236,114 +293,57 @@ config PCIE_ROCKCHIP_EP endpoint mode on Rockchip SoC. There is 1 internal PCIe port available to support GEN2 with 4 slots. -config PCIE_MEDIATEK - tristate "MediaTek PCIe controller" - depends on ARCH_AIROHA || ARCH_MEDIATEK || COMPILE_TEST +config PCI_V3_SEMI + bool "V3 Semiconductor PCI controller" depends on OF + depends on ARM || COMPILE_TEST + default ARCH_INTEGRATOR_AP + +config PCI_XGENE + bool "X-Gene PCIe controller" + depends on ARM64 || COMPILE_TEST + depends on OF || (ACPI && PCI_QUIRKS) + help + Say Y here if you want internal PCI support on APM X-Gene SoC. + There are 5 internal PCIe ports available. Each port is GEN3 capable + and have varied lanes from x1 to x8. + +config PCI_XGENE_MSI + bool "X-Gene v1 PCIe MSI feature" + depends on PCI_XGENE + depends on PCI_MSI + default y + help + Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC. + This MSI driver supports 5 PCIe ports on the APM X-Gene v1 SoC. + +config PCIE_XILINX + bool "Xilinx AXI PCIe controller" + depends on OF || COMPILE_TEST depends on PCI_MSI help - Say Y here if you want to enable PCIe controller support on - MediaTek SoCs. - -config PCIE_MEDIATEK_GEN3 - tristate "MediaTek Gen3 PCIe controller" - depends on ARCH_MEDIATEK || COMPILE_TEST - depends on PCI_MSI - help - Adds support for PCIe Gen3 MAC controller for MediaTek SoCs. - This PCIe controller is compatible with Gen3, Gen2 and Gen1 speed, - and support up to 256 MSI interrupt numbers for - multi-function devices. - - Say Y here if you want to enable Gen3 PCIe controller support on - MediaTek SoCs. - -config VMD - depends on PCI_MSI && X86_64 && !UML - tristate "Intel Volume Management Device Driver" - help - Adds support for the Intel Volume Management Device (VMD). VMD is a - secondary PCI host bridge that allows PCI Express root ports, - and devices attached to them, to be removed from the default - PCI domain and placed within the VMD domain. This provides - more bus resources than are otherwise possible with a - single domain. If you know your system provides one of these and - has devices attached to it, say Y; if you are not sure, say N. - - To compile this driver as a module, choose M here: the - module will be called vmd. - -config PCIE_BRCMSTB - tristate "Broadcom Brcmstb PCIe controller" - depends on ARCH_BRCMSTB || ARCH_BCM2835 || ARCH_BCMBCA || \ - BMIPS_GENERIC || COMPILE_TEST - depends on OF - depends on PCI_MSI - default ARCH_BRCMSTB || BMIPS_GENERIC - help - Say Y here to enable PCIe host controller support for - Broadcom STB based SoCs, like the Raspberry Pi 4. - -config PCI_HYPERV_INTERFACE - tristate "Microsoft Hyper-V PCI Interface" - depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI - help - The Hyper-V PCI Interface is a helper driver that allows other - drivers to have a common interface with the Hyper-V PCI frontend - driver. - -config PCI_LOONGSON - bool "LOONGSON PCIe controller" - depends on MACH_LOONGSON64 || COMPILE_TEST - depends on OF || ACPI - depends on PCI_QUIRKS - default MACH_LOONGSON64 - help - Say Y here if you want to enable PCI controller support on - Loongson systems. - -config PCIE_MICROCHIP_HOST - bool "Microchip AXI PCIe controller" - depends on PCI_MSI && OF - select PCI_HOST_COMMON - help - Say Y here if you want kernel to support the Microchip AXI PCIe + Say 'Y' here if you want kernel to support the Xilinx AXI PCIe Host Bridge driver. -config PCIE_HISI_ERR - depends on ACPI_APEI_GHES && (ARM64 || COMPILE_TEST) - bool "HiSilicon HIP PCIe controller error handling driver" - help - Say Y here if you want error handling support - for the PCIe controller's errors on HiSilicon HIP SoCs - -config PCIE_APPLE_MSI_DOORBELL_ADDR - hex - default 0xfffff000 - depends on PCIE_APPLE - -config PCIE_APPLE - tristate "Apple PCIe controller" - depends on ARCH_APPLE || COMPILE_TEST - depends on OF +config PCIE_XILINX_NWL + bool "Xilinx NWL PCIe controller" + depends on ARCH_ZYNQMP || COMPILE_TEST depends on PCI_MSI + help + Say 'Y' here if you want kernel support for Xilinx + NWL PCIe controller. The controller can act as Root Port + or End Point. The current option selection will only + support root port enabling. + +config PCIE_XILINX_CPM + bool "Xilinx Versal CPM PCI controller" + depends on ARCH_ZYNQMP || COMPILE_TEST select PCI_HOST_COMMON help - Say Y here if you want to enable PCIe controller support on Apple - system-on-chips, like the Apple M1. This is required for the USB - type-A ports, Ethernet, Wi-Fi, and Bluetooth. - - If unsure, say Y if you have an Apple Silicon system. - -config PCIE_MT7621 - tristate "MediaTek MT7621 PCIe controller" - depends on SOC_MT7621 || COMPILE_TEST - select PHY_MT7621_PCI - default SOC_MT7621 - help - This selects a driver for the MediaTek MT7621 PCIe Controller. + Say 'Y' here if you want kernel support for the + Xilinx Versal CPM host bridge. +source "drivers/pci/controller/cadence/Kconfig" source "drivers/pci/controller/dwc/Kconfig" source "drivers/pci/controller/mobiveil/Kconfig" -source "drivers/pci/controller/cadence/Kconfig" endmenu From patchwork Tue Apr 18 17:43:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 1770413 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=Ye4zKqDa; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Q1B9w3yzYz23tD for ; Wed, 19 Apr 2023 03:44:04 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232575AbjDRRoD (ORCPT ); Tue, 18 Apr 2023 13:44:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232603AbjDRRoC (ORCPT ); Tue, 18 Apr 2023 13:44:02 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C3169EEA; Tue, 18 Apr 2023 10:43:59 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 09AEF63774; Tue, 18 Apr 2023 17:43:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3A657C4339C; Tue, 18 Apr 2023 17:43:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681839838; bh=VFe7w/vnycRWYHKPu1DTbqCJhhPF6tfQJVe3yM8cJOs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ye4zKqDaO8mzIT7AVAh/i5g/N8+rFaU//8YDTfHrwD3DZ/tqvreG5KBM7FXmujkHq W3tAojyDM/87MIrgo80L5cqnybn1/VxHDfD4cw9H0XH4AUqZJoUGcnO4MBPgCMiY9w xWMWcbdGVCRDrgSr7o7rrieiAcUaPmct2EalbzhhTRYayU8MPWogIcEeQgw4N7IFcP 8kQ7g4wWorCSMhE/6WwwlOw1K7I15VO6bHGikvYZ4m4EeWyEUqqWLDBQZG32pHkExD kWHC+wU7zbdhIMD+M24/FX/0oKNpFskqpGmN55cWyFjsJseCiNVUO3FBg/3WKkdVNM PYfMInHSH05+g== From: Bjorn Helgaas To: linux-pci@vger.kernel.org Cc: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-kernel@vger.kernel.org, Bjorn Helgaas Subject: [PATCH 6/7] PCI: dwc: Sort Kconfig entries by vendor Date: Tue, 18 Apr 2023 12:43:35 -0500 Message-Id: <20230418174336.145585-7-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230418174336.145585-1-helgaas@kernel.org> References: <20230418174336.145585-1-helgaas@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Sort Kconfig entries by vendor so they appear in alphabetical order in menuconfig. Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/dwc/Kconfig | 406 ++++++++++++++--------------- 1 file changed, 203 insertions(+), 203 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 4c44ad9f8f2b..ab96da43e0c2 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -14,82 +14,61 @@ config PCIE_DW_EP bool select PCIE_DW -config PCI_DRA7XX - tristate - -config PCI_DRA7XX_HOST - tristate "TI DRA7xx PCIe controller (host mode)" - depends on SOC_DRA7XX || COMPILE_TEST - depends on OF && HAS_IOMEM && TI_PIPE3 +config PCIE_AL + bool "Amazon Annapurna Labs PCIe controller" + depends on OF && (ARM64 || COMPILE_TEST) depends on PCI_MSI select PCIE_DW_HOST - select PCI_DRA7XX - default y if SOC_DRA7XX + select PCI_ECAM help - Enables support for the PCIe controller in the DRA7xx SoC to work in - host mode. There are two instances of PCIe controller in DRA7xx. - This controller can work either as EP or RC. In order to enable - host-specific features PCI_DRA7XX_HOST must be selected and in order - to enable device-specific features PCI_DRA7XX_EP must be selected. - This uses the DesignWare core. + Say Y here to enable support of the Amazon's Annapurna Labs PCIe + controller IP on Amazon SoCs. The PCIe controller uses the DesignWare + core plus Annapurna Labs proprietary hardware wrappers. This is + required only for DT-based platforms. ACPI platforms with the + Annapurna Labs PCIe controller don't need to enable this. -config PCI_DRA7XX_EP - tristate "TI DRA7xx PCIe controller (endpoint mode)" - depends on SOC_DRA7XX || COMPILE_TEST - depends on OF && HAS_IOMEM && TI_PIPE3 - depends on PCI_ENDPOINT - select PCIE_DW_EP - select PCI_DRA7XX +config PCI_MESON + tristate "Amlogic Meson PCIe controller" + default m if ARCH_MESON + depends on PCI_MSI + select PCIE_DW_HOST help - Enables support for the PCIe controller in the DRA7xx SoC to work in - endpoint mode. There are two instances of PCIe controller in DRA7xx. - This controller can work either as EP or RC. In order to enable - host-specific features PCI_DRA7XX_HOST must be selected and in order - to enable device-specific features PCI_DRA7XX_EP must be selected. - This uses the DesignWare core. + Say Y here if you want to enable PCI controller support on Amlogic + SoCs. The PCI controller on Amlogic is based on DesignWare hardware + and therefore the driver re-uses the DesignWare core functions to + implement the driver. -config PCIE_DW_PLAT +config PCIE_ARTPEC6 bool -config PCIE_DW_PLAT_HOST - bool "Platform bus based DesignWare PCIe controller (host mode)" +config PCIE_ARTPEC6_HOST + bool "Axis ARTPEC-6 PCIe controller (host mode)" + depends on MACH_ARTPEC6 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST - select PCIE_DW_PLAT + select PCIE_ARTPEC6 help - Enables support for the PCIe controller in the Designware IP to - work in host mode. There are two instances of PCIe controller in - Designware IP. - This controller can work either as EP or RC. In order to enable - host-specific features PCIE_DW_PLAT_HOST must be selected and in - order to enable device-specific features PCI_DW_PLAT_EP must be - selected. + Enables support for the PCIe controller in the ARTPEC-6 SoC to work in + host mode. This uses the DesignWare core. -config PCIE_DW_PLAT_EP - bool "Platform bus based DesignWare PCIe controller (endpoint mode)" - depends on PCI && PCI_MSI +config PCIE_ARTPEC6_EP + bool "Axis ARTPEC-6 PCIe controller (endpoint mode)" + depends on MACH_ARTPEC6 || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP - select PCIE_DW_PLAT + select PCIE_ARTPEC6 help - Enables support for the PCIe controller in the Designware IP to - work in endpoint mode. There are two instances of PCIe controller - in Designware IP. - This controller can work either as EP or RC. In order to enable - host-specific features PCIE_DW_PLAT_HOST must be selected and in - order to enable device-specific features PCI_DW_PLAT_EP must be - selected. + Enables support for the PCIe controller in the ARTPEC-6 SoC to work in + endpoint mode. This uses the DesignWare core. -config PCI_EXYNOS - tristate "Samsung Exynos PCIe controller" - depends on ARCH_EXYNOS || COMPILE_TEST +config PCIE_BT1 + tristate "Baikal-T1 PCIe controller" + depends on MIPS_BAIKAL_T1 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST help - Enables support for the PCIe controller in the Samsung Exynos SoCs - to work in host mode. The PCI controller is based on the DesignWare - hardware and therefore the driver re-uses the DesignWare core - functions to implement the driver. + Enables support for the PCIe controller in the Baikal-T1 SoC to work + in host mode. It's based on the Synopsys DWC PCIe v4.60a IP-core. config PCI_IMX6 bool @@ -118,41 +97,6 @@ config PCI_IMX6_EP on DesignWare hardware and therefore the driver re-uses the DesignWare core functions to implement the driver. -config PCIE_SPEAR13XX - bool "STMicroelectronics SPEAr PCIe controller" - depends on ARCH_SPEAR13XX || COMPILE_TEST - depends on PCI_MSI - select PCIE_DW_HOST - help - Say Y here if you want PCIe support on SPEAr13XX SoCs. - -config PCI_KEYSTONE - bool - -config PCI_KEYSTONE_HOST - bool "TI Keystone PCIe controller (host mode)" - depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST - depends on PCI_MSI - select PCIE_DW_HOST - select PCI_KEYSTONE - help - Enables support for the PCIe controller in the Keystone SoC to - work in host mode. The PCI controller on Keystone is based on - DesignWare hardware and therefore the driver re-uses the - DesignWare core functions to implement the driver. - -config PCI_KEYSTONE_EP - bool "TI Keystone PCIe controller (endpoint mode)" - depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST - depends on PCI_ENDPOINT - select PCIE_DW_EP - select PCI_KEYSTONE - help - Enables support for the PCIe controller in the Keystone SoC to - work in endpoint mode. The PCI controller on Keystone is based - on DesignWare hardware and therefore the driver re-uses the - DesignWare core functions to implement the driver. - config PCI_LAYERSCAPE bool "Freescale Layerscape PCIe controller (host mode)" depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) @@ -188,80 +132,23 @@ config PCI_HISI Say Y here if you want PCIe controller support on HiSilicon Hip05 and Hip06 SoCs -config PCIE_QCOM - bool "Qualcomm PCIe controller (host mode)" - depends on OF && (ARCH_QCOM || COMPILE_TEST) +config PCIE_KIRIN + depends on OF && (ARM64 || COMPILE_TEST) + tristate "HiSilicon Kirin PCIe controller" depends on PCI_MSI select PCIE_DW_HOST - select CRC8 + select REGMAP_MMIO help - Say Y here to enable PCIe controller support on Qualcomm SoCs. The - PCIe controller uses the DesignWare core plus Qualcomm-specific - hardware wrappers. + Say Y here if you want PCIe controller support + on HiSilicon Kirin series SoCs. -config PCIE_QCOM_EP - tristate "Qualcomm PCIe controller (endpoint mode)" - depends on OF && (ARCH_QCOM || COMPILE_TEST) - depends on PCI_ENDPOINT - select PCIE_DW_EP - help - Say Y here to enable support for the PCIe controllers on Qualcomm SoCs - to work in endpoint mode. The PCIe controller uses the DesignWare core - plus Qualcomm-specific hardware wrappers. - -config PCIE_ARMADA_8K - bool "Marvell Armada-8K PCIe controller" - depends on ARCH_MVEBU || COMPILE_TEST +config PCIE_HISI_STB + bool "HiSilicon STB PCIe controller" + depends on ARCH_HISI || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST help - Say Y here if you want to enable PCIe controller support on - Armada-8K SoCs. The PCIe controller on Armada-8K is based on - DesignWare hardware and therefore the driver re-uses the - DesignWare core functions to implement the driver. - -config PCIE_ARTPEC6 - bool - -config PCIE_ARTPEC6_HOST - bool "Axis ARTPEC-6 PCIe controller (host mode)" - depends on MACH_ARTPEC6 || COMPILE_TEST - depends on PCI_MSI - select PCIE_DW_HOST - select PCIE_ARTPEC6 - help - Enables support for the PCIe controller in the ARTPEC-6 SoC to work in - host mode. This uses the DesignWare core. - -config PCIE_ARTPEC6_EP - bool "Axis ARTPEC-6 PCIe controller (endpoint mode)" - depends on MACH_ARTPEC6 || COMPILE_TEST - depends on PCI_ENDPOINT - select PCIE_DW_EP - select PCIE_ARTPEC6 - help - Enables support for the PCIe controller in the ARTPEC-6 SoC to work in - endpoint mode. This uses the DesignWare core. - -config PCIE_BT1 - tristate "Baikal-T1 PCIe controller" - depends on MIPS_BAIKAL_T1 || COMPILE_TEST - depends on PCI_MSI - select PCIE_DW_HOST - help - Enables support for the PCIe controller in the Baikal-T1 SoC to work - in host mode. It's based on the Synopsys DWC PCIe v4.60a IP-core. - -config PCIE_ROCKCHIP_DW_HOST - bool "Rockchip DesignWare PCIe controller" - select PCIE_DW - select PCIE_DW_HOST - depends on PCI_MSI - depends on ARCH_ROCKCHIP || COMPILE_TEST - depends on OF - help - Enables support for the DesignWare PCIe controller in the - Rockchip SoC except RK3399. + Say Y here if you want PCIe controller support on HiSilicon STB SoCs config PCIE_INTEL_GW bool "Intel Gateway PCIe controller " @@ -302,34 +189,16 @@ config PCIE_KEEMBAY_EP The PCIe controller is based on DesignWare Hardware and uses DesignWare core functions. -config PCIE_KIRIN - depends on OF && (ARM64 || COMPILE_TEST) - tristate "HiSilicon Kirin PCIe controller" - depends on PCI_MSI - select PCIE_DW_HOST - select REGMAP_MMIO - help - Say Y here if you want PCIe controller support - on HiSilicon Kirin series SoCs. - -config PCIE_HISI_STB - bool "HiSilicon STB PCIe controller" - depends on ARCH_HISI || COMPILE_TEST +config PCIE_ARMADA_8K + bool "Marvell Armada-8K PCIe controller" + depends on ARCH_MVEBU || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST help - Say Y here if you want PCIe controller support on HiSilicon STB SoCs - -config PCI_MESON - tristate "Amlogic Meson PCIe controller" - default m if ARCH_MESON - depends on PCI_MSI - select PCIE_DW_HOST - help - Say Y here if you want to enable PCI controller support on Amlogic - SoCs. The PCI controller on Amlogic is based on DesignWare hardware - and therefore the driver re-uses the DesignWare core functions to - implement the driver. + Say Y here if you want to enable PCIe controller support on + Armada-8K SoCs. The PCIe controller on Armada-8K is based on + DesignWare hardware and therefore the driver re-uses the + DesignWare core functions to implement the driver. config PCIE_TEGRA194 tristate @@ -364,14 +233,89 @@ config PCIE_TEGRA194_EP in order to enable device-specific features PCIE_TEGRA194_EP must be selected. This uses the DesignWare core. -config PCIE_VISCONTI_HOST - bool "Toshiba Visconti PCIe controller" - depends on ARCH_VISCONTI || COMPILE_TEST +config PCIE_DW_PLAT + bool + +config PCIE_DW_PLAT_HOST + bool "Platform bus based DesignWare PCIe controller (host mode)" + depends on PCI_MSI + select PCIE_DW_HOST + select PCIE_DW_PLAT + help + Enables support for the PCIe controller in the Designware IP to + work in host mode. There are two instances of PCIe controller in + Designware IP. + This controller can work either as EP or RC. In order to enable + host-specific features PCIE_DW_PLAT_HOST must be selected and in + order to enable device-specific features PCI_DW_PLAT_EP must be + selected. + +config PCIE_DW_PLAT_EP + bool "Platform bus based DesignWare PCIe controller (endpoint mode)" + depends on PCI && PCI_MSI + depends on PCI_ENDPOINT + select PCIE_DW_EP + select PCIE_DW_PLAT + help + Enables support for the PCIe controller in the Designware IP to + work in endpoint mode. There are two instances of PCIe controller + in Designware IP. + This controller can work either as EP or RC. In order to enable + host-specific features PCIE_DW_PLAT_HOST must be selected and in + order to enable device-specific features PCI_DW_PLAT_EP must be + selected. + +config PCIE_QCOM + bool "Qualcomm PCIe controller (host mode)" + depends on OF && (ARCH_QCOM || COMPILE_TEST) + depends on PCI_MSI + select PCIE_DW_HOST + select CRC8 + help + Say Y here to enable PCIe controller support on Qualcomm SoCs. The + PCIe controller uses the DesignWare core plus Qualcomm-specific + hardware wrappers. + +config PCIE_QCOM_EP + tristate "Qualcomm PCIe controller (endpoint mode)" + depends on OF && (ARCH_QCOM || COMPILE_TEST) + depends on PCI_ENDPOINT + select PCIE_DW_EP + help + Say Y here to enable support for the PCIe controllers on Qualcomm SoCs + to work in endpoint mode. The PCIe controller uses the DesignWare core + plus Qualcomm-specific hardware wrappers. + +config PCIE_ROCKCHIP_DW_HOST + bool "Rockchip DesignWare PCIe controller" + select PCIE_DW + select PCIE_DW_HOST + depends on PCI_MSI + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on OF + help + Enables support for the DesignWare PCIe controller in the + Rockchip SoC except RK3399. + +config PCI_EXYNOS + tristate "Samsung Exynos PCIe controller" + depends on ARCH_EXYNOS || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST help - Say Y here if you want PCIe controller support on Toshiba Visconti SoC. - This driver supports TMPV7708 SoC. + Enables support for the PCIe controller in the Samsung Exynos SoCs + to work in host mode. The PCI controller is based on the DesignWare + hardware and therefore the driver re-uses the DesignWare core + functions to implement the driver. + +config PCIE_FU740 + bool "SiFive FU740 PCIe controller" + depends on PCI_MSI + depends on SOC_SIFIVE || COMPILE_TEST + select PCIE_DW_HOST + help + Say Y here if you want PCIe controller support for the SiFive + FU740. config PCIE_UNIPHIER bool "Socionext UniPhier PCIe controller (host mode)" @@ -393,26 +337,82 @@ config PCIE_UNIPHIER_EP Say Y here if you want PCIe endpoint controller support on UniPhier SoCs. This driver supports Pro5 SoC. -config PCIE_AL - bool "Amazon Annapurna Labs PCIe controller" - depends on OF && (ARM64 || COMPILE_TEST) +config PCIE_SPEAR13XX + bool "STMicroelectronics SPEAr PCIe controller" + depends on ARCH_SPEAR13XX || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST - select PCI_ECAM help - Say Y here to enable support of the Amazon's Annapurna Labs PCIe - controller IP on Amazon SoCs. The PCIe controller uses the DesignWare - core plus Annapurna Labs proprietary hardware wrappers. This is - required only for DT-based platforms. ACPI platforms with the - Annapurna Labs PCIe controller don't need to enable this. + Say Y here if you want PCIe support on SPEAr13XX SoCs. -config PCIE_FU740 - bool "SiFive FU740 PCIe controller" +config PCI_DRA7XX + tristate + +config PCI_DRA7XX_HOST + tristate "TI DRA7xx PCIe controller (host mode)" + depends on SOC_DRA7XX || COMPILE_TEST + depends on OF && HAS_IOMEM && TI_PIPE3 + depends on PCI_MSI + select PCIE_DW_HOST + select PCI_DRA7XX + default y if SOC_DRA7XX + help + Enables support for the PCIe controller in the DRA7xx SoC to work in + host mode. There are two instances of PCIe controller in DRA7xx. + This controller can work either as EP or RC. In order to enable + host-specific features PCI_DRA7XX_HOST must be selected and in order + to enable device-specific features PCI_DRA7XX_EP must be selected. + This uses the DesignWare core. + +config PCI_DRA7XX_EP + tristate "TI DRA7xx PCIe controller (endpoint mode)" + depends on SOC_DRA7XX || COMPILE_TEST + depends on OF && HAS_IOMEM && TI_PIPE3 + depends on PCI_ENDPOINT + select PCIE_DW_EP + select PCI_DRA7XX + help + Enables support for the PCIe controller in the DRA7xx SoC to work in + endpoint mode. There are two instances of PCIe controller in DRA7xx. + This controller can work either as EP or RC. In order to enable + host-specific features PCI_DRA7XX_HOST must be selected and in order + to enable device-specific features PCI_DRA7XX_EP must be selected. + This uses the DesignWare core. + +config PCI_KEYSTONE + bool + +config PCI_KEYSTONE_HOST + bool "TI Keystone PCIe controller (host mode)" + depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST + depends on PCI_MSI + select PCIE_DW_HOST + select PCI_KEYSTONE + help + Enables support for the PCIe controller in the Keystone SoC to + work in host mode. The PCI controller on Keystone is based on + DesignWare hardware and therefore the driver re-uses the + DesignWare core functions to implement the driver. + +config PCI_KEYSTONE_EP + bool "TI Keystone PCIe controller (endpoint mode)" + depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST + depends on PCI_ENDPOINT + select PCIE_DW_EP + select PCI_KEYSTONE + help + Enables support for the PCIe controller in the Keystone SoC to + work in endpoint mode. The PCI controller on Keystone is based + on DesignWare hardware and therefore the driver re-uses the + DesignWare core functions to implement the driver. + +config PCIE_VISCONTI_HOST + bool "Toshiba Visconti PCIe controller" + depends on ARCH_VISCONTI || COMPILE_TEST depends on PCI_MSI - depends on SOC_SIFIVE || COMPILE_TEST select PCIE_DW_HOST help - Say Y here if you want PCIe controller support for the SiFive - FU740. + Say Y here if you want PCIe controller support on Toshiba Visconti SoC. + This driver supports TMPV7708 SoC. endmenu From patchwork Tue Apr 18 17:43:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Helgaas X-Patchwork-Id: 1770415 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=rF/gQUn+; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Q1B9y1JdRz23tD for ; Wed, 19 Apr 2023 03:44:06 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232640AbjDRRoE (ORCPT ); Tue, 18 Apr 2023 13:44:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232641AbjDRRoC (ORCPT ); Tue, 18 Apr 2023 13:44:02 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 32C677AAC; Tue, 18 Apr 2023 10:44:01 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id C1D7C63778; Tue, 18 Apr 2023 17:44:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0249EC433EF; Tue, 18 Apr 2023 17:43:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1681839840; bh=7R/G7Jf8ZUVBVuhsZpi+xJYmZ4Ot/a0lMhqEHtI/eU8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=rF/gQUn+GXbZFIbkhgRNNFi+ZEvDf3npXbjXmJWe/ZZtnrOFR+v+eayCgBOUWcz/S 0YgU4hs6Ia+sc1TGqFsZe6LOARqZC6/dwkisn2ItdF4xENDc6wwQlfeUUvR3RpmWj0 MiPpTxjL4loi9Y+3vZvcHRomKJLsonXMjZSvy5g7vCSWNgC/5V0onMy+Ckal/wzSJj +RXv+HhHJDRdfW+zJU8AHBWsH3TFeIBbuE8PMjeUgeV2wVO8TfRdqc2gOiy7Gv0ew5 VIy04yxbm1NX4Cigqapfc9039U5ob+pd4Sa3ZNvvPgnMujp7pk96e9Bh52qBVLn6+h HYd8ecy+SjLrg== From: Bjorn Helgaas To: linux-pci@vger.kernel.org Cc: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-kernel@vger.kernel.org, Bjorn Helgaas Subject: [PATCH 7/7] PCI: mobiveil: Sort Kconfig entries by vendor Date: Tue, 18 Apr 2023 12:43:36 -0500 Message-Id: <20230418174336.145585-8-helgaas@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230418174336.145585-1-helgaas@kernel.org> References: <20230418174336.145585-1-helgaas@kernel.org> MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bjorn Helgaas Sort Kconfig entries by vendor so they appear in alphabetical order in menuconfig. Signed-off-by: Bjorn Helgaas --- drivers/pci/controller/mobiveil/Kconfig | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/mobiveil/Kconfig b/drivers/pci/controller/mobiveil/Kconfig index bc9c624cf619..58ce034f701a 100644 --- a/drivers/pci/controller/mobiveil/Kconfig +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -11,6 +11,15 @@ config PCIE_MOBIVEIL_HOST depends on PCI_MSI select PCIE_MOBIVEIL +config PCIE_LAYERSCAPE_GEN4 + bool "Freescale Layerscape Gen4 PCIe controller" + depends on ARCH_LAYERSCAPE || COMPILE_TEST + depends on PCI_MSI + select PCIE_MOBIVEIL_HOST + help + Say Y here if you want PCIe Gen4 controller support on + Layerscape SoCs. + config PCIE_MOBIVEIL_PLAT bool "Mobiveil AXI PCIe controller" depends on ARCH_ZYNQMP || COMPILE_TEST @@ -22,12 +31,4 @@ config PCIE_MOBIVEIL_PLAT Soft IP. It has up to 8 outbound and inbound windows for address translation and it is a PCIe Gen4 IP. -config PCIE_LAYERSCAPE_GEN4 - bool "Freescale Layerscape Gen4 PCIe controller" - depends on ARCH_LAYERSCAPE || COMPILE_TEST - depends on PCI_MSI - select PCIE_MOBIVEIL_HOST - help - Say Y here if you want PCIe Gen4 controller support on - Layerscape SoCs. endmenu