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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:15 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass , Andrejs Cainikovs , Andrew Scull , Daniel Schwierzeck , Fabio Estevam , Francesco Dolcini , Gaurav Jain , Jacky Bai , Jian Li , Leo , Marek Vasut , Michal Simek , Michal Suchanek , "NXP i.MX U-Boot Team" , Nikita Shubin , Ovidiu Panait , Padmarao Begari , =?utf-8?q?Pali_Roh=C3=A1r?= , Pavel Herrmann , Peng Fan , Rasmus Villemoes , Rick Chen , Stefano Babic , Thomas Chou , Ye Li , Yu Chien Peter Lin Subject: [PATCH v2 01/18] dm: Emit the arch_cpu_init_dm() even only before relocation Date: Wed, 19 Apr 2023 03:30:44 +1200 Message-ID: <20230418153101.115816-2-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The original function was only called once, before relocation. The new one is called again after relocation. This was not the intend of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f ("event: Convert arch_cpu_init_dm() to") Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/arm/mach-imx/imx8/cpu.c | 2 +- arch/arm/mach-imx/imx8m/soc.c | 2 +- arch/arm/mach-imx/imx8ulp/soc.c | 2 +- arch/arm/mach-imx/imx9/soc.c | 2 +- arch/arm/mach-omap2/am33xx/board.c | 2 +- arch/arm/mach-omap2/hwinit-common.c | 2 +- arch/mips/mach-pic32/cpu.c | 2 +- arch/nios2/cpu/cpu.c | 2 +- arch/riscv/cpu/cpu.c | 2 +- arch/x86/cpu/baytrail/cpu.c | 2 +- arch/x86/cpu/broadwell/cpu.c | 2 +- arch/x86/cpu/ivybridge/cpu.c | 2 +- arch/x86/cpu/quark/quark.c | 2 +- arch/x86/lib/fsp2/fsp_init.c | 2 +- doc/develop/event.rst | 6 +++--- drivers/core/root.c | 4 ++-- drivers/cpu/microblaze_cpu.c | 2 +- include/event.h | 2 +- 18 files changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index be1f4edded10..99772f68c32b 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -89,7 +89,7 @@ static int imx8_init_mu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, imx8_init_mu); +EVENT_SPY(EVT_DM_POST_INIT_F, imx8_init_mu); #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index df865e997d38..903620ad6a83 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -549,7 +549,7 @@ static int imx8m_check_clock(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock); +EVENT_SPY(EVT_DM_POST_INIT_F, imx8m_check_clock); static void imx8m_setup_snvs(void) { diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 8424332f4299..81eae02b6a8f 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -808,7 +808,7 @@ static int imx8ulp_evt_dm_post_init(void *ctx, struct event *event) { return imx8ulp_dm_post_init(); } -EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_evt_dm_post_init); +EVENT_SPY(EVT_DM_POST_INIT_F, imx8ulp_evt_dm_post_init); #if defined(CONFIG_SPL_BUILD) __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index a16e22ea6bbf..252663a9eec2 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -262,7 +262,7 @@ int imx9_probe_mu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, imx9_probe_mu); +EVENT_SPY(EVT_DM_POST_INIT_F, imx9_probe_mu); int timer_init(void) { diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index a52d04d85c8a..ecc0a592e993 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -535,4 +535,4 @@ static int am33xx_dm_post_init(void *ctx, struct event *event) #endif return 0; } -EVENT_SPY(EVT_DM_POST_INIT, am33xx_dm_post_init); +EVENT_SPY(EVT_DM_POST_INIT_F, am33xx_dm_post_init); diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index c4a8eabc3ebe..771533394bcd 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -246,7 +246,7 @@ static int omap2_system_init(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, omap2_system_init); +EVENT_SPY(EVT_DM_POST_INIT_F, omap2_system_init); /* * Routine: wait_for_command_complete diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c index de449e3c6a20..ec3c2505313c 100644 --- a/arch/mips/mach-pic32/cpu.c +++ b/arch/mips/mach-pic32/cpu.c @@ -102,7 +102,7 @@ static int pic32_flash_prefetch(void *ctx, struct event *event) prefetch_init(); return 0; } -EVENT_SPY(EVT_DM_POST_INIT, pic32_flash_prefetch); +EVENT_SPY(EVT_DM_POST_INIT_F, pic32_flash_prefetch); /* Un-gate DDR2 modules (gated by default) */ static void ddr2_pmd_ungate(void) diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c index 85544503a5ee..da167f4b29e9 100644 --- a/arch/nios2/cpu/cpu.c +++ b/arch/nios2/cpu/cpu.c @@ -80,7 +80,7 @@ static int nios_cpu_setup(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, nios_cpu_setup); +EVENT_SPY(EVT_DM_POST_INIT_F, nios_cpu_setup); static int altera_nios2_get_desc(const struct udevice *dev, char *buf, int size) diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index e1ed4ec01d04..ecfb1fb08c4b 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -145,7 +145,7 @@ int riscv_cpu_setup(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, riscv_cpu_setup); +EVENT_SPY(EVT_DM_POST_INIT_F, riscv_cpu_setup); int arch_early_init_r(void) { diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 4fb6a485542f..4a7b4f617f8a 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -64,7 +64,7 @@ static int baytrail_uart_init(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, baytrail_uart_init); +EVENT_SPY(EVT_DM_POST_INIT_F, baytrail_uart_init); static void set_max_freq(void) { diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 7877961451a6..f30aebfe4c62 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -40,7 +40,7 @@ static int broadwell_init_cpu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu); +EVENT_SPY(EVT_DM_POST_INIT_F, broadwell_init_cpu); void set_max_freq(void) { diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index cffc5d5b1d86..c988d7ff477f 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -86,7 +86,7 @@ static int ivybridge_cpu_init(void *ctx, struct event *ev) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, ivybridge_cpu_init); +EVENT_SPY(EVT_DM_POST_INIT_F, ivybridge_cpu_init); #define PCH_EHCI0_TEMP_BAR0 0xe8000000 #define PCH_EHCI1_TEMP_BAR0 0xe8000400 diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 0a1fbb34d40d..1be8e38cdf41 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -263,7 +263,7 @@ static int quark_init_pcie(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, quark_init_pcie); +EVENT_SPY(EVT_DM_POST_INIT_F, quark_init_pcie); int checkcpu(void) { diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index b15926e8247b..afec7d08d67f 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -42,7 +42,7 @@ int fsp_setup_pinctrl(void *ctx, struct event *event) return ret; } -EVENT_SPY(EVT_DM_POST_INIT, fsp_setup_pinctrl); +EVENT_SPY(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); #if !defined(CONFIG_TPL_BUILD) binman_sym_declare(ulong, intel_fsp_m, image_pos); diff --git a/doc/develop/event.rst b/doc/develop/event.rst index 4ff593483715..4c34fffc63bc 100644 --- a/doc/develop/event.rst +++ b/doc/develop/event.rst @@ -11,7 +11,7 @@ block device is probed. Rather than using weak functions and direct calls across subsystemss, it is often easier to use an event. -An event consists of a type (e.g. EVT_DM_POST_INIT) and some optional data, +An event consists of a type (e.g. EVT_DM_POST_INIT_F) and some optional data, in `union event_data`. An event spy can be creasted to watch for events of a particular type. When the event is created, it is sent to each spy in turn. @@ -26,9 +26,9 @@ To declare a spy, use something like this:: /* do something */ return 0; } - EVENT_SPY(EVT_DM_POST_INIT, snow_setup_cpus); + EVENT_SPY(EVT_DM_POST_INIT_F, snow_setup_cpus); -Your function is called when EVT_DM_POST_INIT is emitted, i.e. after driver +Your function is called when EVT_DM_POST_INIT_F is emitted, i.e. after driver model is inited (in SPL, or in U-Boot proper before and after relocation). diff --git a/drivers/core/root.c b/drivers/core/root.c index c4fb48548bb3..6775fb0b6575 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -436,8 +436,8 @@ int dm_init_and_scan(bool pre_reloc_only) return ret; } } - if (CONFIG_IS_ENABLED(DM_EVENT)) { - ret = event_notify_null(EVT_DM_POST_INIT); + if (CONFIG_IS_ENABLED(DM_EVENT) && !(gd->flags & GD_FLG_RELOC)) { + ret = event_notify_null(EVT_DM_POST_INIT_F); if (ret) return log_msg_ret("ev", ret); } diff --git a/drivers/cpu/microblaze_cpu.c b/drivers/cpu/microblaze_cpu.c index b9d07928223f..c97a89fbd5c8 100644 --- a/drivers/cpu/microblaze_cpu.c +++ b/drivers/cpu/microblaze_cpu.c @@ -29,7 +29,7 @@ static int microblaze_cpu_probe_all(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, microblaze_cpu_probe_all); +EVENT_SPY(EVT_DM_POST_INIT_F, microblaze_cpu_probe_all); static void microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo *ci) { diff --git a/include/event.h b/include/event.h index e4580b683502..fe41080fa63b 100644 --- a/include/event.h +++ b/include/event.h @@ -22,7 +22,7 @@ enum event_t { EVT_TEST, /* Events related to driver model */ - EVT_DM_POST_INIT, + EVT_DM_POST_INIT_F, EVT_DM_PRE_PROBE, EVT_DM_POST_PROBE, EVT_DM_PRE_REMOVE, From patchwork Tue Apr 18 15:30:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770303 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:16 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass , Alper Nebi Yasak , Neha Malcom Francis , Peng Fan , Philippe Reynes , Stefan Herbrechtsmeier Subject: [PATCH v2 02/18] binman: Support writing symbols for ucode etypes Date: Wed, 19 Apr 2023 03:30:45 +1200 Message-ID: <20230418153101.115816-3-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Allow symbol writing in these cases so that U-Boot can find the position and size of U-Boot at runtime. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 2 +- tools/binman/etype/u_boot_tpl_with_ucode_ptr.py | 2 +- tools/binman/etype/u_boot_with_ucode_ptr.py | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/binman/etype/u_boot_spl_with_ucode_ptr.py b/tools/binman/etype/u_boot_spl_with_ucode_ptr.py index 72739a5eb67b..18b99b00f4a0 100644 --- a/tools/binman/etype/u_boot_spl_with_ucode_ptr.py +++ b/tools/binman/etype/u_boot_spl_with_ucode_ptr.py @@ -18,7 +18,7 @@ class Entry_u_boot_spl_with_ucode_ptr(Entry_u_boot_with_ucode_ptr): process. """ def __init__(self, section, etype, node): - super().__init__(section, etype, node) + super().__init__(section, etype, node, auto_write_symbols=True) self.elf_fname = 'spl/u-boot-spl' def GetDefaultFilename(self): diff --git a/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py b/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py index 86f9578b714e..f8cc22011ce9 100644 --- a/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py +++ b/tools/binman/etype/u_boot_tpl_with_ucode_ptr.py @@ -20,7 +20,7 @@ class Entry_u_boot_tpl_with_ucode_ptr(Entry_u_boot_with_ucode_ptr): process. """ def __init__(self, section, etype, node): - super().__init__(section, etype, node) + super().__init__(section, etype, node, auto_write_symbols=True) self.elf_fname = 'tpl/u-boot-tpl' def GetDefaultFilename(self): diff --git a/tools/binman/etype/u_boot_with_ucode_ptr.py b/tools/binman/etype/u_boot_with_ucode_ptr.py index 41731fd0e134..aab27ac8ee7c 100644 --- a/tools/binman/etype/u_boot_with_ucode_ptr.py +++ b/tools/binman/etype/u_boot_with_ucode_ptr.py @@ -28,8 +28,8 @@ class Entry_u_boot_with_ucode_ptr(Entry_blob): microcode, to allow early x86 boot code to find it without doing anything complicated. Otherwise it is the same as the u-boot entry. """ - def __init__(self, section, etype, node): - super().__init__(section, etype, node) + def __init__(self, section, etype, node, auto_write_symbols=False): + super().__init__(section, etype, node, auto_write_symbols) self.elf_fname = 'u-boot' self.target_offset = None From patchwork Tue Apr 18 15:30:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770301 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=HoDD9OZ0; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17Dv1p97z23tW for ; Wed, 19 Apr 2023 01:31:27 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1A0AA860C2; Tue, 18 Apr 2023 17:31:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="HoDD9OZ0"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 20137860E9; Tue, 18 Apr 2023 17:31:21 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd35.google.com (mail-io1-xd35.google.com [IPv6:2607:f8b0:4864:20::d35]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A2D12860A9 for ; Tue, 18 Apr 2023 17:31:18 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd35.google.com with SMTP id ca18e2360f4ac-7606ce89ebcso98091339f.0 for ; Tue, 18 Apr 2023 08:31:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831877; x=1684423877; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xxAD8toWlK3Xo/zV3BD3XGvvvr698trvJwX4Y4d+LG4=; b=HoDD9OZ0Es79ejMToG8X2CNQ9h1UQ9HYbBhcCPVVCfQX95i+EGA6C4m+UYU/nYijTy m9NCuEIwG/t7lQJpVLXFdoOlYHhYSG2IUzXiVykCvjkXX/6BGnTzQyZOc5LVA6OQvbpx 114Uv2XHJ8oeHsOytZiCtfR9sRAqZgJDhJxDo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831877; x=1684423877; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xxAD8toWlK3Xo/zV3BD3XGvvvr698trvJwX4Y4d+LG4=; b=AYgldknKa7ewT8BEhlGiAgCUoOpHG+lXKVi9KAs8aaK4u9GytEKOlTdEdziq33znAT cQ8/gXD4Bomu0rln43NT1HdYc7EeN2wLtbp3WTnAKTnhYs0RWVD3GrLreZttq09ZBpSj 0wxnjYXbZvNWU5B8sQ3xnJms/sFeexS7KiMWXCmJ3KmrNM10brMJvRSl02NFCgaWO4A0 CS0kt19VlF57plWqIl0MJzRXLF0H1LIeMIJpGq7tAF9LFfssF3ndKDndlnkgSXEqgCOQ vN6U06wQlcUqkxdTQV5w2Am4zGJjaZBvk5B/bqtu8lmvGS9iSn4bGoyKv5mCYi2kh/7Q 3jZA== X-Gm-Message-State: AAQBX9dIeX0N4IdCRaE2+MK1U8lgVEwtaXFt6AnpO/TUhh5mT3OGpuGJ XmoNDriDWVkieBs/ibL2XIK/eh+ocYLWK+xAjyE= X-Google-Smtp-Source: AKy350ZkTCIieJlVuy8abCsoJsy2wZeVTgfme0Qh9eE8poNK4Lbysx9FgfY1aALE+YU3QdcIul5QVw== X-Received: by 2002:a05:6602:314e:b0:761:22af:1e35 with SMTP id m14-20020a056602314e00b0076122af1e35mr2283815ioy.1.1681831877235; Tue, 18 Apr 2023 08:31:17 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:16 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass , Jagan Teki , Mike Frysinger , Vignesh R Subject: [PATCH v2 03/18] sf: Guard against zero erasesize Date: Wed, 19 Apr 2023 03:30:46 +1200 Message-ID: <20230418153101.115816-4-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean With tiny SPI flash the erasesize is 0 which can cause a divide-by-zero error. Check for this and returns a proper error instead. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) drivers/mtd/spi/sf_probe.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index e192f97efdc4..de6516f1065b 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -189,7 +189,8 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) struct mtd_info *mtd = &flash->mtd; struct erase_info instr; - if (offset % mtd->erasesize || len % mtd->erasesize) { + if (!mtd->erasesize || + (offset % mtd->erasesize || len % mtd->erasesize)) { debug("SF: Erase offset/length not multiple of erase size\n"); return -EINVAL; } From patchwork Tue Apr 18 15:30:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770311 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=O2m0nAdz; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17G61Td2z23tD for ; Wed, 19 Apr 2023 01:32:30 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E6006860AF; Tue, 18 Apr 2023 17:31:30 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="O2m0nAdz"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BFF07860B3; Tue, 18 Apr 2023 17:31:23 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd36.google.com (mail-io1-xd36.google.com [IPv6:2607:f8b0:4864:20::d36]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B90C18608F for ; Tue, 18 Apr 2023 17:31:19 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd36.google.com with SMTP id ca18e2360f4ac-76016d1fe6bso279811539f.3 for ; Tue, 18 Apr 2023 08:31:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831878; x=1684423878; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nLVmYHWkgWHjRpbxM+PLagGuItQRQ/3QDz2FD2RP4gU=; b=O2m0nAdzQfML8BqUKUclUcPhIQRPMcSKjoCxieSz75whCsYVTf3ezIHuvuGTVCL6zc Yk5SBsFmgNuAknhQHPUSaq/D/EWXxki+gKtFRwYPOhcVVClLGpHD8QyuiRv8E6HjCJ6T DGhKnp93KPKCzGv4gDSL6qpmZksjME3oBnqSA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831878; x=1684423878; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nLVmYHWkgWHjRpbxM+PLagGuItQRQ/3QDz2FD2RP4gU=; b=Yaw6/Pdm6rCI8c+L0Zv2Kbes16m3nOQFxikCTJUIj0/Af6sAInFMCwt463NypZ3Wuf Ogn1EHhsTNmL3/pFdeniEbkIr35mdebW2BmYe9nuTczfC3Dbc/SbSg/8D1CnXXFjKrls ZiGurNUCLViRAMl5y6mHL1xUpLcQHSXJIpGMUH5UwSrbOqwD53vW5sQFXMb5xpGOi3Da orvh+Mh7tFPnK1H4nz4O8Yl7QbLsRolyS4ZJqPdXv7wU6nQUVuUbVzivJzvVdFFokp80 6LITEcJAALm2F97kJFWsRmXngZT4S7N/uCHW3jrd6m2aGILsnT+ugKJg1djPcIHG0szi SL8Q== X-Gm-Message-State: AAQBX9e70YuZ5wynxvBnQeO1jd10H8CDRm+gHrrn8mI4+bK1PAIh2/NM tyNPXG5SUYlZdIYfWS6Yv81q98LGZSAqcAihjZ8= X-Google-Smtp-Source: AKy350aavnkEmn15DOQnDs5l0FN+Crt3taxCFDk4VIXkD0SmCPGzCNibLuaSX79ZZU3o2y2KU/5DMw== X-Received: by 2002:a6b:db08:0:b0:746:1b8:8687 with SMTP id t8-20020a6bdb08000000b0074601b88687mr2104980ioc.14.1681831878094; Tue, 18 Apr 2023 08:31:18 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:17 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass , Jagan Teki , Mike Frysinger , Vignesh R Subject: [PATCH v2 04/18] sf: Rename spi-nor-tiny functions Date: Wed, 19 Apr 2023 03:30:47 +1200 Message-ID: <20230418153101.115816-5-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The 'tiny' SPI nor functions have the same name as their big brothers, which can be confusing. Use different names so it is clear which version is in the image. Signed-off-by: Simon Glass Acked-by: Vignesh Raghavendra Reviewed-by: Bin Meng --- (no changes since v1) drivers/mtd/spi/spi-nor-tiny.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 68152ce3b4b9..7aa24e129f96 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -361,7 +361,7 @@ static int spi_nor_wait_till_ready(struct spi_nor *nor) * Erase an address range on the nor chip. The address range may extend * one or more erase sectors. Return an error is there is a problem erasing. */ -static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) +static int spi_nor_erase_tiny(struct mtd_info *mtd, struct erase_info *instr) { return -ENOTSUPP; } @@ -390,8 +390,8 @@ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) return ERR_PTR(-EMEDIUMTYPE); } -static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf) +static int spi_nor_read_tiny(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char *buf) { struct spi_nor *nor = mtd_to_spi_nor(mtd); int ret; @@ -426,8 +426,8 @@ read_err: * FLASH_PAGESIZE chunks. The address range may be any size provided * it is within the physical boundaries. */ -static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) +static int spi_nor_write_tiny(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) { return -ENOTSUPP; } @@ -741,9 +741,9 @@ int spi_nor_scan(struct spi_nor *nor) mtd->writesize = 1; mtd->flags = MTD_CAP_NORFLASH; mtd->size = info->sector_size * info->n_sectors; - mtd->_erase = spi_nor_erase; - mtd->_read = spi_nor_read; - mtd->_write = spi_nor_write; + mtd->_erase = spi_nor_erase_tiny; + mtd->_read = spi_nor_read_tiny; + mtd->_write = spi_nor_write_tiny; nor->size = mtd->size; From patchwork Tue Apr 18 15:30:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770309 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=JWktCBLP; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17Fr4glTz23tV for ; Wed, 19 Apr 2023 01:32:16 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 38BB9860EF; Tue, 18 Apr 2023 17:31:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="JWktCBLP"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id AC189860EF; Tue, 18 Apr 2023 17:31:23 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd29.google.com (mail-io1-xd29.google.com [IPv6:2607:f8b0:4864:20::d29]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4B263860B3 for ; Tue, 18 Apr 2023 17:31:20 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd29.google.com with SMTP id ca18e2360f4ac-76016d1fe6bso279812639f.3 for ; Tue, 18 Apr 2023 08:31:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831879; x=1684423879; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SeQ0gerEM5fPXcALb24+FAVGVcoTheNIulwF1VvlB1c=; b=JWktCBLPQ+83tn7QgUlHfKhUNwEUiMP0sJYydRH/qL+wQda+cghn2J8rhDlYQtBySk F8oNDO6AO8qyvbu6acJXwLUn3gncM8IwqMjVYmRr7+jXvRWFzVScqzLM+ZNQijqOwQZ5 7NnC89UJ7aUx+PLRrzY+k9fjpg+fU7kZpI9oo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831879; x=1684423879; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SeQ0gerEM5fPXcALb24+FAVGVcoTheNIulwF1VvlB1c=; b=J9Lz36hUr27T82juB6PF4F8GXbbRTtO6QgpeRHmNQbcWXdqlIuwvOE5AEkD3GPmF+V LE4whY/oQu9cwKAz0VmjhPFBjvigcgYnhGa+FLHN9FWuXE3GU7YmAwIAvOCHhGZO6uNy TlcyZ5qCJfA4b7HQvzzKewy9ClJGj0AQXdziPLWvhUNRJgq5h7dPZTnGJ6mVOfrOCL9A xPFtZ5GH6FAxWERSK2AoFIrLXY9UPhvU9x9f2XhO7ibvKIGiPBO/lQ1wZsT94LPvXoK/ nf1sXJtX/wcLEzo7272/uuwx1g1CZ+5VBN5y+9PQBCcev9bdTL8bipuXu6igm6tqqqu0 ZVMg== X-Gm-Message-State: AAQBX9eMFSvbP0gpGvDoJIDuMFc/rqy+hDsqIO+EdcmnRUe/EZdpRgQq BFvSPjm8JpRH2iLVKyFk1GvG65mtj2ALDOFMaus= X-Google-Smtp-Source: AKy350aWYaSfXnaO33BNZze9SpXJiQDlGDCkYcJYGLjt605F0eY5Vq4GnUak6WiUGWXgPt/SIlnpDQ== X-Received: by 2002:a5d:8791:0:b0:760:ebe7:cc6b with SMTP id f17-20020a5d8791000000b00760ebe7cc6bmr2133934ion.17.1681831878861; Tue, 18 Apr 2023 08:31:18 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:18 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 05/18] x86: ivybridge: Ensure LPC is available for GPIO base Date: Wed, 19 Apr 2023 03:30:48 +1200 Message-ID: <20230418153101.115816-6-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The bd82x6x_get_gpio_base() does not work if the LPC is not set up. Probe it early to avoid this problem. In chromebook_link64 this propblem shows up as an inability to read the GPIO straps for the memory type. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/x86/cpu/ivybridge/bd82x6x.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 89312a863499..417290f559e9 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -31,7 +31,6 @@ DECLARE_GLOBAL_DATA_PTR; #define RCBA_AUDIO_CONFIG_HDA BIT(31) #define RCBA_AUDIO_CONFIG_MASK 0xfe -#ifndef CONFIG_HAVE_FSP static int pch_revision_id = -1; static int pch_type = -1; @@ -162,15 +161,19 @@ void pch_iobp_update(struct udevice *dev, u32 address, u32 andvalue, static int bd82x6x_probe(struct udevice *dev) { - if (!(gd->flags & GD_FLG_RELOC)) - return 0; + /* make sure the LPC is inited since it provides the gpio base */ + uclass_first_device(UCLASS_LPC, &dev); + + if (!IS_ENABLED(CONFIG_HAVE_FSP)) { + if (!(gd->flags & GD_FLG_RELOC)) + return 0; - /* Cause the SATA device to do its init */ - uclass_first_device(UCLASS_AHCI, &dev); + /* Cause the SATA device to do its init */ + uclass_first_device(UCLASS_AHCI, &dev); + } return 0; } -#endif /* CONFIG_HAVE_FSP */ static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep) { @@ -269,8 +272,6 @@ U_BOOT_DRIVER(bd82x6x_drv) = { .name = "bd82x6x", .id = UCLASS_PCH, .of_match = bd82x6x_ids, -#ifndef CONFIG_HAVE_FSP .probe = bd82x6x_probe, -#endif .ops = &bd82x6x_pch_ops, }; From patchwork Tue Apr 18 15:30:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770323 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:19 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 06/18] x86: samus: Drop EFI_LOADER Date: Wed, 19 Apr 2023 03:30:49 +1200 Message-ID: <20230418153101.115816-7-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This adds a lot of code so that it cannot be build with the binary blobs. It is not used on this board. Drop it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) configs/chromebook_samus_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index b933a2352e3f..0d20891d2bcc 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -84,3 +84,4 @@ CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_TPM=y # CONFIG_GZIP is not set +# CONFIG_EFI_LOADER is not set From patchwork Tue Apr 18 15:30:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770322 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=a/2y8io0; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17GM53mbz23tV for ; Wed, 19 Apr 2023 01:32:43 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 947CE8611A; Tue, 18 Apr 2023 17:31:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="a/2y8io0"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 80031860D6; Tue, 18 Apr 2023 17:31:24 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd36.google.com (mail-io1-xd36.google.com [IPv6:2607:f8b0:4864:20::d36]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B4091860BB for ; Tue, 18 Apr 2023 17:31:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd36.google.com with SMTP id ca18e2360f4ac-7606d6bb711so291045439f.2 for ; Tue, 18 Apr 2023 08:31:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831880; x=1684423880; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lvFhYvxOie6MswQH+fZiAFOYA7bluBB5rTXAgMgVNaQ=; b=a/2y8io0AEpotg5X0Qvdttl4ygWpZJ/6C08L9TynnaGh675Dc8mtUVmZcpnCjew44Q +gxR7ZwDYmLjeuLR54XmG9NFEp/I9J3aFT79l1p5WtciSS8kIJYYzzvTa1jxD9YmJVRE ihULmiyc1miXIi0GYhRUua1De41kTK1DyIKgI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831880; x=1684423880; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lvFhYvxOie6MswQH+fZiAFOYA7bluBB5rTXAgMgVNaQ=; b=QROy3MB2wJ8XWZ0jP0DbpImrG1Ta0sfwst1dnBH0Aine5M/fmEf7JMJ0HJHVxM4EDW kN/sWjugqMB8S7QLrF+blEf6sg4tJtEHQJ3N6supHbcJS3CK3Gr4DTGouf2ocvXfGns4 Szcf3KznoH7eUmpIIzij6Ynq+pEMbcF1M2VJs6UViYqsC2UrcxOQ0pNQajwIWoVnoTdO ZIueW0+SyH3aQiHfT/7DAfT/j0gNYL2XBM9wW8xp0eTiaZ2Qqs1ypx9ASjSqmZAObHQ6 vPfHy4xZzRHKRO8WgmTvOry2VqKnWvYNcSxMYikUg+kZUr7FQua97+bg202gfQQfNxKB xN+A== X-Gm-Message-State: AAQBX9drlZIeaDQTSt+9rvLsDXAn1TiLzeDfFUoRLXvc8V0Nzh+Bp25w OAWNlOUakDIoCAPFMosNJ8aIV972JQpOgeRKi8Q= X-Google-Smtp-Source: AKy350aZan7oJwidvK0TFFlp91OrlhK6tSVCszhrvCESpSoaH4IKWcOXzNvIA+32xxDR8+WbpoPkfQ== X-Received: by 2002:a5e:cb4b:0:b0:760:ac0c:480e with SMTP id h11-20020a5ecb4b000000b00760ac0c480emr2515522iok.18.1681831880341; Tue, 18 Apr 2023 08:31:20 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:20 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 07/18] x86: Support debug UART in 64-bit mode Date: Wed, 19 Apr 2023 03:30:50 +1200 Message-ID: <20230418153101.115816-8-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The debug UART is already set up in SPL, so there is no need to do anything here. We must provide the (empty) function though. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/x86/cpu/x86_64/cpu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 6a387612916c..d1c3873dd6a7 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -50,3 +50,10 @@ int x86_cpu_init_f(void) { return 0; } + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + /* this was already done in SPL */ +} +#endif From patchwork Tue Apr 18 15:30:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770324 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=G0hl4JoV; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17Gz13bZz23tD for ; Wed, 19 Apr 2023 01:33:15 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 101B986130; Tue, 18 Apr 2023 17:31:36 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="G0hl4JoV"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 61F88860C8; Tue, 18 Apr 2023 17:31:25 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd2c.google.com (mail-io1-xd2c.google.com [IPv6:2607:f8b0:4864:20::d2c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B2637860AF for ; Tue, 18 Apr 2023 17:31:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd2c.google.com with SMTP id ca18e2360f4ac-7606ce9bfdeso291350739f.0 for ; Tue, 18 Apr 2023 08:31:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831881; x=1684423881; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fmXDEs9obPEZ8VnvKDpNR1ONA5+bpTqFnofZnRjPL2E=; b=G0hl4JoVGNNCoq41FwMwRL35Ji6TKGkQAteBz8dap12qiHVrPCXrg7oLjfSmQL0DCY ri8Nm8oO7tmIxJi9Mi0LuRYA6nYcwdee24iMKzXRRrfX7OzSdYFvB6OzZSdCaAwyGx5p /aRizQ1QEhKGmFwr1ZAmh+jXoADdmLMgmFehM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831881; x=1684423881; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fmXDEs9obPEZ8VnvKDpNR1ONA5+bpTqFnofZnRjPL2E=; b=IBopqszRhMhiXWXvBUYorbTSIvN/IOx/A4eZAgNrQfY3s8A7ZDUX1MGDm6ctW0WM1o IXtV+uTk0uXz148FjpSdlb1OYepJb21yR2+elhdhJgxk3p/RYjeVoUW+YHrVp3Ucq1lU kriW3iH4veDMkubEdnotcOFAGtgYpcPk/rCFfTSM2PSqBhAdyufAEtOYr3hkKgrXdhGy /I9hDf1+zj92wETvGx0jS6UIlFB7OCFhBCX/MQUykygkoF/hZHtFayprVp6jUpmWgW52 5pa72ybvfuWXiJTy9A4j+4EpXgOBgsCt0vVPdBS3dRVXev4ABlfdWwJwhAFootD+45tT Npog== X-Gm-Message-State: AAQBX9edmAa9diEUFfq66rinxzX5ljeNjRL5gb427q6skCSE7cONqL2x G3zQ29D19cs/kmyNVpO2vSGpu9Bpb2n0GO2sU70= X-Google-Smtp-Source: AKy350Y/WjAumwCK3SzRXc9jTVF6DswJi6ly37Bq6YBuZZUiWMqmz0cs5fM+qRzqsR+rVF3OQL95Dw== X-Received: by 2002:a6b:4f19:0:b0:74c:c6ed:6de with SMTP id d25-20020a6b4f19000000b0074cc6ed06demr2346267iob.12.1681831881235; Tue, 18 Apr 2023 08:31:21 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:20 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 08/18] x86: Tidy up availability of string functions Date: Wed, 19 Apr 2023 03:30:51 +1200 Message-ID: <20230418153101.115816-9-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean For now, just enable the fast-but-large string functions in 32-boot U-Boot proper only. Avoid using them in SPL. We cannot use then in 64-bit builds since we only have 32-bit assembly. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/x86/include/asm/string.h | 6 +++++- arch/x86/lib/Makefile | 4 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/string.h b/arch/x86/include/asm/string.h index c15b264a5c08..5c49b0f009b7 100644 --- a/arch/x86/include/asm/string.h +++ b/arch/x86/include/asm/string.h @@ -14,7 +14,11 @@ extern char *strrchr(const char *s, int c); #undef __HAVE_ARCH_STRCHR extern char *strchr(const char *s, int c); -#ifdef CONFIG_X86_64 +/* + * Our assembly routines do not work on in 64-bit mode and we don't do a lot of + * copying in SPL, so code size is more important there. + */ +#if defined(CONFIG_SPL_BUILD) || !IS_ENABLED(CONFIG_X86_32BIT_INIT) #undef __HAVE_ARCH_MEMCPY extern void *memcpy(void *, const void *, __kernel_size_t); diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index a6f22441474b..b0612ae6dd5f 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -10,7 +10,9 @@ obj-y += bios.o obj-y += bios_asm.o obj-y += bios_interrupts.o endif -obj-y += string.o +endif +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_X86_32BIT_INIT) += string.o endif ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_BOOTM) += bootm.o From patchwork Tue Apr 18 15:30:52 2023 Content-Type: text/plain; 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Hex is expected in U-Boot anyway. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/x86/lib/mrccache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 38632e513fce..2f6f6880003e 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -303,7 +303,7 @@ static int mrccache_save_type(enum mrc_type_t type) mrc = &gd->arch.mrc[type]; if (!mrc->len) return 0; - log_debug("Saving %#x bytes of MRC output data type %d to SPI flash\n", + log_debug("Saving %x bytes of MRC output data type %d to SPI flash\n", mrc->len, type); ret = mrccache_get_region(type, &sf, &entry); if (ret) From patchwork Tue Apr 18 15:30:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770326 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=kC8KccU2; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17HW6l58z23tD for ; Wed, 19 Apr 2023 01:33:43 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9D4CD86133; Tue, 18 Apr 2023 17:31:39 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="kC8KccU2"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 513B9860B4; Tue, 18 Apr 2023 17:31:27 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x12c.google.com (mail-il1-x12c.google.com [IPv6:2607:f8b0:4864:20::12c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4523D860FE for ; Tue, 18 Apr 2023 17:31:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x12c.google.com with SMTP id e9e14a558f8ab-32b1c8ff598so12051525ab.3 for ; Tue, 18 Apr 2023 08:31:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831882; x=1684423882; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=339vun1d0ucsfLcPb+rm875FykGAdPsTSXaW79r2rvY=; b=kC8KccU2qYVtEyTb4ZOlHo1+CScMEQk75w3hbq7HiATIIh27HRBHtm7ADAgRg5LRag WR76iGLPUS9/5xGhvCGqtyJo8obKbUEna4v2P4CAfWIUwe0ZsiulB4X+y382neaLEZ/k D5k438j/ThlPq30Bsoi1QntiRprhHAxVnyYtY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831882; x=1684423882; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=339vun1d0ucsfLcPb+rm875FykGAdPsTSXaW79r2rvY=; b=BJ7W4p3RTclswL9yVaJNmlpt0CRXffOuQOVPlWEv5N8sYESma0JBgqdakoniBMEiqO J5sFz3JJUd6FYb3pEtpmc+EsWI5qpIHNmNse7LcLrL8MQwUtnCpMfUaOD9JHmng4JhJ9 1VNQuT3/ZhSL7lI4u9hB8q+6lHFo5ZzrTc/uxr9Ohuq4jlQuPbe6qOyMOOK/YszxiAte oddUPlU+QjOngEQpm1nR8tpDZsNFxrwfVUp5weF9RkunzQlFiErzaQEyrj8n5k9W7knG KW7G2VCPFWkLnDQOLteiwaGrmuEb7wbH8Tbqzwnh6GDDyvLmGJ9M9oHIHJDprjxSA2pF 9hUA== X-Gm-Message-State: AAQBX9dTCR8rTsj8C4nwizg0A6yHgMOIHphh1M4rmOW+9xkmYXpu5CQt eSl3Fi4Y81M0xFT07eCuLb0UKAnyLesoiZxs65Y= X-Google-Smtp-Source: AKy350YSzHCUqZ5/C6aQqrs7dQ9xHcRN0h2n9Fzx6XQ/FYQiufBfdYY0y1HKAVKzrUnyeMXC67xCgw== X-Received: by 2002:a92:cb03:0:b0:328:7326:b71a with SMTP id s3-20020a92cb03000000b003287326b71amr14658941ilo.24.1681831882738; Tue, 18 Apr 2023 08:31:22 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. 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Signed-off-by: Simon Glass --- (no changes since v1) arch/x86/lib/spl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index bdf57ef7b5bd..eb0af219ae29 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -117,7 +117,9 @@ static int x86_spl_init(void) } #ifndef CONFIG_SYS_COREBOOT - memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); + debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start, + (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start); + memset(&__bss_start, '\0', (ulong)&__bss_end - (ulong)&__bss_start); # ifndef CONFIG_TPL /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ From patchwork Tue Apr 18 15:30:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770327 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=icUjc0rr; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17Hp1rZMz23tD for ; Wed, 19 Apr 2023 01:33:58 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A7FA286134; Tue, 18 Apr 2023 17:31:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="icUjc0rr"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id ED389860B4; Tue, 18 Apr 2023 17:31:27 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd33.google.com (mail-io1-xd33.google.com [IPv6:2607:f8b0:4864:20::d33]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2A4D5860BB for ; Tue, 18 Apr 2023 17:31:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd33.google.com with SMTP id ca18e2360f4ac-760f5070ccfso125564739f.2 for ; Tue, 18 Apr 2023 08:31:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831883; x=1684423883; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dNEcB4hV1FKZY1hRAq8+MUwUR6UjE4SK2a3kliQLpbs=; b=icUjc0rrCO/NrQYmQ7VnKRXLFQDZqhiz0mdBwnU4aGPtfRuFlco1ydb0vgvg8qkBmE WH51YlVHgc/LPiV2mAhXKfgywcNJVyxgJ5BolxgfBbFe82zGs9JOHHqnMP9W7oDR80hO gv+7pGpkSQe5i+KdKZYClidwxwuJN7dxin21Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831883; x=1684423883; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dNEcB4hV1FKZY1hRAq8+MUwUR6UjE4SK2a3kliQLpbs=; b=h1/CxBvov3wQapRQeIxzo5wULUHRmL3Y6XmJq/sjZWmOqDIUWaLtJqDb2kST2KRjQR DbpWGf+Ksxo1sswIqjdhFauCqGpvCxE5ZxGuoqfuq+U/DbZffnsyPt8hGO2gPnxoKWku mkFiIeriI6K0PEzIqslhSvrVZfutkS9Yem+IycPEqYjQVxytTrsusdpo0FUTGiqzFqis oPrOX/6LOdWlblfaqxeeMH2N+ivyDslr+oswegvrYZ5zjkXpISQ+0pWbiB3NouBDbcXE qPUU32JSZ0InZmTMLQ6fKc9HE9AUeYRlHz8TiN6mxn42LKyZOWxSZXFQ7jbh6mpNUepT 5Bvw== X-Gm-Message-State: AAQBX9facwRUux70nXUBV3iGNFfr3VpamxrH7yWIF4qre2mK+S6wehYs /Cb2dKGiWB7amkxW2E7UDjpx6Cd0HWvikugeDVk= X-Google-Smtp-Source: AKy350bCa8edTvxMfnsS5j5IwYoljYTdxgAMakyLdu2s+J93a9a6KF9+DmvADB3FL2KQAVnQ1z61CQ== X-Received: by 2002:a6b:7848:0:b0:763:50d8:7167 with SMTP id h8-20020a6b7848000000b0076350d87167mr1866295iop.14.1681831883464; Tue, 18 Apr 2023 08:31:23 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:23 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 11/18] x86: Set up LPC only after relocation Date: Wed, 19 Apr 2023 03:30:54 +1200 Message-ID: <20230418153101.115816-12-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Probing LPC can cause PCI enumeration to take place, which significantly increases pre-relocation memory usage. Also, LPC is somtimes enabled directly by SPL. Adjust the logic to probe the LPC only after relocation. This allows chromebook_link64 to start up without a much larger CONFIG_SYS_MALLOC_F_LEN value. Signed-off-by: Simon Glass --- Changes in v2: - Add new patch to set up LPC only after relocation drivers/sysreset/sysreset_x86.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c index 8042f3994fe2..4936fdb76c72 100644 --- a/drivers/sysreset/sysreset_x86.c +++ b/drivers/sysreset/sysreset_x86.c @@ -129,8 +129,13 @@ static int x86_sysreset_probe(struct udevice *dev) { struct x86_sysreset_plat *plat = dev_get_plat(dev); - /* Locate the PCH if there is one. It isn't essential */ - uclass_first_device(UCLASS_PCH, &plat->pch); + /* + * Locate the PCH if there is one. It isn't essential. Avoid this before + * relocation as we shouldn't need reset then and it needs a lot of + * memory for PCI enumeration. + */ + if (gd->flags & GD_FLG_RELOC) + uclass_first_device(UCLASS_PCH, &plat->pch); return 0; } From patchwork Tue Apr 18 15:30:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770328 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=SHhVjaXf; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17J46TsBz23tD for ; Wed, 19 Apr 2023 01:34:12 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7B78186140; Tue, 18 Apr 2023 17:31:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="SHhVjaXf"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 9A4CF860A3; Tue, 18 Apr 2023 17:31:28 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x12e.google.com (mail-il1-x12e.google.com [IPv6:2607:f8b0:4864:20::12e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id DA08D860D6 for ; Tue, 18 Apr 2023 17:31:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x12e.google.com with SMTP id e9e14a558f8ab-32aabbe7e77so4233565ab.2 for ; Tue, 18 Apr 2023 08:31:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831884; x=1684423884; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iQGgXBfdtBBxk8wH9LcYBJW+xeP4bt5ASIBzmDe+9Hg=; b=SHhVjaXfCX1GnezyV4q1dof22FM3KRKDy86Q0y8Z80bOUF5VjKfBCaYW7Q6vajYew7 fdPbMTDv08r1Lhp5wIpAWs0bjlNpmFFHVBtN93hMLqFbvp+Tu+A+VCmFklN6aBxIqvnB JcL4joGMeCXrUHBKQXmic8jwJX6w6XAA7aAsc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831884; x=1684423884; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iQGgXBfdtBBxk8wH9LcYBJW+xeP4bt5ASIBzmDe+9Hg=; b=lVdjfnTyafLpjyTmAJOXaiAU+v4kByG2mUfd+EnpcgA8mErgQHp5gq2XIHa8fTzjy2 wadTTn0whOB5orFtBF12uLRz3RL0V8FnMkrUx6kPE+zb3rU1v4La/ST/XIZgD5bz2/xc vO+gCmZKdTjzcH0uDARFo1H4FXNNtAhgAESw2+ga9/x5viWXnBLG0/eWCotZvwtMCyc9 OigSpl5hHgTqf+rNfhG9BkPoIWY94bsJQvMXOa/DsOBLgB/12bzB5d2uvBz6vU3NeS6U yGKuuBpraPz4RZzV9zMfbus1PdUh4lRhKRbtS+Kwd2Dm6SNCUYScfgNg4Hx8AbDXAMe+ LlPw== X-Gm-Message-State: AAQBX9c8t70im7Pch6UQy3Z44mzs4rvssPC2kCa7TVy8P9RQQ8H8vKnx lrNkMhwQ7e3Pfd+dSruVXN/MUG12lrIhYUeYACU= X-Google-Smtp-Source: AKy350a8xAhUpr1IFOKRNGSVrG0nlBKYKhCOcWeUgzW8UnGFeWOEM8QhqTpPiqOoHQZE/UsBjXhyAw== X-Received: by 2002:a92:cd03:0:b0:323:ec3:49b7 with SMTP id z3-20020a92cd03000000b003230ec349b7mr12399014iln.11.1681831884237; Tue, 18 Apr 2023 08:31:24 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:23 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 12/18] x86: Tidy up address for loading U-Boot from SPL Date: Wed, 19 Apr 2023 03:30:55 +1200 Message-ID: <20230418153101.115816-13-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Use the binman symbols for this, to avoid hard-coding the value. We could use CONFIG_X86_OFFSET_U_BOOT for the address, but it seems better to obtain the offset and size through the same mechanism. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v2: - Add new patch to tidy up address for loading U-Boot from SPL arch/x86/lib/spl.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index eb0af219ae29..8c3e7061de67 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -217,16 +217,9 @@ static int spl_board_load_image(struct spl_image_info *spl_image, spl_image->name = "U-Boot"; if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) { - /* - * Copy U-Boot from ROM - * TODO(sjg@chromium.org): Figure out a way to get the text base - * correctly here, and in the device-tree binman definition. - * - * Also consider using FIT so we get the correct image length - * and parameters. - */ - memcpy((char *)spl_image->load_addr, (char *)0xfff00000, - 0x100000); + /* Copy U-Boot from ROM */ + memcpy((void *)spl_image->load_addr, + (void *)spl_get_image_pos(), spl_get_image_size()); } debug("Loading to %lx\n", spl_image->load_addr); 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:24 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 13/18] x86: Return mtrr_add_request() to its old purpose Date: Wed, 19 Apr 2023 03:30:56 +1200 Message-ID: <20230418153101.115816-14-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This function used to be for adding a list of requests to be actioned on relocation. Revert it back to this purpose, to avoid problems with boards which need control of their MTRRs (i.e. those which don't use FSP). The mtrr_set_next_var() function is available when the next free variable-MTRR must be set, so this can be used instead. Signed-off-by: Simon Glass Fixes: 3a5823978ff ("x86: mtrr: Skip MSRs that were already programmed..") Fixes: 44aed2f0322 ("x86: mtrr: Do not clear the unused ones..") --- (no changes since v1) arch/x86/cpu/mtrr.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index e69dfb552b16..c174dd9b3ad2 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -156,8 +156,12 @@ int mtrr_commit(bool do_caches) debug("open done\n"); qsort(req, gd->arch.mtrr_req_count, sizeof(*req), h_comp_mtrr); for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) - mtrr_set_next_var(req->type, req->start, req->size); + set_var_mtrr(i, req->type, req->start, req->size); + /* Clear the ones that are unused */ + debug("clear\n"); + for (; i < mtrr_get_var_count(); i++) + wrmsrl(MTRR_PHYS_MASK_MSR(i), 0); debug("close\n"); mtrr_close(&state, do_caches); debug("mtrr done\n"); From patchwork Tue Apr 18 15:30:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770330 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:25 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 14/18] x86: spl: Avoid using init_cache_f_r() from SPL Date: Wed, 19 Apr 2023 03:30:57 +1200 Message-ID: <20230418153101.115816-15-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This function is used by U-Boot proper. It does not set up MTRRs when SPL is enabled, but we do want this done when it is called from SPL. In fact it is confusing to use the same function from SPL, since there are require a few conditions there. All init_cache_f_r() really does is commit the MTRRs and set up the cache. Do this in the SPL's version of this function instead. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/x86/lib/spl.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 8c3e7061de67..388b51086410 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -186,7 +186,8 @@ void board_init_f(ulong flags) void board_init_f_r(void) { - init_cache_f_r(); + mtrr_commit(false); + init_cache(); gd->flags &= ~GD_FLG_SERIAL_READY; debug("cache status %d\n", dcache_status()); board_init_r(gd, 0); From patchwork Tue Apr 18 15:30:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770331 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=L2NoM2hn; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17Jv20blz23tD for ; Wed, 19 Apr 2023 01:34:55 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5BBB286152; Tue, 18 Apr 2023 17:32:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="L2NoM2hn"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DBC41860FE; Tue, 18 Apr 2023 17:31:30 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x12e.google.com (mail-il1-x12e.google.com [IPv6:2607:f8b0:4864:20::12e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 29A76860AF for ; Tue, 18 Apr 2023 17:31:28 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x12e.google.com with SMTP id e9e14a558f8ab-32a7770f7d1so34569125ab.1 for ; Tue, 18 Apr 2023 08:31:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831886; x=1684423886; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MzCnO660KORZbBbwPRm/AcsFSvy0CNoh1a62NB0Au2k=; b=L2NoM2hnn0zDQdVKkLxcfbVA0oq0dr3iny+2v4Z2JUByRK8ACWCgQ6PM5UKYPQ6J39 Qw+CT8TPRY2BorHn0Y5GCJvSNsWkEe2e0YXsWhGTKfnepmjaGhri3MHQRqwVF64jANSF /ZZbR0S2JkbkKangOz02iWHG0a78QI6sJZjHs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831886; x=1684423886; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MzCnO660KORZbBbwPRm/AcsFSvy0CNoh1a62NB0Au2k=; b=D5rd3hqWyxle/RySSqfeEsULEAadlvuRGop82wTgAf7vWnTlQgBd9YOXdJG/byA0zD VU8KqJHNiNZQhU0V0x8ItN5NKNSRbvRxwLTTVGNy+R72QXk7SQ5JbFv1NApXHBpMAb1A J8rRYxiVDRZyVqvuyxw/Mb8+Z79qn0CRWzFF2kS31qvs2eVXZ9VEi+hGIhaPFnNtJjie zK+xVPyNzvJhDj7hXkG13e7VwoulS7BcOaCahQP+9sdjuX26cN+D8rEngFxPRT4otqbT mPl9B5xIrxNCMuefTb5QnPiDcRr6FcOb716/bE/8JZbqfAemYiAei27BGRQ0J0kNtOoX HaJw== X-Gm-Message-State: AAQBX9ffRJyLLzOCOS7+3cAa8Vv/hho1akcu6xiU9RAjBvX0IQ4ntKq7 CQREeMW+T5e/IpYWDqzMmHIg7P4AVY4JXI7jicc= X-Google-Smtp-Source: AKy350Zr/iuY1ryRPQAEZGXJGjfWP+D3VpCSyQMpaEoPtV3VrePHzaG5papDuRcZdoAYU6PW/OyVFw== X-Received: by 2002:a5d:97c3:0:b0:760:d39a:2429 with SMTP id k3-20020a5d97c3000000b00760d39a2429mr1896371ios.4.1681831886655; Tue, 18 Apr 2023 08:31:26 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:26 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 15/18] spl: Commit MTRRs only in board_init_f_r() Date: Wed, 19 Apr 2023 03:30:58 +1200 Message-ID: <20230418153101.115816-16-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean We don't need to commit the SPI-flash MTRR change immediately, since it is now done in the board_init_f_r(). Also this causes chromebook_link64 to hang. Drop the extra mtrr_commit() in the SPL implementation. Signed-off-by: Simon Glass --- (no changes since v1) arch/x86/lib/spl.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 388b51086410..f0b74d04252a 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -147,7 +147,6 @@ static int x86_spl_init(void) debug("%s: SPI cache setup failed (err=%d)\n", __func__, ret); return ret; } - mtrr_commit(true); # else ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit); if (ret) From patchwork Tue Apr 18 15:30:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770332 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=dalh87Hf; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Q17K91YShz1ybC for ; Wed, 19 Apr 2023 01:35:09 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A0AEF86159; Tue, 18 Apr 2023 17:32:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="dalh87Hf"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C22168611A; Tue, 18 Apr 2023 17:31:31 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd2f.google.com (mail-io1-xd2f.google.com [IPv6:2607:f8b0:4864:20::d2f]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 30AA0860D6 for ; Tue, 18 Apr 2023 17:31:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd2f.google.com with SMTP id ca18e2360f4ac-7606df33c42so59671939f.2 for ; Tue, 18 Apr 2023 08:31:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1681831887; x=1684423887; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=I72A/mYfwUlYSXuGTIWIyHVsHqBRBnCeIDaaPB4MGs4=; b=dalh87Hf7IELFEwg94p4mrNidQkBtJA2cR1eWz2xcRdlYau/USIXXNLu3ZbzueToH0 2MDYgXpMnyujNBweWpuCv6TEG4ZjDz4zcJ64tvfF5ZvMtc/XJY/h+U3V+fwFwnMr0bi9 zQydHfCmEsu/EhzjiLrCDybdBCfKjM8hozQPk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1681831887; x=1684423887; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=I72A/mYfwUlYSXuGTIWIyHVsHqBRBnCeIDaaPB4MGs4=; b=E6XH3Ubpt5mvr7J8RECYw2l073x0S3xHXuPu27dnhgsfRHtVkOOn4fci1szGbLJziz kPEki10ddVGmVI9j9db6yx+Ic9CI+zfunUmiEVjpO7SZzmuXpOwUibhVXXWBhES7g2r0 Q1yxNyvXdpxd3npiGK8jLiCuJKJw9y5dTRxfbvfJG5cMKyM5Qnb2a+FRpFb+N40UG4nj wq3ye+NsDkmUId1ieyUtZZw4o84sUW+FpLbYu1eaX86zGY+Xnb44yZ7GgiJ4bYig4dZJ EFStPBoEOCHXD5v844uzsdGgh29k8ht6AzlvgZDaRyOZZ5nNNTcH39C8qPk/cLv0D7+G 7slg== X-Gm-Message-State: AAQBX9cBZRTJvf2LoR2QdqTwcj0uPC5UwPQC8NTRUj44uOjjr+004ZeV askrsT7MuIbEeSNOo5lwvynyFXlnl4MqLEw5noU= X-Google-Smtp-Source: AKy350YYiok4JLBx0EVlmwlcj3eFGLt6W6gJHT2TpedcsR91DRFcwKQRRpIUOnM9DKcEbk8QMMeLww== X-Received: by 2002:a05:6602:148:b0:763:5a3c:58bd with SMTP id v8-20020a056602014800b007635a3c58bdmr1746107iot.19.1681831887570; Tue, 18 Apr 2023 08:31:27 -0700 (PDT) Received: from sjg1.lan (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:27 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 16/18] x86: Simplify cpu_jump_to_64bit_uboot() Date: Wed, 19 Apr 2023 03:30:59 +1200 Message-ID: <20230418153101.115816-17-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This copies the cpu_call64() function to memory address and then jumps to it. This seems to work correctly even when call from SPL, which is running from SPI flash. Drop the copy as it is not needed. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/x86/cpu/i386/cpu.c | 32 +++++--------------------------- 1 file changed, 5 insertions(+), 27 deletions(-) diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index c7f6c5a013e0..91cd5d7c9e40 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -572,6 +572,7 @@ int cpu_has_64bit(void) has_long_mode(); } +/* Base address for page tables used for 64-bit mode */ #define PAGETABLE_BASE 0x80000 #define PAGETABLE_SIZE (6 * 4096) @@ -614,43 +615,20 @@ int cpu_jump_to_64bit(ulong setup_base, ulong target) } /* - * Jump from SPL to U-Boot + * cpu_jump_to_64bit_uboot() - Jump from SPL to U-Boot * - * This function is work-in-progress with many issues to resolve. - * - * It works by setting up several regions: - * ptr - a place to put the code that jumps into 64-bit mode - * gdt - a place to put the global descriptor table - * pgtable - a place to put the page tables - * - * The cpu_call64() code is copied from ROM and then manually patched so that - * it has the correct GDT address in RAM. U-Boot is copied from ROM into - * its pre-relocation address. Then we jump to the cpu_call64() code in RAM, - * which changes to 64-bit mode and starts U-Boot. + * It works by setting up page tables and calling the code to enter 64-bit long + * mode */ int cpu_jump_to_64bit_uboot(ulong target) { - typedef void (*func_t)(ulong pgtable, ulong setup_base, ulong target); uint32_t *pgtable; - func_t func; - char *ptr; pgtable = (uint32_t *)PAGETABLE_BASE; - build_pagetable(pgtable); - extern long call64_stub_size; - ptr = malloc(call64_stub_size); - if (!ptr) { - printf("Failed to allocate the cpu_call64 stub\n"); - return -ENOMEM; - } - memcpy(ptr, cpu_call64, call64_stub_size); - - func = (func_t)ptr; - /* Jump to U-Boot */ - func((ulong)pgtable, 0, (ulong)target); + cpu_call64(PAGETABLE_BASE, 0, (ulong)target); return -EFAULT; } From patchwork Tue Apr 18 15:31:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770333 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:28 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 17/18] x86: samus: Don't include audio and SATA in TPL Date: Wed, 19 Apr 2023 03:31:00 +1200 Message-ID: <20230418153101.115816-18-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean These are not used in TPL so disable the drivers to save space. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) arch/x86/cpu/broadwell/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/cpu/broadwell/Makefile b/arch/x86/cpu/broadwell/Makefile index 52d56c65be80..3e1f76d6118f 100644 --- a/arch/x86/cpu/broadwell/Makefile +++ b/arch/x86/cpu/broadwell/Makefile @@ -2,7 +2,6 @@ # # Copyright (c) 2016 Google, Inc -obj-y += adsp.o obj-$(CONFIG_$(SPL_TPL_)X86_16BIT_INIT) += cpu.o obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += cpu_full.o @@ -14,6 +13,8 @@ obj-y += refcode.o endif ifndef CONFIG_SPL_BUILD # obj-y += cpu_from_spl.o +obj-y += adsp.o +obj-y += sata.o endif endif @@ -29,5 +30,4 @@ obj-y += pch.o obj-y += pinctrl_broadwell.o obj-y += power_state.o obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += refcode.o -obj-y += sata.o obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += sdram.o From patchwork Tue Apr 18 15:31:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1770334 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id x8-20020a5d9448000000b0075845625e38sm4005945ior.28.2023.04.18.08.31.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Apr 2023 08:31:28 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH v2 18/18] x86: samus: Adjust TPL start and pre-reloc memory size Date: Wed, 19 Apr 2023 03:31:01 +1200 Message-ID: <20230418153101.115816-19-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.634.g4ca3ef3211-goog In-Reply-To: <20230418153101.115816-1-sjg@chromium.org> References: <20230418153101.115816-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Move the TPL up a little to make room for the refcode binary blob. Also increase the pre-relocation memory to make space for recent additions. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- Changes in v2: - Drop patch "x86: Add on to existing MTRRs in SPL" - Add various patches to resolve problems with chromebook_link64 configs/chromebook_samus_tpl_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 337768b45fd0..4cfaf4bc5c79 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -1,6 +1,6 @@ CONFIG_X86=y CONFIG_TEXT_BASE=0xffed0000 -CONFIG_SYS_MALLOC_F_LEN=0x1a00 +CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x3F8000 @@ -8,7 +8,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_SPL_TEXT_BASE=0xffe70000 -CONFIG_TPL_TEXT_BASE=0xfffd8000 +CONFIG_TPL_TEXT_BASE=0xfffd8100 CONFIG_DEBUG_UART_BASE=0x3f8 CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_DEBUG_UART_BOARD_INIT=y