From patchwork Mon Apr 3 03:37:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 1764428 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PqrJp3fJhz1yYb for ; Mon, 3 Apr 2023 22:47:38 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3DAA485EC9; Mon, 3 Apr 2023 14:47:07 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=tinylab.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 0657985ABB; Mon, 3 Apr 2023 05:38:08 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.155.65.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4481685C52 for ; Mon, 3 Apr 2023 05:38:02 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=tinylab.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=bmeng@tinylab.org X-QQ-mid: bizesmtp85t1680493076thze79yq Received: from pek-vx-bsp2.wrs.com ( [60.247.85.88]) by bizesmtp.qq.com (ESMTP) with id ; Mon, 03 Apr 2023 11:37:32 +0800 (CST) X-QQ-SSF: 01200000000000D0F000000A0000000 X-QQ-FEAT: 6TsEncM2xqgfd9s+kT11EQE+LLBDyXY11dgyU2yWv7sZKPY6TnD/XTTwbQ775 xXpCQMqYEf+0sxoKjVkYvYjN1ABSorMgYH4zGIGPjrYy6mXJhnIgB2frYkVRpBSKE9ZQuG6 DsD+WX1QexU+3lq/juN+qugHuT+8e1gadWF00XuykmHQSiulnac+gZv61NeT7zCcQ1rFYYB gErv1JCjTQdqsKUKAdQDWScP38SrRGTTnvEYbbZ8h7er5601nCaTkGa2MoSeeLfa0zHBthh A9k+JnhqnpBaMQrnbTLPttq60QwLGwkAzo/0wIApMoOq6x7w44MfusvuFQO0IK/02hZz2H/ 1jiBOi/ X-QQ-GoodBg: 0 X-BIZMAIL-ID: 6727060231391206584 From: Bin Meng To: Leo , Rick Chen Cc: u-boot@lists.denx.de Subject: [PATCH] riscv: Correct a comment in io.h Date: Mon, 3 Apr 2023 11:37:32 +0800 Message-Id: <20230403033732.2812219-1-bmeng@tinylab.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3 X-Mailman-Approved-At: Mon, 03 Apr 2023 14:46:52 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Replace NDS32 with RISC-V in the comments. Signed-off-by: Bin Meng Reviewed-by: Rick Chen --- arch/riscv/include/asm/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index 220266e76f..b16e6dfa37 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -180,7 +180,7 @@ static inline u64 readq(const volatile void __iomem *addr) * IO port access primitives * ------------------------- * - * The NDS32 doesn't have special IO access instructions just like ARM; + * The RISC-V doesn't have special IO access instructions just like ARM; * all IO is memory mapped. * Note that these are defined to perform little endian accesses * only. Their primary purpose is to access PCI and ISA peripherals.