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Wed, 22 Mar 2023 19:07:27 -0500 From: Brad Larson To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 01/15] dt-bindings: arm: add AMD Pensando boards Date: Wed, 22 Mar 2023 17:06:43 -0700 Message-ID: <20230323000657.28664-2-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230323000657.28664-1-blarson@amd.com> References: <20230323000657.28664-1-blarson@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT088:EE_|PH7PR12MB6490:EE_ X-MS-Office365-Filtering-Correlation-Id: 6f5eca73-086d-452f-ee4c-08db2b329880 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: HuPtHtlvdRCSlVOoYN4EIt44rdluCCX2Kc+ejsL/+J4NrEaY6h1G/P/wwNMMU4UrPxwXLcgvm2wLRAT9dbcXLNR0EOaCpjrKw25F7NH055b7kKK6HWUSvUneUYUJ9fbL7uaK8QLeZQyLEqel9n4akX54DLC9DZX5AcRiqOVnrkE8oWMCXxENAmEkgMXZTq6oCZmoMJpzjq4RBpNIpyYGXigMNL83uw9nPSxeoFK5eedn0JduntzqbmfGwbqdMjbW5felNoRYY9rMTa2CjrALqnlDgSNVlG6W/AFD7H+D1BCkTM502Gdm2gNS/8bPPOpWBQ99gmEWHQYZI7rfHi1pWh6QuhRvt5/NzuzGEbBa5CEATbvAs5zpTEleI9fvmIQjZVPURZbICsqZV9eqjHYfMorPFculXbZHwMu73dSSfALHXhGVtbJCxVaKdk7YZhm1KQ8zcB4QUM4k1Lsor89FVm9rPBOmX+43ZlsjQaaoHXngipN92ARpXO2YnlW+FG82BaorCJg9YmYBwG1uVNNN/JB2lymvj/xDu41OJzTgTp5lgJkdqLKNCEHuGETJJLm4nfpruy6Bl3GUDhWvmIdz3PWUQM+D+OC6nt4KD7n8VqoqNpgktvFqeCm30W7aBa3c9+J72GRR5XEdPqSvTvz8kKyiGSAv1w80omNJTHDXwfh+d4kXr6UHLlB6jcJEwTsrBKy51egh928a9Swztpd26l3Vdbkts/SB3Qes49InO4Mb2E1v4G4rgjM9ORR36q8w8pCeutC+2c6IqMgc32Z9bQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(346002)(136003)(39860400002)(376002)(451199018)(46966006)(36840700001)(40470700004)(966005)(36860700001)(1076003)(81166007)(47076005)(26005)(82310400005)(6666004)(36756003)(336012)(426003)(41300700001)(82740400003)(16526019)(186003)(356005)(40480700001)(2616005)(40460700003)(2906002)(316002)(6916009)(8676002)(70206006)(70586007)(5660300002)(7416002)(7406005)(8936002)(478600001)(4326008)(54906003)(36900700001);DIR:OUT;SFP:1101; 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Signed-off-by: Brad Larson Reviewed-by: Rob Herring --- .../devicetree/bindings/arm/amd,pensando.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/amd,pensando.yaml diff --git a/Documentation/devicetree/bindings/arm/amd,pensando.yaml b/Documentation/devicetree/bindings/arm/amd,pensando.yaml new file mode 100644 index 000000000000..e5c2591834a8 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/amd,pensando.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/amd,pensando.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD Pensando SoC Platforms + +maintainers: + - Brad Larson + +properties: + $nodename: + const: "/" + compatible: + oneOf: + + - description: Boards with Pensando Elba SoC + items: + - enum: + - amd,pensando-elba-ortano + - const: amd,pensando-elba + +additionalProperties: true + +... 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Wed, 22 Mar 2023 19:07:41 -0500 From: Brad Larson To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 02/15] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Date: Wed, 22 Mar 2023 17:06:44 -0700 Message-ID: <20230323000657.28664-3-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230323000657.28664-1-blarson@amd.com> References: <20230323000657.28664-1-blarson@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT021:EE_|DS7PR12MB5885:EE_ X-MS-Office365-Filtering-Correlation-Id: a8dd06c8-52b9-4cfe-2772-08db2b32a092 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: CMehcjZ+mWXdBVbT6HAkipKaWOMv6ydHrw6EfCev9j5nD/KfTzZ2KlhiQRDSNFxfHopvsu+RSVo3gmu8f5Vh77pVAaRdQPyPSeawyDlkbw6Ww+eYlbZOJ1xSz1ODKinaBWD+RmbK4HK7N9DNMKLa4/p0gXsWMW6iKshFCFfBIJOl6BLNRI8aHeXmcoYOb8RpqxS9OTNsL+/CSEc8mrMLiRyFuX2Sqb1nEEGZGWNW6XH+aZnP5LEk27OjlouzYhb8/xOfwvg+72uiR8cF2NYaO2JaR4bOkbAQgaDTnQjIPGxDVwhnXDh7O2TEf/a2oKVfLtAyDLhZlo21ISQDe6trVC0ICJPE6wn7HtZOiH6EHgWzz52wj8/DNOnZw89IVuvrjdzbW2Nve4tiUZqJhRPBAqIPOGIHVH2+YBni6NFM1ASDsyWyIOaSSHt96J9EFOT3Wzisj7paWs0rQDD0HO6hsZWWkZMl1wFDpA8iX/XLc6D6GDCkc3vVufM6ZZbutzmseRaZcF/qU3pZqVgtpsXQ6x9hyt9lwMm+hLTUKzU4OmZC9b9YGClh/BmEaIYo15BjWlCVIvLcJMXZPfZu+CX8qGD+EQfmUKHoHn7DsQagRu/K/Bm57h6FSRVZ/Bh5YclUrS1G5V5bUdFtfSY7OeiQiEIOyQ/PH2cov3T/kz8GtsKcHJLhdzoayWt0i6IjGqa7RCLeuPNOdTtl18SndzqIkKVnMMTDVLMXxFyNF56Kjh8= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(136003)(376002)(346002)(39860400002)(396003)(451199018)(46966006)(40470700004)(36840700001)(5660300002)(7416002)(7406005)(36860700001)(41300700001)(82310400005)(40480700001)(36756003)(356005)(8936002)(82740400003)(81166007)(40460700003)(2906002)(83380400001)(336012)(478600001)(426003)(47076005)(2616005)(186003)(16526019)(26005)(54906003)(1076003)(8676002)(4326008)(316002)(70586007)(70206006)(6916009)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2023 00:07:44.4880 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a8dd06c8-52b9-4cfe-2772-08db2b32a092 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT021.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5885 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and explicitly controls byte-lane enables. Signed-off-by: Brad Larson Reviewed-by: Krzysztof Kozlowski --- v12_changes: - Drop 'resets: false' in the amd,pensando-elba-sd4hc else properties. Passed dtbs_check and dt_binding_check with both versions. v11 changes: - Remove resets description and reset-names - Add descriptions for amd,pensando-elba-sd4hc reg items v10 changes: - Move reset-names property definition next to existing resets prop - Move allOf to the bottom and set resets/reset-names required only for pensando - Fix reg maxItems for existing, must be 1 v9 changes: - Add reset-names and resets properties - Add if/then on property amd,pensando-elba-sd4hc to set reg property values for minItems and maxItems --- .../devicetree/bindings/mmc/cdns,sdhci.yaml | 27 ++++++++++++++++--- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index adacd0535c14..6c40611405a0 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -9,19 +9,18 @@ title: Cadence SD/SDIO/eMMC Host Controller (SD4HC) maintainers: - Masahiro Yamada -allOf: - - $ref: mmc-controller.yaml - properties: compatible: items: - enum: + - amd,pensando-elba-sd4hc - microchip,mpfs-sd4hc - socionext,uniphier-sd4hc - const: cdns,sd4hc reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: maxItems: 1 @@ -120,6 +119,26 @@ required: - interrupts - clocks +allOf: + - $ref: mmc-controller.yaml + - if: + properties: + compatible: + contains: + const: amd,pensando-elba-sd4hc + then: + properties: + reg: + items: + - description: Host controller registers + - description: Elba byte-lane enable register for writes + required: + - resets + else: + properties: + reg: + maxItems: 1 + unevaluatedProperties: false examples: From patchwork Thu Mar 23 00:06:45 2023 Content-Type: text/plain; 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Wed, 22 Mar 2023 19:07:53 -0500 From: Brad Larson To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 03/15] dt-bindings: spi: cdns: Add compatible for AMD Pensando Elba SoC Date: Wed, 22 Mar 2023 17:06:45 -0700 Message-ID: <20230323000657.28664-4-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230323000657.28664-1-blarson@amd.com> References: <20230323000657.28664-1-blarson@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT082:EE_|SN7PR12MB6670:EE_ X-MS-Office365-Filtering-Correlation-Id: bdfce271-1e87-4686-5c7d-08db2b32a7a4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: oNnSXqtiSPtXsdfM5nyexxnVEnIlroh0E7lTcMTZvHzre5i6CoGaDB/0yfWtagON3jozIT07DuL+idNs/V+C5brmXxG98CGAB4flQLF7AAcfjCa7NyS0bePwxutbr3SO4MWPRHSoQI+HR0rCKeGAo1B/7O2Z/zwY4D9evVinXJ6wQ/xqKg9r6so8/z5OfRiAsDizH6/Cf+6oLltbJ58IODCEnjlYK2zCwotsKUAyAfOkXJKBd2LEA9tF4H46hk9g4Hv3a22ZMgQIknMKaiHO09815MHR2N/4z4dGEVAP2ISzkwJgd2uzXBLlTH0FS4O4PRk/lcoFvph44LUxl+uL7wng8Oet7W2a8105CDLDCAlZRPfh514xNGI+Iht3OlhyTuWhphP5VzD6lTX1ETXuKZDr4xnJHj4ZIKINN+4HAVqPwwVgwoF9EblwBZI69hHJCmaQ/6bio90I1OHgDOUoN0y98cyxit8CzlpuVphmpMs7p1ZlJjpET4+/8VKEHmKMP+AKA5IAmh1guS1fbxttP6ygz6C/yRmCKQTQBtCo1am98zUPbtiYlO5eo2knwO3VluDvtaqekrFT0broTo018bjHD8CqRlrt0yM9ZQY+6QGxTOFpyzvwTTjBS6bDw6E+vAJRaa4hmolq1riu2FOaPGhtkI+7qI2ELc+TiviJfjTck7o7k2LgTLbYBWajlduefP8KBheemwb51DCRbzkP94qlQwMgxoOjHn4HUtJXoL0= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(396003)(346002)(136003)(376002)(39860400002)(451199018)(46966006)(36840700001)(40470700004)(8936002)(7406005)(5660300002)(2616005)(41300700001)(16526019)(7416002)(4326008)(70586007)(1076003)(6916009)(82310400005)(186003)(26005)(8676002)(70206006)(316002)(36756003)(54906003)(40140700001)(36860700001)(478600001)(83380400001)(336012)(6666004)(356005)(82740400003)(81166007)(40480700001)(47076005)(426003)(40460700003)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2023 00:07:56.3358 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bdfce271-1e87-4686-5c7d-08db2b32a7a4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT082.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6670 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the cadence qspi controller compatible for AMD Pensando Elba SoC boards. The Elba qspi fifo size is 1024. Signed-off-by: Brad Larson Reviewed-by: Krzysztof Kozlowski --- v11 changes: - Removed redundant if/then for amd,pensando-elba-qspi v10 changes: - Fix cdns,fifo-depth, only amd,pensando-elba-qspi is 1024 bytes v9 changes: - Add 1024 to cdns,fifo-depth property to resolve dtbs_check error --- .../bindings/spi/cdns,qspi-nor.yaml | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index 5c01db128be0..6e67de9da293 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -20,11 +20,28 @@ allOf: required: - power-domains + - if: + properties: + compatible: + contains: + const: amd,pensando-elba-qspi + then: + properties: + cdns,fifo-depth: + enum: [ 128, 256, 1024 ] + default: 1024 + else: + properties: + cdns,fifo-depth: + enum: [ 128, 256 ] + default: 128 + properties: compatible: oneOf: - items: - enum: + - amd,pensando-elba-qspi - ti,k2g-qspi - ti,am654-ospi - intel,lgm-qspi @@ -48,8 +65,6 @@ properties: description: Size of the data FIFO in words. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [ 128, 256 ] - default: 128 cdns,fifo-width: $ref: /schemas/types.yaml#/definitions/uint32 From patchwork Thu Mar 23 00:06:46 2023 Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2023 00:08:06.3938 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c99c3b95-55ad-4270-b4ce-08db2b32ada0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT023.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5765 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The AMD Pensando Elba SoC has integrated the DW APB SPI Controller Signed-off-by: Brad Larson Reviewed-by: Krzysztof Kozlowski Reviewed-by: Serge Semin --- v12 changes: - Correct property amd,pensando-elba-syscon description v10 changes: - Move definition of amd,pensando-elba-syscon into properties with a better description - Add amd,pensando-elba-syscon: false for non elba designs v9 changes: - Define property amd,pensando-elba-syscon - Move compatible amd,pensando-elba-spi ahead of baikal,bt1-ssi --- .../bindings/spi/snps,dw-apb-ssi.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index a132b5fc56e0..12ca108864c6 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -37,6 +37,17 @@ allOf: else: required: - interrupts + - if: + properties: + compatible: + contains: + const: amd,pensando-elba-spi + then: + required: + - amd,pensando-elba-syscon + else: + properties: + amd,pensando-elba-syscon: false properties: compatible: @@ -63,6 +74,8 @@ properties: const: intel,keembay-ssi - description: Intel Thunder Bay SPI Controller const: intel,thunderbay-ssi + - description: AMD Pensando Elba SoC SPI Controller + const: amd,pensando-elba-spi - description: Baikal-T1 SPI Controller const: baikal,bt1-ssi - description: Baikal-T1 System Boot SPI Controller @@ -136,6 +149,12 @@ properties: of the designware controller, and the upper limit is also subject to controller configuration. + amd,pensando-elba-syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Block address to control SPI chip-selects. The Elba SoC system controller + provides an interface to override the native DWC SSI CS control. + patternProperties: "^.*@[0-9a-f]+$": type: object From patchwork Thu Mar 23 00:06:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brad Larson X-Patchwork-Id: 1760057 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256 header.s=selector1 header.b=ujQHIfh0; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Phm0Q1tHkz247J for ; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2023 00:08:19.8159 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a7527218-22c6-4464-259d-08db2b32b5a3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT028.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4290 X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Support the AMD Pensando Elba SoC Controller which is a SPI connected device providing a miscellaneous set of essential board control/status registers. This device is present in all Pensando SoC based designs. Signed-off-by: Brad Larson Reviewed-by: Krzysztof Kozlowski --- v11 changes: - Fixed the compatible which should have stayed as 'amd,pensando-elba-ctrl', the commit message, and the filename - Reference spi-peripheral-props - Delete spi-max-frequency - Remove num-cs from example v10 changes: - Property renamed to amd,pensando-ctrl - Driver is renamed and moved to soc/drivers/amd affecting binding - Delete cs property, driver handles device node creation from parent num-cs fixing schema reg error in a different way v9 changes: - Instead of four nodes, one per chip-select, a single node is used with reset-cells in the parent. - No MFD API is used anymore in the driver so it made sense to move this to drivers/spi. - This driver is common for all Pensando SoC based designs so changed the name to pensando-sr.c to not make it Elba SoC specific. - Added property cs for the chip-select number which is used by the driver to create /dev/pensr0. --- .../soc/amd/amd,pensando-elba-ctrl.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/amd/amd,pensando-elba-ctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/amd/amd,pensando-elba-ctrl.yaml b/Documentation/devicetree/bindings/soc/amd/amd,pensando-elba-ctrl.yaml new file mode 100644 index 000000000000..f1d3ed4f519b --- /dev/null +++ b/Documentation/devicetree/bindings/soc/amd/amd,pensando-elba-ctrl.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/amd/amd,pensando-elba-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD Pensando Elba SoC Controller + +description: + The AMD Pensando Elba SoC Controller is a SPI connected device with essential + control/status registers accessed on chip select 0. This device is present + in all Pensando SoC based designs. + +maintainers: + - Brad Larson + +properties: + compatible: + enum: + - amd,pensando-elba-ctrl + + reg: + maxItems: 1 + + '#reset-cells': + const: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - '#reset-cells' + +allOf: + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + system-controller@0 { + compatible = "amd,pensando-elba-ctrl"; + reg = <0>; + spi-max-frequency = <12000000>; + interrupt-parent = <&porta>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + #reset-cells = <1>; + }; + }; + +...