From patchwork Mon Mar 20 10:10:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758917 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=J1FYxKVV; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9Vs6s0lz246f for ; Mon, 20 Mar 2023 21:11:16 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTY-0003lv-WC; Mon, 20 Mar 2023 06:10:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTQ-0003kc-MU for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:42 -0400 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTP-0000CI-1u for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:40 -0400 Received: by mail-wm1-x32b.google.com with SMTP id o32so690058wms.1 for ; Mon, 20 Mar 2023 03:10:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307036; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=H7w228qMV522vrZs8kcDs+ryF/z3Qx23mEIba2VleiM=; b=J1FYxKVVugjFuJuf+X3ZiP3R9eiR3UOQiMW0huLiK70p0rhYEXs6XUECflTGFM4BBp BaacGM7TebtC/ksSciddGBJBi3/dypyja7sZJP2MhxIaQB4SgMuewzWTczac20cG6Cpx vqlM5M1u0IkM8rzj81nPU2p7/DcMv7WqQIsuEQkZEy++X/LmitpnRtEUGBVHUotXHAsO /WIm2ES4Gq76pcwLM6vL1OzcolRBjyIAYi/98oaXN+gOhTLOTLFB+Xd58ggyDcd1sRwR UxgK5zUk6MSQm9jQTrhydo6peY6dCmFz01ZRuGdobThQew2f2WFhCoQ8esTG7LbxGSgS /xWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307036; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H7w228qMV522vrZs8kcDs+ryF/z3Qx23mEIba2VleiM=; b=2mmRonhVSHvxjVrzn6PLmbuKfnMJsU5j415Z4WiMCK7jwi6kPpZkugMpiZ2OQUDUuK yfFDwKGyGaQ604vlFpv4igO779TV3ZZ2RnEgIuvRyUef3fNg29IBJD5yV6EB5d1hqilx YtG6xQ9AZ8ZEQNfdX31ibRPjnNETtxOxlWbTF0ApEszvc+od2LHOG6hAp/HNX6ysCeX0 kbffduL1/Fo7TRceXBfBww+dWCmuHg7ywyXABLuriktPj9OFWpdCtt9GrHAoBO+PhYPM jiLkJj8cFAs1x2VChcZoBVm5wSUqa2EkS6yROS7zm+VTOWVVlNu0uWNtxQxjqVrb2yyL N1Fg== X-Gm-Message-State: AO0yUKW9dU35kyjsYjU5RWUyrTUJcYlFGSp/3Y954iTLH9G27l6loF6L a46In524fAJpGITscfVKh3zanQ== X-Google-Smtp-Source: AK7set8wbFRZ+gTdfeeMmoYGKNlohNbp3im2C6wMeuz9Gduczc+1fYvDDBztnse7CFb8C/nnD9qRvQ== X-Received: by 2002:a7b:ce99:0:b0:3ee:126b:4a11 with SMTP id q25-20020a7bce99000000b003ee126b4a11mr623974wmj.6.1679307036739; Mon, 20 Mar 2023 03:10:36 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id k10-20020a5d6e8a000000b002d1daafea30sm8480224wrz.34.2023.03.20.03.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:36 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id E4E9E1FFB8; Mon, 20 Mar 2023 10:10:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 01/10] metadata: add .git-blame-ignore-revs Date: Mon, 20 Mar 2023 10:10:26 +0000 Message-Id: <20230320101035.2214196-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Someone mentioned this on IRC so I thought I would try it out with a few commits that are pure code style fixes. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé --- .git-blame-ignore-revs | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 .git-blame-ignore-revs diff --git a/.git-blame-ignore-revs b/.git-blame-ignore-revs new file mode 100644 index 0000000000..24208ece8c --- /dev/null +++ b/.git-blame-ignore-revs @@ -0,0 +1,18 @@ +# +# List of code-formatting clean ups the git blame can ignore +# +# git blame --ignore-revs-file .git-blame-ignore-revs +# +# or +# +# git config blame.ignoreRevsFile .git-blame-ignore-revs +# + +# gdbstub: clean-up indents +ad9e4585b3c7425759d3eea697afbca71d2c2082 + +# e1000e: fix code style +0eadd56bf53ab196a16d492d7dd31c62e1c24c32 + +# target/riscv: coding style fixes +8c7feddddd9218b407792120bcfda0347ed16205 From patchwork Mon Mar 20 10:10:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758925 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=B/qIpmA+; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9Ww0hMhz246f for ; Mon, 20 Mar 2023 21:12:12 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTb-0003mT-GB; Mon, 20 Mar 2023 06:10:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTR-0003ke-94 for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:42 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTP-0000CO-94 for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:41 -0400 Received: by mail-wr1-x42d.google.com with SMTP id y14so9756927wrq.4 for ; Mon, 20 Mar 2023 03:10:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307037; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lkGhHF/Bbg/xrVEDUpY4Rq5VsWgFg/qhGJTCVRi4OCI=; b=B/qIpmA+PwpepOvsnR7yA/h9x7ITqpE2H8ciuXD6XjIoWk2PHhlZU/72Y7cr/UzN43 Xtg9SRiKnMZ38REdxOd181X9Yx1ehkiHqoqzzaba9ZRZsjyijzvslwd7wJQkqMeYJAom D2UX/h8V5/Nss/MZFL6dLD8uIYaG+hS9ZPGPwrfxd7Ikqibasn5df/h0SXlFlKe14/Xa ETLDlY1UGxRbE3D8EHtjlkPivfV/FJbFX9vZ8qsvw0Y1lgqQGXdAUwBfDkQXAVN092pz GkBHPdKaIiEJJXuQOT96VHFf0xHbrldejHdcYSuX9qlNnbomkRLqSYV+rrmxDuGnvsIg qwhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307037; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lkGhHF/Bbg/xrVEDUpY4Rq5VsWgFg/qhGJTCVRi4OCI=; b=5c3b8hmp1F1rXPe7+pO89gkDVj2KpVMlLuQevPVooBcF8odmPlfAF+vuQXneMJMFuF 9/Fyv81PdKOickIBrcgbV3qoCRYmHUa0OPOGTlQhbMST7kiKY7uayCADEW8JJuf5lZOF tOTMgEx4bKhh9vNylir6NgPh2q+Ba8z8PKFIRf2G12fq0wnqI+aKkcGD/a7hfXWfbpgC 7PZ42+X2PCDRfJPu+YgecsR2b0gvBjMNYeSIORADZmHt2wwWbDjcY6mmVrhnpfwcv1p/ d9Aa7uId9dqlaZlr6fL/+UUYj1/oyOnpAddGgAx7LhGYr8DsibRdGUfL6Ok/VEVAMUQU C3HQ== X-Gm-Message-State: AO0yUKWd7nd2c34C/LT2xBaJI+MRq7X2AaW2SP4+INvxp0Datnr9cxF2 PZJVMfKe1Pwttkje1eSq1gjCIbODmya5MTsF/iA= X-Google-Smtp-Source: AK7set8gYCBBg+C7M0WqP/CHE74Ztr2wLZo6MzG6GJQJK4IUg9aoTqJQN1Oxn3kgnlWM3fiyXY/NHQ== X-Received: by 2002:a5d:4090:0:b0:2cf:aa6e:3ade with SMTP id o16-20020a5d4090000000b002cfaa6e3ademr13175365wrp.15.1679307037009; Mon, 20 Mar 2023 03:10:37 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id b9-20020a05600010c900b002c7163660a9sm8495893wrx.105.2023.03.20.03.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:36 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 0BB361FFBA; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 02/10] accel/tcg: move cpu_reloading_memory_map into cpu-exec-softmmu Date: Mon, 20 Mar 2023 10:10:27 +0000 Message-Id: <20230320101035.2214196-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This doesn't save much as cpu-exec-common still needs to be built per-target for its knowledge of CPUState but this helps with keeping things organised. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec-common.c | 30 ---------------------- accel/tcg/cpu-exec-softmmu.c | 50 ++++++++++++++++++++++++++++++++++++ accel/tcg/meson.build | 10 ++++++++ 3 files changed, 60 insertions(+), 30 deletions(-) create mode 100644 accel/tcg/cpu-exec-softmmu.c diff --git a/accel/tcg/cpu-exec-common.c b/accel/tcg/cpu-exec-common.c index e7962c9348..c6b0ad303e 100644 --- a/accel/tcg/cpu-exec-common.c +++ b/accel/tcg/cpu-exec-common.c @@ -32,36 +32,6 @@ void cpu_loop_exit_noexc(CPUState *cpu) cpu_loop_exit(cpu); } -#if defined(CONFIG_SOFTMMU) -void cpu_reloading_memory_map(void) -{ - if (qemu_in_vcpu_thread() && current_cpu->running) { - /* The guest can in theory prolong the RCU critical section as long - * as it feels like. The major problem with this is that because it - * can do multiple reconfigurations of the memory map within the - * critical section, we could potentially accumulate an unbounded - * collection of memory data structures awaiting reclamation. - * - * Because the only thing we're currently protecting with RCU is the - * memory data structures, it's sufficient to break the critical section - * in this callback, which we know will get called every time the - * memory map is rearranged. - * - * (If we add anything else in the system that uses RCU to protect - * its data structures, we will need to implement some other mechanism - * to force TCG CPUs to exit the critical section, at which point this - * part of this callback might become unnecessary.) - * - * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which - * only protects cpu->as->dispatch. Since we know our caller is about - * to reload it, it's safe to split the critical section. - */ - rcu_read_unlock(); - rcu_read_lock(); - } -} -#endif - void cpu_loop_exit(CPUState *cpu) { /* Undo the setting in cpu_tb_exec. */ diff --git a/accel/tcg/cpu-exec-softmmu.c b/accel/tcg/cpu-exec-softmmu.c new file mode 100644 index 0000000000..2318dd8c7d --- /dev/null +++ b/accel/tcg/cpu-exec-softmmu.c @@ -0,0 +1,50 @@ +/* + * Emulator main CPU execution loop, softmmu bits + * + * Copyright (c) 2003-2005 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "hw/core/cpu.h" +#include "sysemu/cpus.h" + +void cpu_reloading_memory_map(void) +{ + if (qemu_in_vcpu_thread() && current_cpu->running) { + /* The guest can in theory prolong the RCU critical section as long + * as it feels like. The major problem with this is that because it + * can do multiple reconfigurations of the memory map within the + * critical section, we could potentially accumulate an unbounded + * collection of memory data structures awaiting reclamation. + * + * Because the only thing we're currently protecting with RCU is the + * memory data structures, it's sufficient to break the critical section + * in this callback, which we know will get called every time the + * memory map is rearranged. + * + * (If we add anything else in the system that uses RCU to protect + * its data structures, we will need to implement some other mechanism + * to force TCG CPUs to exit the critical section, at which point this + * part of this callback might become unnecessary.) + * + * This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which + * only protects cpu->as->dispatch. Since we know our caller is about + * to reload it, it's safe to split the critical section. + */ + rcu_read_unlock(); + rcu_read_lock(); + } +} diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build index aeb20a6ef0..bdc086b90d 100644 --- a/accel/tcg/meson.build +++ b/accel/tcg/meson.build @@ -1,3 +1,9 @@ +# +# Currently most things here end up in specific_ss eventually because +# they need knowledge of CPUState. Stuff that that doesn't can live in +# common user, softmmu or overall code +# + tcg_ss = ss.source_set() tcg_ss.add(files( 'tcg-all.c', @@ -9,6 +15,7 @@ tcg_ss.add(files( 'translate-all.c', 'translator.c', )) + tcg_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c')) tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c')) tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c')]) @@ -27,3 +34,6 @@ tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files( 'tcg-accel-ops-icount.c', 'tcg-accel-ops-rr.c', )) + +# Common softmmu code +softmmu_ss.add(files('cpu-exec-softmmu.c')) From patchwork Mon Mar 20 10:10:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758923 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ffefsSjP; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9WQ4cqKz247g for ; Mon, 20 Mar 2023 21:11:46 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTc-0003nF-N8; Mon, 20 Mar 2023 06:10:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTT-0003l0-B4 for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wm1-x334.google.com ([2a00:1450:4864:20::334]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTP-0000CR-LG for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:41 -0400 Received: by mail-wm1-x334.google.com with SMTP id l15-20020a05600c4f0f00b003ed58a9a15eso7100573wmq.5 for ; Mon, 20 Mar 2023 03:10:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307038; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NlG2WYAuWf1MF90p6NWRpZT5faSFXPhuXyYZFUB3mGE=; b=ffefsSjPL0EcON5++v02JF+/iBRfzqP3dZCOcz3HrMx01UOXpH8sUSi0klS1vEHoj8 bT0BhNk7DgPs3hEE0ZCUHYWREvBv3f/iA+zKSiRbKiCheL1Xa35hFxueejR82/ghvsbi wHjQsxMzSanRYIuLSs+alMoPkykEVGLq/xSJa/sZKFgVJL3XX+jQ2vEda9vRkJ4TO265 LwhzrF0o1HOamlVUCq8zDuLg6jypNDUlRY/hGD4ZJKfGY0cIjUaDEyeYwooo48NUftFU 7j81bMUjiIDl2qCER/Kf76nwE3wfDjt/HJkVzxKsJxmGCBeaZ5dBaLZe1mlvdEz/vXjK dXgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307038; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NlG2WYAuWf1MF90p6NWRpZT5faSFXPhuXyYZFUB3mGE=; b=18Pkew18Yofgn5e0+7V+s7vALd+au1Nd4yrAJC6Yg2H1j5Wo/ZNdxIyPBNHwxzr44l 5r2DTrxR9xJsHrlm4LBOT1P63RyuNVpZ9Pl5jb9zEE2GniE2y6Df++l/vDJ6XZkyHjZO JRzxQXwHjP+aZUCcg1QGeCTdsN/jgDR/nku5jdHTbjqC/XJbL9IdtKFJdn/JwtVTlYSh tEAC/C8hShZbDPTvHm7bravOs41hhINVs4kdngUZz5sNzJFKH9trgNhfulLeHRpjZv3f ytEB09WPWklozpCEnvc7oyDPlkrPRUg9WfBy5n2XCjtSBQIL91Vlpsp98q0QgjqHDDgE c+Pg== X-Gm-Message-State: AO0yUKUI43k4ciXh/G9u40CLZVgXFLthDYajC9u9fqkzivskYFlMPYBX r8tewYvxwqnZQdDRkKUxMjb5VlyuPJrrn3o2Dnw= X-Google-Smtp-Source: AK7set+MJW4By7vZH7WQkmtw0WKZcgiKPZy6bK7xFrSQyNlr0K/Ossuqsb1LEv02PmTe1RRmuo6EGg== X-Received: by 2002:a05:600c:22cc:b0:3ed:e6c8:f11d with SMTP id 12-20020a05600c22cc00b003ede6c8f11dmr3146272wmg.7.1679307038036; Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id s17-20020a5d4251000000b002d1801018e2sm8509503wrr.63.2023.03.20.03.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:36 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 2B2F81FFBB; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 03/10] accel/tcg: move i386 halt handling to sysemu_ops Date: Mon, 20 Mar 2023 10:10:28 +0000 Message-Id: <20230320101035.2214196-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org We don't want to be polluting the core run loop code with target specific handling, punt it to sysemu_ops where it belongs. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- include/hw/core/sysemu-cpu-ops.h | 5 +++++ target/i386/cpu-internal.h | 1 + accel/tcg/cpu-exec.c | 14 +++----------- target/i386/cpu-sysemu.c | 12 ++++++++++++ target/i386/cpu.c | 1 + 5 files changed, 22 insertions(+), 11 deletions(-) diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h index ee169b872c..c9d30172c4 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -48,6 +48,11 @@ typedef struct SysemuCPUOps { * GUEST_PANICKED events. */ GuestPanicInformation* (*get_crash_info)(CPUState *cpu); + /** + * @handle_cpu_halt: Callback for special handling during cpu_handle_halt() + * @cs: The CPUState + */ + void (*handle_cpu_halt)(CPUState *cpu); /** * @write_elf32_note: Callback for writing a CPU-specific ELF note to a * 32-bit VM coredump. diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h index 9baac5c0b4..75b302fb33 100644 --- a/target/i386/cpu-internal.h +++ b/target/i386/cpu-internal.h @@ -65,6 +65,7 @@ void x86_cpu_get_crash_info_qom(Object *obj, Visitor *v, void x86_cpu_apic_create(X86CPU *cpu, Error **errp); void x86_cpu_apic_realize(X86CPU *cpu, Error **errp); void x86_cpu_machine_reset_cb(void *opaque); +void x86_cpu_handle_halt(CPUState *cs); #endif /* !CONFIG_USER_ONLY */ #endif /* I386_CPU_INTERNAL_H */ diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index c815f2dbfd..5e5906e199 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -22,6 +22,7 @@ #include "qapi/error.h" #include "qapi/type-helpers.h" #include "hw/core/tcg-cpu-ops.h" +#include "hw/core/sysemu-cpu-ops.h" #include "trace.h" #include "disas/disas.h" #include "exec/exec-all.h" @@ -30,9 +31,6 @@ #include "qemu/rcu.h" #include "exec/log.h" #include "qemu/main-loop.h" -#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) -#include "hw/i386/apic.h" -#endif #include "sysemu/cpus.h" #include "exec/cpu-all.h" #include "sysemu/cpu-timers.h" @@ -650,15 +648,9 @@ static inline bool cpu_handle_halt(CPUState *cpu) { #ifndef CONFIG_USER_ONLY if (cpu->halted) { -#if defined(TARGET_I386) - if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { - X86CPU *x86_cpu = X86_CPU(cpu); - qemu_mutex_lock_iothread(); - apic_poll_irq(x86_cpu->apic_state); - cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); - qemu_mutex_unlock_iothread(); + if (cpu->cc->sysemu_ops->handle_cpu_halt) { + cpu->cc->sysemu_ops->handle_cpu_halt(cpu); } -#endif /* TARGET_I386 */ if (!cpu_has_work(cpu)) { return true; } diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index 28115edf44..e545bf7590 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "cpu.h" #include "sysemu/xen.h" #include "sysemu/whpx.h" @@ -310,6 +311,17 @@ void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) } } +void x86_cpu_handle_halt(CPUState *cpu) +{ + if (cpu->interrupt_request & CPU_INTERRUPT_POLL) { + X86CPU *x86_cpu = X86_CPU(cpu); + qemu_mutex_lock_iothread(); + apic_poll_irq(x86_cpu->apic_state); + cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); + qemu_mutex_unlock_iothread(); + } +} + GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6576287e5b..67027d28b0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7241,6 +7241,7 @@ static const struct SysemuCPUOps i386_sysemu_ops = { .get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug, .asidx_from_attrs = x86_asidx_from_attrs, .get_crash_info = x86_cpu_get_crash_info, + .handle_cpu_halt = x86_cpu_handle_halt, .write_elf32_note = x86_cpu_write_elf32_note, .write_elf64_note = x86_cpu_write_elf64_note, .write_elf32_qemunote = x86_cpu_write_elf32_qemunote, From patchwork Mon Mar 20 10:10:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758928 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=cWh0kIiq; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9Xh5XDtz246f for ; Mon, 20 Mar 2023 21:12:52 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTd-0003nN-8Q; Mon, 20 Mar 2023 06:10:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTT-0003kx-9i for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTP-0000CT-OG for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:41 -0400 Received: by mail-wm1-x330.google.com with SMTP id o40-20020a05600c512800b003eddedc47aeso1706028wms.3 for ; Mon, 20 Mar 2023 03:10:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307038; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LUMw8RA1BNOCtad0CWVcs2eZdBZ6IcdOa6VvbiYXoBQ=; b=cWh0kIiq7/X1M52vBzGqfQwvnc/3V/91/jXSLKShOjVzIerO7SzbtSqFpVXpu2SVoL v5pbE4qEK9ithzYge01DZI0S/5DYbcdoQ14v8eTjj7sA4uB8dBARfbsleYZnrOOHlAXQ bJHzy6UrfHjfBBWzlqlB8H5epdAASKLZj93BZFNCjgAGSdHgtH/+pGDMqoQT8mU73v2w lo2IBy2Fef3WESNIO96NPQ8nsFEeSuuUfIruhHlmYgh5myoMpEVcpebvgPjH6C5/gUSD aGM6Y714CUiTOOXIdI/JKMA9WPKk6yHVpcy5QJJRsbhlvNuB3l0BSUwfc4bSjiKjhOy5 cz/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307038; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LUMw8RA1BNOCtad0CWVcs2eZdBZ6IcdOa6VvbiYXoBQ=; b=RNlNbx+glxDZbAukkU+FiVp86kgdeOysDBNdrSi/N041npUqU7UXtCOG52kJ9Yf6CK ZdfiSOosrhNCDLc4+J3zG2mLiFEVUSOkqcy1UbY0ql4XMNJlVlDAjLHNicxR1yzaVY6A kVG69uEIxLvZRq0xm2JJm5ELxUldgn4O7k3OiAkreSbhDh8yOYVH/4Qbu2roT+leTN8T ypv01resh3MSvAtIu1NpU9m9J1m5wLBhrN4m85xh95qUSBzEIT8g6OPwfVM8CnBE2iEo xzeeR0spSZofNT5cgDUCFW5Edoj+7vJ/3Ek89688EIKEaWGJbUVrLdsvXhACN9ilL2CY LK8Q== X-Gm-Message-State: AO0yUKWVOJZoOmvjRKbKEk4imCnFLdHoowCncmMNN7WE5pWSWqpebPLt OrOtAyhbpZShk8rFrcC7S012Vg== X-Google-Smtp-Source: AK7set+fjyTIh/zZNlwLj2zDOO9qRCgwB00abXgeRrUMJk6lzh8638aSlDvDACNhA+4ICcrp3T2VOg== X-Received: by 2002:a05:600c:3b8e:b0:3ed:290b:dc68 with SMTP id n14-20020a05600c3b8e00b003ed290bdc68mr23772731wms.12.1679307038198; Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id bg7-20020a05600c3c8700b003eb2e33f327sm27320431wmb.2.2023.03.20.03.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:36 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 4124B1FFBC; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 04/10] accel/tcg: don't bother with ifdef for CPU_DUMP_CCOP Date: Mon, 20 Mar 2023 10:10:29 +0000 Message-Id: <20230320101035.2214196-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org While only i386 dumps anything useful for the flag it could potentially be used by others. Front ends that don't understand the flag will ignore it anyway. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5e5906e199..f883be197f 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -309,14 +309,11 @@ static void log_cpu_exec(target_ulong pc, CPUState *cpu, if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { FILE *logfile = qemu_log_trylock(); if (logfile) { - int flags = 0; + int flags = CPU_DUMP_CCOP;; if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) { flags |= CPU_DUMP_FPU; } -#if defined(TARGET_I386) - flags |= CPU_DUMP_CCOP; -#endif cpu_dump_state(cpu, logfile, flags); qemu_log_unlock(logfile); } From patchwork Mon Mar 20 10:10:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758926 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XsM+Jvwx; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9XP0L6zz246f for ; Mon, 20 Mar 2023 21:12:37 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTc-0003n2-2b; Mon, 20 Mar 2023 06:10:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTT-0003ky-9r for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTQ-0000Cx-Cy for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:41 -0400 Received: by mail-wm1-x32e.google.com with SMTP id u11-20020a05600c19cb00b003edcc414997so2243909wmq.3 for ; Mon, 20 Mar 2023 03:10:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zAnVh7k03xLE58mG3oLOMO1waepQbpwXIySIk1v3C+8=; b=XsM+JvwxxH19827PpcXWEDIJjix0RtoE9yXcg4ijCoInDv9eI16r7WM1GW4XQJa3ca rMsQzCuv+cR1BR92rTJTX0gDV9c1O5i6gPNtrsJoq56QbujCUbW7OGIwgsg0aHqhlwv2 XUReo7yMYVJmVaG7rhjES27BkOhBtl0oEXdZIk0oOXHJJTjlxnD5Y+AX92ZFACDqkKmx upPZ3Knpxq2EwghLQnJIeB0PgMMh4H8WjDdMNVM2SesFXnrtuGL/hJHxDVY+imb/OW1p wASJgMbtvayTgdHy2qTbZiMgml6nOCR1czBTgE1pUZMMtQOV17CJVh9ypwM3xKpLaEcA DLLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zAnVh7k03xLE58mG3oLOMO1waepQbpwXIySIk1v3C+8=; b=xpILFA7U/0vpjXv8r9Q4iED3yuWno9NaGlwIzbG3Uwi/gcvYpNbBGXnh+J30lDGkjB 816GkSjh1MIDBJqhQRXXi9HcurIe7cb9bhEqLhgQCvgjRKaWj3BH1mDgPsdlYC0fJjw9 xfztqB8+6Q6lS7i31lZY63pZfvFIBLsQYvA98beiE76ST6vddtUf2m/ijAa8JhvGRnNY 0vNEGYAlHSTfWrjDU3mbaugOc0ZVNfk6wRLENMWmlh8OCBRi4aydD4K3k1KWvXc7FccO zbCezzrE8TVO4hmcqhyL9R+ADL6oin132m0rAenb8i1oko86SLuZQ1l+T78o+1EmPqgz 0iSw== X-Gm-Message-State: AO0yUKVO3yxqOvuDk28QfWXn/s3DqFblyjiEuRBkZtl9ACMrsU6hiRFW Rwh0rTINuuSYsEKnIMEqgrFGqA== X-Google-Smtp-Source: AK7set/J0PHhATqmxBUjrlGX7o7nTxJKBpUBunceCaWxn+rxxDGBgba18DClVG/63j0/IT/U25MjxQ== X-Received: by 2002:a1c:f601:0:b0:3ed:8bef:6a04 with SMTP id w1-20020a1cf601000000b003ed8bef6a04mr9687377wmc.27.1679307038981; Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id q8-20020a1cf308000000b003ed4f6c6234sm10016207wmq.23.2023.03.20.03.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 592A51FFBD; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 05/10] accel/tcg: remove the fake_user_interrupt guards Date: Mon, 20 Mar 2023 10:10:30 +0000 Message-Id: <20230320101035.2214196-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org At the cost of an empty tcg_ops field for most targets we can avoid target specific hacks in cpu-exec.c Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 2 +- accel/tcg/cpu-exec.c | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 20e3c0ffbb..66c0cecdde 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -50,7 +50,7 @@ struct TCGCPUOps { void (*debug_excp_handler)(CPUState *cpu); #ifdef NEED_CPU_H -#if defined(CONFIG_USER_ONLY) && defined(TARGET_I386) +#if defined(CONFIG_USER_ONLY) /** * @fake_user_interrupt: Callback for 'fake exception' handling. * diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index f883be197f..ea2e7004fe 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -698,13 +698,13 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) return true; } else { #if defined(CONFIG_USER_ONLY) - /* if user mode only, we simulate a fake exception - which will be handled outside the cpu execution - loop */ -#if defined(TARGET_I386) - CPUClass *cc = CPU_GET_CLASS(cpu); - cc->tcg_ops->fake_user_interrupt(cpu); -#endif /* TARGET_I386 */ + /* + * For some user mode handling we simulate a fake exception + * which will be handled outside the cpu execution loop + */ + if (cpu->cc->tcg_ops->fake_user_interrupt) { + cpu->cc->tcg_ops->fake_user_interrupt(cpu); + } *ret = cpu->exception_index; cpu->exception_index = -1; return true; From patchwork Mon Mar 20 10:10:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758921 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=d1iz4ZyA; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9W8069hz246f for ; Mon, 20 Mar 2023 21:11:32 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTc-0003nG-Qj; Mon, 20 Mar 2023 06:10:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTV-0003lu-84 for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:47 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTT-0000DT-5a for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: by mail-wm1-x335.google.com with SMTP id az3-20020a05600c600300b003ed2920d585so8785922wmb.2 for ; Mon, 20 Mar 2023 03:10:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PQQ9Zc32wwItU8j6zmcNnZIlm2bwTe3Yk6vCRGc6p3Q=; b=d1iz4ZyAc9VSuuaxtQaloQ/xZJNQISLg/wykWtreue2m4SCzoHNAaCsxZK0R/Mc/uT xMkSNEN1N++4Wn0poarLrbG7AJrkZ6sO5IWxRjh5i/DREBhkf3drpLojYoVZpxo+GdPL ZgQ02AzfSjnaoJEB0KNF/oXPZR/guCgnhBWX6oVvhVqBzeRW31oSuVAfRlxKjU8V8//z y4iwgcysGfSuDgRrzR0IO3BrcLawQVVPdEC9SBr+h6tjebtqDOVdCguOJ9p3twU+LpuF +CMMirpoRQz+FvC4+2oRbsMFM2VFw+PrBC7nJ+SxVkNxCp0A0O0qbwX+2HthPdHV1BG6 FYLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PQQ9Zc32wwItU8j6zmcNnZIlm2bwTe3Yk6vCRGc6p3Q=; b=KGyziOE621E6lVulxZmB82Q+ybfxiOOj1dCdr0jwvJGgSGpZGK2Z6nqffStuaWtRzN f7NnP1m5WFY6D5mQPMrRI85wYlH9GONd3dYpMYbp1Sx5xE1E89Ivd5Ar11a0nrxo11iU 3zNm2GKP6F65EvZr6QOU70/8IGY0m42p/JS8u6E9j4ngSPf+XHWnYW6SzlU4QFcPW182 b4w5jqKYf2Y4tWi5q+YsHJKc2vVZ4/T3ZFXeK8rfWz096A6DHVEgN2QmgRV46goDSvar eYvSYAxqR8bsZ9P6FjUFcpJcayz0QFExexjWuR0LukRhODMVUcY5kzc0gNYkGOm1GTmg zshg== X-Gm-Message-State: AO0yUKUobwzKWCmUn1DeHAnLCtbJCxvhJard9voeBSvWFjqovWkS3dcA MGejTIQfQP1Fd51YCCKG3Ll9MJ6otoxtwFjvCOY= X-Google-Smtp-Source: AK7set/fMdHrDiGBA2gu+vv2w9mh2USEnFR7VbP8c2zzpPLDiEEascDw3vQ3sQsPK+XPA5Y0qx+4/g== X-Received: by 2002:a05:600c:2215:b0:3ed:f5f3:5e64 with SMTP id z21-20020a05600c221500b003edf5f35e64mr2209147wml.16.1679307040233; Mon, 20 Mar 2023 03:10:40 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id l6-20020a05600c4f0600b003eda745f35esm7319581wmq.34.2023.03.20.03.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 745291FFBE; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 06/10] includes: move irq definitions out of cpu-all.h Date: Mon, 20 Mar 2023 10:10:31 +0000 Message-Id: <20230320101035.2214196-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org These are common across all versions of the system so it would help if we could use them for common code. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 52 +------------------------- include/exec/cpu-irq.h | 83 ++++++++++++++++++++++++++++++++++++++++++ include/exec/poison.h | 13 ------- 3 files changed, 84 insertions(+), 64 deletions(-) create mode 100644 include/exec/cpu-irq.h diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 2eb1176538..6b8085cf19 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -297,57 +297,7 @@ void *page_get_target_data(target_ulong address) CPUArchState *cpu_copy(CPUArchState *env); -/* Flags for use in ENV->INTERRUPT_PENDING. - - The numbers assigned here are non-sequential in order to preserve - binary compatibility with the vmstate dump. Bit 0 (0x0001) was - previously used for CPU_INTERRUPT_EXIT, and is cleared when loading - the vmstate dump. */ - -/* External hardware interrupt pending. This is typically used for - interrupts from devices. */ -#define CPU_INTERRUPT_HARD 0x0002 - -/* Exit the current TB. This is typically used when some system-level device - makes some change to the memory mapping. E.g. the a20 line change. */ -#define CPU_INTERRUPT_EXITTB 0x0004 - -/* Halt the CPU. */ -#define CPU_INTERRUPT_HALT 0x0020 - -/* Debug event pending. */ -#define CPU_INTERRUPT_DEBUG 0x0080 - -/* Reset signal. */ -#define CPU_INTERRUPT_RESET 0x0400 - -/* Several target-specific external hardware interrupts. Each target/cpu.h - should define proper names based on these defines. */ -#define CPU_INTERRUPT_TGT_EXT_0 0x0008 -#define CPU_INTERRUPT_TGT_EXT_1 0x0010 -#define CPU_INTERRUPT_TGT_EXT_2 0x0040 -#define CPU_INTERRUPT_TGT_EXT_3 0x0200 -#define CPU_INTERRUPT_TGT_EXT_4 0x1000 - -/* Several target-specific internal interrupts. These differ from the - preceding target-specific interrupts in that they are intended to - originate from within the cpu itself, typically in response to some - instruction being executed. These, therefore, are not masked while - single-stepping within the debugger. */ -#define CPU_INTERRUPT_TGT_INT_0 0x0100 -#define CPU_INTERRUPT_TGT_INT_1 0x0800 -#define CPU_INTERRUPT_TGT_INT_2 0x2000 - -/* First unused bit: 0x4000. */ - -/* The set of all bits that should be masked when single-stepping. */ -#define CPU_INTERRUPT_SSTEP_MASK \ - (CPU_INTERRUPT_HARD \ - | CPU_INTERRUPT_TGT_EXT_0 \ - | CPU_INTERRUPT_TGT_EXT_1 \ - | CPU_INTERRUPT_TGT_EXT_2 \ - | CPU_INTERRUPT_TGT_EXT_3 \ - | CPU_INTERRUPT_TGT_EXT_4) +#include "exec/cpu-irq.h" #ifdef CONFIG_USER_ONLY diff --git a/include/exec/cpu-irq.h b/include/exec/cpu-irq.h new file mode 100644 index 0000000000..58bd98d812 --- /dev/null +++ b/include/exec/cpu-irq.h @@ -0,0 +1,83 @@ +/* + * Internal execution defines for qemu irqs + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#ifndef EXEC_CPU_IRQ_H +#define EXEC_CPU_IRQ_H + +/* + * Flags for use in ENV->INTERRUPT_PENDING. + * + * The numbers assigned here are non-sequential in order to preserve + * binary compatibility with the vmstate dump. Bit 0 (0x0001) was + * previously used for CPU_INTERRUPT_EXIT, and is cleared when loading + * the vmstate dump. + */ + +/* + * External hardware interrupt pending. This is typically used for + * interrupts from devices. + */ +#define CPU_INTERRUPT_HARD 0x0002 + +/* + * Exit the current TB. This is typically used when some system-level device + * makes some change to the memory mapping. E.g. the a20 line change. + */ +#define CPU_INTERRUPT_EXITTB 0x0004 + +/* Halt the CPU. */ +#define CPU_INTERRUPT_HALT 0x0020 + +/* Debug event pending. */ +#define CPU_INTERRUPT_DEBUG 0x0080 + +/* Reset signal. */ +#define CPU_INTERRUPT_RESET 0x0400 + +/* Several target-specific external hardware interrupts. Each target/cpu.h + should define proper names based on these defines. */ +#define CPU_INTERRUPT_TGT_EXT_0 0x0008 +#define CPU_INTERRUPT_TGT_EXT_1 0x0010 +#define CPU_INTERRUPT_TGT_EXT_2 0x0040 +#define CPU_INTERRUPT_TGT_EXT_3 0x0200 +#define CPU_INTERRUPT_TGT_EXT_4 0x1000 + +/* + * Several target-specific internal interrupts. These differ from the + * preceding target-specific interrupts in that they are intended to + * originate from within the cpu itself, typically in response to some + * instruction being executed. These, therefore, are not masked while + * single-stepping within the debugger. + */ +#define CPU_INTERRUPT_TGT_INT_0 0x0100 +#define CPU_INTERRUPT_TGT_INT_1 0x0800 +#define CPU_INTERRUPT_TGT_INT_2 0x2000 + +/* First unused bit: 0x4000. */ + +/* The set of all bits that should be masked when single-stepping. */ +#define CPU_INTERRUPT_SSTEP_MASK \ + (CPU_INTERRUPT_HARD \ + | CPU_INTERRUPT_TGT_EXT_0 \ + | CPU_INTERRUPT_TGT_EXT_1 \ + | CPU_INTERRUPT_TGT_EXT_2 \ + | CPU_INTERRUPT_TGT_EXT_3 \ + | CPU_INTERRUPT_TGT_EXT_4) + +#endif /* EXEC_CPU_IRQ_H */ diff --git a/include/exec/poison.h b/include/exec/poison.h index 140daa4a85..a0ab1d7d46 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -52,19 +52,6 @@ #pragma GCC poison TARGET_PAGE_BITS #pragma GCC poison TARGET_PAGE_ALIGN -#pragma GCC poison CPU_INTERRUPT_HARD -#pragma GCC poison CPU_INTERRUPT_EXITTB -#pragma GCC poison CPU_INTERRUPT_HALT -#pragma GCC poison CPU_INTERRUPT_DEBUG -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_0 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_1 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_2 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_3 -#pragma GCC poison CPU_INTERRUPT_TGT_EXT_4 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_0 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_1 -#pragma GCC poison CPU_INTERRUPT_TGT_INT_2 - #pragma GCC poison CONFIG_ALPHA_DIS #pragma GCC poison CONFIG_CRIS_DIS #pragma GCC poison CONFIG_HPPA_DIS From patchwork Mon Mar 20 10:10:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758924 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=tVTfBFQe; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9WV5zXjz246f for ; Mon, 20 Mar 2023 21:11:50 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTf-0003oS-AI; Mon, 20 Mar 2023 06:10:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTT-0003l2-EH for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTR-0000D9-6k for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:43 -0400 Received: by mail-wm1-x331.google.com with SMTP id i5-20020a05600c354500b003edd24054e0so2024372wmq.4 for ; Mon, 20 Mar 2023 03:10:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4kskGeJQrf9Cxcn5vNzrmuB/lHaeNa1KLZhaRS/P5FA=; b=tVTfBFQe7Sr0LP39/RjEGZK8aR/R4trqGKJMo7w/nuXxEgYRWEQWUG5wtWPORLpejv UlBZzE/17C8FCh9Ys5BHHRbrMexpQetN/bRd1kyU6iPi3NCZKcyT+m/JcvQ2TB6bgppT onvtmiQozBvdnMw+0QgrSED0wuFgz2sQMou7KJsNVqRhZ41wWWkG6vhEKVZFqkbrB6IW 8VAKRIsLt/MHQawn3y7C3waDU5HQHY74qqZwfAbZZbO9r7D+0S6AfgE2TRMJFoax9+5P LtYKn0dydklvLcjkU/+hDMhHmtHoxfQZaErhfhI+mMgHTI3V2gI3LP09eGzWyTqSoWy4 j/4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4kskGeJQrf9Cxcn5vNzrmuB/lHaeNa1KLZhaRS/P5FA=; b=LcYMXBJUKsaF0LXzm6roahSIwDIBb6BQ4FMCE9kDRMfmt95RS4HTDdF/hfr5eutMB4 p3uSCROyFlTr3mYK43t1tIhxB0ctlf9/HZCNalPHP8vsThNyFoRwdaPKiA9fPn+oO+Nm IYoAAe6/WBBN5z0LqG2PfT55qOC+gknztvap1UEzvy+1hkJC4mWIqChJsv4Xgll/mu9A HN6xXcD4zTh4b1ayNFl/bW0qUoCoHtKjtfW12hLcqms1f9MCzc3/c9lgfajRnV3atERV h71yogRDibISORYxR5rJY+jQSQWT7Nqvsu6vKJKiNW/AWlMthvO+FZ6knlykkKnix27w RwQQ== X-Gm-Message-State: AO0yUKVX4O5Hg5a2OiEGokm+ihRtOGiIrr8vISgj9+vFQXqwzbhPofdC CzmtkSArRtahY0EnIIC8ENTXyg== X-Google-Smtp-Source: AK7set907v7gMikYK5L6/NPEw6FbCm0WHmBTxh3a78sigQsEG6P7upheKDhoJZJ+QyzfoaJ5uJOhug== X-Received: by 2002:a1c:4c05:0:b0:3ed:6a32:d792 with SMTP id z5-20020a1c4c05000000b003ed6a32d792mr11410851wmf.7.1679307039854; Mon, 20 Mar 2023 03:10:39 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id i26-20020a1c541a000000b003ed246f76a2sm16364366wmb.1.2023.03.20.03.10.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 8A80B1FFBF; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 07/10] accel/tcg: use QEMU_IOTHREAD_LOCK_GUARD to cover the exit Date: Mon, 20 Mar 2023 10:10:32 +0000 Message-Id: <20230320101035.2214196-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This avoids us having to make sure each exit path does an unlock. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index ea2e7004fe..daa6e24daf 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -774,7 +774,9 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, if (unlikely(qatomic_read(&cpu->interrupt_request))) { int interrupt_request; - qemu_mutex_lock_iothread(); + /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ + QEMU_IOTHREAD_LOCK_GUARD(); + interrupt_request = cpu->interrupt_request; if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { /* Mask out external interrupts for this step. */ @@ -783,7 +785,6 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, if (interrupt_request & CPU_INTERRUPT_DEBUG) { cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; cpu->exception_index = EXCP_DEBUG; - qemu_mutex_unlock_iothread(); return true; } #if !defined(CONFIG_USER_ONLY) @@ -794,7 +795,6 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; cpu->halted = 1; cpu->exception_index = EXCP_HLT; - qemu_mutex_unlock_iothread(); return true; } #if defined(TARGET_I386) @@ -805,14 +805,12 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); do_cpu_init(x86_cpu); cpu->exception_index = EXCP_HALTED; - qemu_mutex_unlock_iothread(); return true; } #else else if (interrupt_request & CPU_INTERRUPT_RESET) { replay_interrupt(); cpu_reset(cpu); - qemu_mutex_unlock_iothread(); return true; } #endif /* !TARGET_I386 */ @@ -835,7 +833,6 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, */ if (unlikely(cpu->singlestep_enabled)) { cpu->exception_index = EXCP_DEBUG; - qemu_mutex_unlock_iothread(); return true; } cpu->exception_index = -1; @@ -852,9 +849,6 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, the program flow was changed */ *last_tb = NULL; } - - /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ - qemu_mutex_unlock_iothread(); } /* Finally, check if we need to exit to the main loop. */ From patchwork Mon Mar 20 10:10:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758918 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=tsGUSQCe; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9Vt0Gpqz247g for ; Mon, 20 Mar 2023 21:11:16 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTb-0003mR-6j; Mon, 20 Mar 2023 06:10:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTU-0003l4-Pm for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTT-0000Dc-2s for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: by mail-wm1-x32a.google.com with SMTP id l15-20020a05600c4f0f00b003ed58a9a15eso7100673wmq.5 for ; Mon, 20 Mar 2023 03:10:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DLYB3843FF7GnXqw2uZL62dMpE0zmO1Pq0/V+yySmyc=; b=tsGUSQCeACRFIz7OGFa4rQgpCLODKhLW2IkVHWthOFOdfzuX8D6BhStoczeCT/LBIk FaLCibdY1ctY1InlCQsgIwLkl0Hoe1YuzhLFmOxPOrvgi6FUDeqbkc1vNE73SIYVrWDa 0Op8FYGelfIb7yeB/Kj3nSukroyJWvyi1TlL5bkj23RQ4bc3Ji2IstVwyBNvjTf28sbk KVPHRQz/rcvv5hCel2Pl1pIP8fRQZFU9USzP1F3pji6nPr70jRmiV8Upv+ZIJClh1q0F I7Wt4L7FLqolfOd5zuxuBOt6IdxJsxM8lrJoHx9ZgaZ5B5mgoYoLisYdAx91+Q08bZvc Sb/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DLYB3843FF7GnXqw2uZL62dMpE0zmO1Pq0/V+yySmyc=; b=XfKkI6egbwy/u2IDNv9JhOSg2a2djgq1opE/wpy4Ztp767u0M+ZfGIKtQMSBDveF17 XaQNS8vrsYHHQNPIQzVGspqFptMrseq3qBXUSp/lhaVHrWZ+PQsmUofKSdVzGaBcjVzB Y+4VEpr63Z+cMTbyhVZgquKXkITLn/2u3qts/1wlCz3N/tB7X3GkTCVYh5Vc/Y3Stf57 axQq3RAWcnG5uUiWey3H4v2eDoTeV/n8aJJVdR/kLr2doz8cGCT1SPayV2mtOleVxAy5 iACXbZQJM9jL82AEs7GAA5QK0y0xT0kxchu+GnH2r4eKMLyKWoGqtA/ZWu0xpQ1/JVoO JjQw== X-Gm-Message-State: AO0yUKWS+MXj1cfkiVL6WtGN4H7PgLzJppOpa0apqCFEfxQnpcQv4Rb9 77eIia3toRDaZBWAdnX7qyv+iA== X-Google-Smtp-Source: AK7set8Jre+gC9YyZMgkPg6FTd25Z5W1a5W9QDQJPT2PU5k+ToIrr/DdP1mijVWqkso+r/Or+hBM1g== X-Received: by 2002:a05:600c:350f:b0:3eb:3843:9f31 with SMTP id h15-20020a05600c350f00b003eb38439f31mr32018972wmq.10.1679307040592; Mon, 20 Mar 2023 03:10:40 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id m25-20020a7bca59000000b003ed341d2d68sm9910364wml.16.2023.03.20.03.10.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id AD1611FFB7; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 08/10] accel/tcg: push i386 specific hacks into handle_cpu_interrupt callback Date: Mon, 20 Mar 2023 10:10:33 +0000 Message-Id: <20230320101035.2214196-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Alex Bennée --- include/hw/core/sysemu-cpu-ops.h | 11 +++++++++++ target/i386/cpu-internal.h | 1 + accel/tcg/cpu-exec-softmmu.c | 16 ++++++++++++++++ accel/tcg/cpu-exec.c | 31 ++++++++++--------------------- target/i386/cpu-sysemu.c | 17 +++++++++++++++++ target/i386/cpu.c | 1 + 6 files changed, 56 insertions(+), 21 deletions(-) diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h index c9d30172c4..d53907b517 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -53,6 +53,15 @@ typedef struct SysemuCPUOps { * @cs: The CPUState */ void (*handle_cpu_halt)(CPUState *cpu); + /** + * @handle_cpu_interrupt: handle init/reset interrupts + * @cs: The CPUState + * @irq_request: the interrupt request + * + * Most architectures share a common handler. Returns true if the + * handler did indeed handle and interrupt. + */ + bool (*handle_cpu_interrupt)(CPUState *cpu, int irq_request); /** * @write_elf32_note: Callback for writing a CPU-specific ELF note to a * 32-bit VM coredump. @@ -94,4 +103,6 @@ typedef struct SysemuCPUOps { } SysemuCPUOps; +bool common_cpu_handle_interrupt(CPUState *cpu, int irq_request); + #endif /* SYSEMU_CPU_OPS_H */ diff --git a/target/i386/cpu-internal.h b/target/i386/cpu-internal.h index 75b302fb33..4fee4e125e 100644 --- a/target/i386/cpu-internal.h +++ b/target/i386/cpu-internal.h @@ -66,6 +66,7 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp); void x86_cpu_apic_realize(X86CPU *cpu, Error **errp); void x86_cpu_machine_reset_cb(void *opaque); void x86_cpu_handle_halt(CPUState *cs); +bool x86_cpu_handle_interrupt(CPUState *cpu, int irq_request); #endif /* !CONFIG_USER_ONLY */ #endif /* I386_CPU_INTERNAL_H */ diff --git a/accel/tcg/cpu-exec-softmmu.c b/accel/tcg/cpu-exec-softmmu.c index 2318dd8c7d..89e6cb2e3a 100644 --- a/accel/tcg/cpu-exec-softmmu.c +++ b/accel/tcg/cpu-exec-softmmu.c @@ -18,7 +18,11 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" +#include "exec/replay-core.h" +#include "exec/cpu-irq.h" #include "hw/core/cpu.h" +#include "hw/core/sysemu-cpu-ops.h" #include "sysemu/cpus.h" void cpu_reloading_memory_map(void) @@ -48,3 +52,15 @@ void cpu_reloading_memory_map(void) rcu_read_lock(); } } + +/* Called with BQL held */ +bool common_cpu_handle_interrupt(CPUState *cpu, int interrupt_request) +{ + if (interrupt_request & CPU_INTERRUPT_RESET) { + replay_interrupt(); + cpu_reset(cpu); + return true; + } else { + return false; + } +} diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index daa6e24daf..8fa19b7222 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -797,28 +797,17 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, cpu->exception_index = EXCP_HLT; return true; } -#if defined(TARGET_I386) - else if (interrupt_request & CPU_INTERRUPT_INIT) { - X86CPU *x86_cpu = X86_CPU(cpu); - CPUArchState *env = &x86_cpu->env; - replay_interrupt(); - cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); - do_cpu_init(x86_cpu); - cpu->exception_index = EXCP_HALTED; - return true; - } -#else - else if (interrupt_request & CPU_INTERRUPT_RESET) { - replay_interrupt(); - cpu_reset(cpu); + else if (cpu->cc->sysemu_ops->handle_cpu_interrupt && + cpu->cc->sysemu_ops->handle_cpu_interrupt(cpu, interrupt_request)) { + return true; + } else if (common_cpu_handle_interrupt(cpu, interrupt_request)) { return true; - } -#endif /* !TARGET_I386 */ - /* The target hook has 3 exit conditions: - False when the interrupt isn't processed, - True when it is, and we should restart on a new TB, - and via longjmp via cpu_loop_exit. */ - else { + } else { + /* + * The target hook has 3 exit conditions: False when the + * interrupt isn't processed, True when it is, and we should + * restart on a new TB, and via longjmp via cpu_loop_exit. + */ CPUClass *cc = CPU_GET_CLASS(cpu); if (cc->tcg_ops->cpu_exec_interrupt && diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index e545bf7590..5638ed4aa4 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -31,6 +31,7 @@ #include "hw/qdev-properties.h" #include "exec/address-spaces.h" +#include "exec/replay-core.h" #include "hw/i386/apic_internal.h" #include "cpu-internal.h" @@ -322,6 +323,22 @@ void x86_cpu_handle_halt(CPUState *cpu) } } +/* Called with BQL held */ +bool x86_cpu_handle_interrupt(CPUState *cpu, int interrupt_request) +{ + if (interrupt_request & CPU_INTERRUPT_INIT) { + X86CPU *x86_cpu = X86_CPU(cpu); + CPUArchState *env = &x86_cpu->env; + replay_interrupt(); + cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); + do_cpu_init(x86_cpu); + cpu->exception_index = EXCP_HALTED; + return true; + } else { + return false; + } +} + GuestPanicInformation *x86_cpu_get_crash_info(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 67027d28b0..1b66583987 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7242,6 +7242,7 @@ static const struct SysemuCPUOps i386_sysemu_ops = { .asidx_from_attrs = x86_asidx_from_attrs, .get_crash_info = x86_cpu_get_crash_info, .handle_cpu_halt = x86_cpu_handle_halt, + .handle_cpu_interrupt = x86_cpu_handle_interrupt, .write_elf32_note = x86_cpu_write_elf32_note, .write_elf64_note = x86_cpu_write_elf64_note, .write_elf32_qemunote = x86_cpu_write_elf32_qemunote, From patchwork Mon Mar 20 10:10:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758927 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=W1EBjXTm; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9Xf2NGGz246f for ; Mon, 20 Mar 2023 21:12:50 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTd-0003oA-Sa; Mon, 20 Mar 2023 06:10:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTT-0003l1-Ay for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTQ-0000D0-KG for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:42 -0400 Received: by mail-wr1-x42c.google.com with SMTP id d17so1322790wrb.11 for ; Mon, 20 Mar 2023 03:10:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cva0ieax6jGML0EyVMQUzaX64BrxGUwBDv8qEmGoIEA=; b=W1EBjXTmsyQ37x5a7mBbECHtVYXX+LQD/AUAD+3j16GvogtHMZkvvcG0jZaUSJfZ9i Un0c7imkaCWXwlrh6ApK4efLcdt44CKRGwftcGRtXuE4TCpV11EZ9SfE6A1lBIOOoXNJ VBQsvMmxz/UJBAubJRRZIJ34MhVS0JT/Ce3v7OPWiQs29K27++75Bn4Ia605HjqSbJQX WSItGwEZhnYtMBo/k9/GLWJ2cDzv2etEIICTvVzV9fVNKs6UooJCxwZEmXnEN/5HU9ou 2+bSyihk2JXqe0uz71VKMp/1uiMzQ6uTz9NY/sHTa8j7x5DP5DpgGP+8hT2BpQzAUwm/ C8QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cva0ieax6jGML0EyVMQUzaX64BrxGUwBDv8qEmGoIEA=; b=Lpb18FD6N6wrpRWJq59CzRxr8Y+n9vxknV5VNKbhQQiOrWbujloMsKtbpHr3Z8Pnk3 UY2wutmIbOz8xnby9Z+CbN/Q5MIPPFl7gi3kmRtsJURO2DVHvnkEGopqf5yxRn4Ac2sW wRIrXQ/GaiplgX/uisaiZ4NHCGLQCMlnCEPhGseRs2jtatU+ex7sRRg6izyXHt1TJYdd jLrnrYGBt/xMkgusl9rCrFeu7GHiVdObBE1uXl8VrwGkwfFqWio3S0ztrfTVHU2/JGlP iQ0p9BAEZbDyDv4BnzVkfqnQExAF0DlussjB/sPoGWw5O1VDAi4PAd8Tsy5LcfOLm1Qz +pTQ== X-Gm-Message-State: AO0yUKUfdSPosMYGbT8cHjYCtdsCkpeRk1TknNSW5FgZ1r+7rPBuZ0x4 z3rUqvJ78msp4QT02S4hiD+dRA== X-Google-Smtp-Source: AK7set+fcuyWJKnEZ7hgLBF+hJoP6BpHf/gl9ST4hMPmciSsMDbALl/+Xx7BikKtmZeZCncC/Ey5xA== X-Received: by 2002:a5d:6207:0:b0:2cf:eeae:88c3 with SMTP id y7-20020a5d6207000000b002cfeeae88c3mr12799388wru.32.1679307039149; Mon, 20 Mar 2023 03:10:39 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id v3-20020adfe4c3000000b002cf8220cc75sm604607wrm.24.2023.03.20.03.10.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id C7D5A1FFC0; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 09/10] accel/tcg: re-inline the filtering of virtual IRQs but data driven Date: Mon, 20 Mar 2023 10:10:34 +0000 Message-Id: <20230320101035.2214196-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Although only I386 currently uses it it is not inconceivable that other arches might find this facility useful. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- include/hw/core/tcg-cpu-ops.h | 5 +++++ accel/tcg/cpu-exec.c | 29 +++++++++-------------------- target/i386/tcg/tcg-cpu.c | 1 + 3 files changed, 15 insertions(+), 20 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 66c0cecdde..8e8df8c330 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -121,6 +121,11 @@ struct TCGCPUOps { */ bool (*io_recompile_replay_branch)(CPUState *cpu, const TranslationBlock *tb); + /** + * @virtual_interrupts: IRQs that can be ignored for replay purposes + */ + int virtual_interrupts; + #else /** * record_sigsegv: diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 8fa19b7222..56be7956e7 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -737,22 +737,6 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret) return false; } -#ifndef CONFIG_USER_ONLY -/* - * CPU_INTERRUPT_POLL is a virtual event which gets converted into a - * "real" interrupt event later. It does not need to be recorded for - * replay purposes. - */ -static inline bool need_replay_interrupt(int interrupt_request) -{ -#if defined(TARGET_I386) - return !(interrupt_request & CPU_INTERRUPT_POLL); -#else - return true; -#endif -} -#endif /* !CONFIG_USER_ONLY */ - static inline bool cpu_handle_interrupt(CPUState *cpu, TranslationBlock **last_tb) { @@ -808,11 +792,16 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, * interrupt isn't processed, True when it is, and we should * restart on a new TB, and via longjmp via cpu_loop_exit. */ - CPUClass *cc = CPU_GET_CLASS(cpu); + struct TCGCPUOps const *tcg_ops = cpu->cc->tcg_ops; - if (cc->tcg_ops->cpu_exec_interrupt && - cc->tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { - if (need_replay_interrupt(interrupt_request)) { + if (tcg_ops->cpu_exec_interrupt && + tcg_ops->cpu_exec_interrupt(cpu, interrupt_request)) { + /* + * Virtual events gets converted into a "real" + * interrupt event later. They do not need to be + * recorded for replay purposes. + */ + if (!(interrupt_request & tcg_ops->virtual_interrupts)) { replay_interrupt(); } /* diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index b942c306d6..750ae0f945 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -104,6 +104,7 @@ static const struct TCGCPUOps x86_tcg_ops = { .do_unaligned_access = x86_cpu_do_unaligned_access, .debug_excp_handler = breakpoint_handler, .debug_check_breakpoint = x86_debug_check_breakpoint, + .virtual_interrupts = CPU_INTERRUPT_POLL, #endif /* !CONFIG_USER_ONLY */ }; From patchwork Mon Mar 20 10:10:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1758922 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=oyBmGFF+; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pg9WQ4GH5z246f for ; Mon, 20 Mar 2023 21:11:46 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1peCTd-0003nx-Pt; Mon, 20 Mar 2023 06:10:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1peCTT-0003kw-96 for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:44 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1peCTQ-0000D3-Om for qemu-devel@nongnu.org; Mon, 20 Mar 2023 06:10:42 -0400 Received: by mail-wm1-x333.google.com with SMTP id p34so2049132wms.3 for ; Mon, 20 Mar 2023 03:10:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FnmBMm+SXTgqFEy4wlEqxWB8R7Mqnlhesphm0Wpbwgg=; b=oyBmGFF+xugS7ftyi/KFnkKOcysVlSnu4KRkaquSDvel/72SNe7x3t/wE8CquhCYOs trSzOoV7EqYmlNWycEWCgXK5UnyN7GIKVvNj0Vp3dJjRgfk0aGQiMfO3e4rYRfoQusnZ KvLZu1BDQ+do+VbWT5WRwI/1djqBpFSxPov19tS/fYualtzOxVHI5qtmHchu1CEWsY9N /KZyVGaDz7pXdclqwBvtYNRAQ6LeXeUwdEqCGMF1D1cSokvRwlSfiwi/BXsHwcXIRin7 EDy2JoV+FZyL/5UxdfQaY2aGkepsEOd8t7bGO9V3CWhqs2RyNY6/NCZuBIv/EN0th6aJ SGUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679307039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FnmBMm+SXTgqFEy4wlEqxWB8R7Mqnlhesphm0Wpbwgg=; b=3XMlHunXilWAYl14DNYImCCEzLa7YEFrZa2+6+PROTKdi/WjRzgoj1JCgKVJMWhFCf I081IP5zzGYSqBW+qw/Db5iR9vgNVje1Ko25Vr19n9TtRS6NZEjAYPWdYKNRrlv5Tj+o KoTqSAHSnbkSbo49z9X9EWepBtSkt5ljYGpT6h0NefK0uapA/tsdUxW/wTpO+VrednlJ 5A7SC+opLGOwv8klb7FxCJpO606+KdwZb1I7yTwzJn0vTh1RZpD5gynUcYwA8eqacuID 7KdnHhboqjGFOdD+1es180wyN1o1LQELatYlQom39UZPv7piT977l8+soXmkeWPeUVmg F0cA== X-Gm-Message-State: AO0yUKX0WxnqZyOBAbJ3RkNjYJ/7gz59nIPxSkZaESWH1EluyMwkxv0O aBD7zoMgW+LWclgsMmBA7+MtOjrG/EtMIYO8So0= X-Google-Smtp-Source: AK7set8mAwFb45Zy/LQPaBFCDThpf9v7PiUiZavkP5cFfSmcq8G/Wb5sSHwDucrUayfceOPIMmqOgA== X-Received: by 2002:a05:600c:25d1:b0:3ed:316d:668d with SMTP id 17-20020a05600c25d100b003ed316d668dmr17494283wml.5.1679307039306; Mon, 20 Mar 2023 03:10:39 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id i26-20020a1c541a000000b003ed246f76a2sm16364380wmb.1.2023.03.20.03.10.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Mar 2023 03:10:38 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id DD5641FFB8; Mon, 20 Mar 2023 10:10:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Alessandro Di Federico , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-devel@nongnu.org Cc: Richard Henderson , Paolo Bonzini , Eduardo Habkost , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH 10/10] accel/tcg: remove unused includes Date: Mon, 20 Mar 2023 10:10:35 +0000 Message-Id: <20230320101035.2214196-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230320101035.2214196-1-alex.bennee@linaro.org> References: <20230320101035.2214196-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 56be7956e7..90e327c3bb 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -19,20 +19,16 @@ #include "qemu/osdep.h" #include "qemu/qemu-print.h" -#include "qapi/error.h" -#include "qapi/type-helpers.h" #include "hw/core/tcg-cpu-ops.h" #include "hw/core/sysemu-cpu-ops.h" #include "trace.h" #include "disas/disas.h" -#include "exec/exec-all.h" #include "tcg/tcg.h" #include "qemu/atomic.h" #include "qemu/rcu.h" #include "exec/log.h" #include "qemu/main-loop.h" #include "sysemu/cpus.h" -#include "exec/cpu-all.h" #include "sysemu/cpu-timers.h" #include "exec/replay-core.h" #include "sysemu/tcg.h"