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a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1679195711; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=JctEIci37XJXTa+C9uYQmKuPbn/bxeP4anJ8vqZvHEo=; b=mjI0GWFGqYzB+Af8QUYOEf2bEUFCXFtIVz5wdu0jPCvla+Frda6oFmkFa9UAQjQFVZXFMb NEI9m8crDL37yiNduPfRemCgoyTPc6k1D1tsa8Q3dpU75PZ2pgIxJsFHS2E7UgXfv6O4D/ fIZQWiAANIShIihLoPJOIYxioj5dXM6wUYn6cKze03l+xCMXFjARwuK4p2AEGbUgglxH2p 1xYPuZC1uXvAT8yvFdrUyVmNMhVQQRry+sQn945gayz286Sb9smXM34LjOL2lct38Exwmp VUuRJbdtH9pWBp/3KEVMXzf8tX3Xlk7EMBkYl69QepYMIebLPzV0ybxjaXI9lg== To: u-boot@lists.denx.de Cc: Marek Vasut , Angelo Dureghello , Huan Wang , Simon Glass , Stefan Roese , Tom Rini Subject: [PATCH 1/4] arch: m68k: Use existing CONFIG_MCFTMR instead of CFG_MCFTMR Date: Sun, 19 Mar 2023 04:14:51 +0100 Message-Id: <20230319031454.282990-1-marek.vasut+renesas@mailbox.org> MIME-Version: 1.0 X-MBO-RS-ID: 534058f00318edc12da X-MBO-RS-META: pc76wnn8z6t63tcce7e6rkpp3zo87uop X-Rspamd-Queue-Id: 4PfNKF1f8Tz9sbf X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean There is an existing CONFIG_MCFTMR Kconfig symbol, use it and drop all other instances of CFG_MCFTMR. This duality is likely a result of bogus conversion to Kconfig. Signed-off-by: Marek Vasut --- Cc: Angelo Dureghello Cc: Huan Wang Cc: Marek Vasut Cc: Simon Glass Cc: Stefan Roese Cc: Tom Rini --- arch/m68k/Kconfig | 1 + arch/m68k/cpu/mcf523x/interrupts.c | 2 +- arch/m68k/cpu/mcf52x2/interrupts.c | 12 ++++++------ arch/m68k/cpu/mcf532x/interrupts.c | 2 +- arch/m68k/cpu/mcf5445x/interrupts.c | 2 +- arch/m68k/include/asm/immap.h | 24 ++++++++++++------------ arch/m68k/lib/time.c | 4 ++-- board/freescale/m53017evb/README | 2 +- board/freescale/m5373evb/README | 2 +- include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5249EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/amcore.h | 1 - include/configs/astro_mcf5373l.h | 1 - include/configs/cobra5272.h | 1 - include/configs/eb_cpu5282.h | 1 - include/configs/stmark2.h | 1 - 24 files changed, 26 insertions(+), 40 deletions(-) diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 76233ef563f..32759cde47d 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -200,5 +200,6 @@ source "board/sysam/stmark2/Kconfig" config MCFTMR bool "Use DMA timer" + default y endmenu diff --git a/arch/m68k/cpu/mcf523x/interrupts.c b/arch/m68k/cpu/mcf523x/interrupts.c index b02ea29f635..09c7f9e67cc 100644 --- a/arch/m68k/cpu/mcf523x/interrupts.c +++ b/arch/m68k/cpu/mcf523x/interrupts.c @@ -22,7 +22,7 @@ int interrupt_init(void) return 0; } -#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c index e787c7605f8..c5ed0600736 100644 --- a/arch/m68k/cpu/mcf52x2/interrupts.c +++ b/arch/m68k/cpu/mcf52x2/interrupts.c @@ -34,7 +34,7 @@ int interrupt_init(void) return 0; } -#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE); @@ -42,7 +42,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK); setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5272 */ #if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \ @@ -63,7 +63,7 @@ int interrupt_init(void) return 0; } -#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); @@ -72,7 +72,7 @@ void dtimer_intr_setup(void) clrbits_be32(&intp->imrl0, 0x00000001); clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */ #if defined(CONFIG_M5249) || defined(CONFIG_M5253) @@ -83,11 +83,11 @@ int interrupt_init(void) return 0; } -#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400); mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ #endif /* CONFIG_M5249 || CONFIG_M5253 */ diff --git a/arch/m68k/cpu/mcf532x/interrupts.c b/arch/m68k/cpu/mcf532x/interrupts.c index bbe823c0cf7..4f72fa88e58 100644 --- a/arch/m68k/cpu/mcf532x/interrupts.c +++ b/arch/m68k/cpu/mcf532x/interrupts.c @@ -23,7 +23,7 @@ int interrupt_init(void) return 0; } -#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/cpu/mcf5445x/interrupts.c b/arch/m68k/cpu/mcf5445x/interrupts.c index fb80a879c7e..400f3dee879 100644 --- a/arch/m68k/cpu/mcf5445x/interrupts.c +++ b/arch/m68k/cpu/mcf5445x/interrupts.c @@ -26,7 +26,7 @@ int interrupt_init(void) return 0; } -#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) void dtimer_intr_setup(void) { int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE); diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 74516cc6219..3b515fe2c65 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -16,7 +16,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -38,7 +38,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -63,7 +63,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -86,7 +86,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -105,7 +105,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -130,7 +130,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_TMR0) #define CFG_SYS_TMR_BASE (MMAP_TMR3) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr) @@ -152,7 +152,7 @@ #define CFG_SYS_NUM_IRQS (192) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -174,7 +174,7 @@ #define CFG_SYS_NUM_IRQS (128) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -196,7 +196,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *) \ @@ -217,7 +217,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -239,7 +239,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -269,7 +269,7 @@ #define MMAP_DSPI MMAP_DSPI0 /* Timer */ -#ifdef CFG_MCFTMR +#if CONFIG_IS_ENABLED(MCFTMR) #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0) diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index ca8c0396235..500e4dbbba2 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -25,7 +25,7 @@ static volatile ulong timestamp = 0; #define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2) #endif -#if defined(CFG_MCFTMR) +#if CONFIG_IS_ENABLED(MCFTMR) #ifndef CFG_SYS_UDELAY_BASE # error "uDelay base not defined!" #endif @@ -111,7 +111,7 @@ ulong get_timer(ulong base) return (timestamp - base); } -#endif /* CFG_MCFTMR */ +#endif /* CONFIG_MCFTMR */ /* * This function is derived from PowerPC code (read timebase as long long). diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README index 5d5c5e7adf9..34f05f3fdc7 100644 --- a/board/freescale/m53017evb/README +++ b/board/freescale/m53017evb/README @@ -87,7 +87,7 @@ CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop -CFG_MCFTMR -- define to use DMA timer +CONFIG_MCFTMR -- define to use DMA timer CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README index e8bf75f4fb9..7240648796b 100644 --- a/board/freescale/m5373evb/README +++ b/board/freescale/m5373evb/README @@ -86,7 +86,7 @@ CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop -CFG_MCFTMR -- define to use DMA timer +CONFIG_MCFTMR -- define to use DMA timer CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 4b89f31209a..d4c1e066884 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -111,6 +111,5 @@ #define CFG_SYS_CS0_MASK 0x007F0001 #define CFG_SYS_CS0_CTRL 0x00001FA0 -#define CFG_MCFTMR #endif /* _M5208EVBE_H */ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 14d46178116..e5428183400 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -130,6 +130,5 @@ # define CFG_SYS_CS0_CTRL 0x00001D80 #endif -#define CFG_MCFTMR #endif /* _M5329EVB_H */ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index b24042328d3..2f4743ce50c 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -120,6 +120,5 @@ #define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ #define CFG_SYS_GPIO1_LED 0x00400000 /* user led */ -#define CFG_MCFTMR #endif /* M5249 */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 008c7257c43..0ff0bfce90b 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -132,6 +132,5 @@ #define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ #define CFG_SYS_GPIO1_LED 0x00400000 /* user led */ -#define CFG_MCFTMR #endif /* _M5253DEMO_H */ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 49cf3e878ea..98a17181a41 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -107,6 +107,5 @@ #define CFG_SYS_PBDAT 0x0000 #define CFG_SYS_PDCNT 0x00000000 -#define CFG_MCFTMR #endif /* _M5272C3_H */ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 965327d759d..77ddf717643 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -116,6 +116,5 @@ #define CFG_SYS_CS1_CTRL 0x00001900 #define CFG_SYS_CS1_MASK 0x00070001 -#define CFG_MCFTMR #endif /* _M5275EVB_H */ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index f04d9b1b2ab..e289a23b800 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -127,6 +127,5 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF -#define CFG_MCFTMR #endif /* _CONFIG_M5282EVB_H */ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 04c456ff9f1..dcc5701ee0b 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -132,6 +132,5 @@ #define CFG_SYS_CS1_MASK 0x00070001 #define CFG_SYS_CS1_CTRL 0x00001FA0 -#define CFG_MCFTMR #endif /* _M53017EVB_H */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 0aa1ffd4d4f..dd5d4c98023 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -138,6 +138,5 @@ #define CFG_SYS_CS2_CTRL 0x00001f60 #endif -#define CFG_MCFTMR #endif /* _M5329EVB_H */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 8b9e65de98c..4bb99487509 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -136,6 +136,5 @@ #define CFG_SYS_CS2_MASK (16 << 20) #define CFG_SYS_CS2_CTRL 0x00001f60 -#define CFG_MCFTMR #endif /* _M5373EVB_H */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ca8d17bfd2c..4c695fb9df9 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -10,7 +10,6 @@ #define CFG_SYS_UART_PORT 0 -#define CFG_MCFTMR #define CFG_SYS_UART_PORT 0 #define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 80f8c4129f5..f3bfefa835e 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -184,6 +184,5 @@ #define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) -#define CFG_MCFTMR #endif /* _CONFIG_ASTRO_MCF5373L_H */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 276ecc30ccc..556705fb09f 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -184,6 +184,5 @@ configuration */ #define CFG_SYS_PBDAT 0x0000 /* PortB value reg. */ #define CFG_SYS_PDCNT 0x00000000 /* PortD control reg. */ -#define CFG_MCFTMR #endif /* _CONFIG_COBRA5272_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 9503ab66f0f..e2c9d9c43ce 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -138,7 +138,6 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF -#define CFG_MCFTMR #endif /* _CONFIG_M5282EVB_H */ /*---------------------------------------------------------------------*/ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 05de376f0e6..ffc47c80762 100644 --- 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From: Marek Vasut DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1679195712; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=p9P/JOqQS41rFSzB4p2pAj95HF/nNerbo5/xIjQvoF8=; b=P4j3UvJtnWkcDXNmcM/gFmvXBVfjmXK7qRngQTJP/XKQz/WKGn2zTbj03JXalWVFRAis3E 6o2dQ7D/qd5TlHqB2kbcMXAPN9uUC4om2MxL2kEfjvdmjFHcOm0yQzC6XRix2CwDZvhbBJ PnZh1z/8redovqR5/NWFno+IbwxYScFclS07xokMmv8xVT2DRdS8fCGy4Ho9yiW1kG0cua 8JvZvtTi9+2sZ6EVx6CtBTjaKal2bNHeZGz3LV2MUF3uYSAykxK3clFTm/1SxD0bOYgEI8 HFGsGdQ8bz4uX1xKsVL9qgunMF7yA2UvOTdJrLl8Wuf1XPNmN0cILfZXlKf41A== To: u-boot@lists.denx.de Cc: Marek Vasut , Angelo Dureghello , Huan Wang , Simon Glass , Stefan Roese , Tom Rini Subject: [PATCH 2/4] arch: m68k: Introduce trivial PIT based timer Date: Sun, 19 Mar 2023 04:14:52 +0100 Message-Id: <20230319031454.282990-2-marek.vasut+renesas@mailbox.org> In-Reply-To: <20230319031454.282990-1-marek.vasut+renesas@mailbox.org> References: <20230319031454.282990-1-marek.vasut+renesas@mailbox.org> MIME-Version: 1.0 X-MBO-RS-ID: 72482254a4a4a3621e3 X-MBO-RS-META: 8nw94ptensdtfxtpw66j19h9jhwnmmby X-Rspamd-Queue-Id: 4PfNKG1VT1z9sW9 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The QEMU emulation of m68k does not support DMA timer, the only timer that is supported is the PIT timer. Implement trivial PIT timer support for m68k. Signed-off-by: Marek Vasut --- Cc: Angelo Dureghello Cc: Huan Wang Cc: Marek Vasut Cc: Simon Glass Cc: Stefan Roese Cc: Tom Rini --- arch/m68k/include/asm/immap.h | 24 +++++++++++++++++++++++ arch/m68k/lib/time.c | 36 +++++++++++++++++++++++++++++++++-- common/board_f.c | 2 +- 3 files changed, 59 insertions(+), 3 deletions(-) diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 3b515fe2c65..aafa4f40cb3 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -25,6 +25,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -47,6 +49,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -72,6 +76,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5249 */ @@ -95,6 +101,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL3 | MCFSIM_ICR_PRI3) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5253 */ @@ -114,6 +122,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) /* Interrupt level 3, priority 6 */ #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -139,6 +149,8 @@ #define CFG_SYS_TMRINTR_PEND (0) #define CFG_SYS_TMRINTR_PRI (INT_ICR1_TMR3PI | INT_ICR1_TMR3IPL(5)) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5272 */ @@ -161,6 +173,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5275 */ @@ -183,6 +197,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5282 */ @@ -207,6 +223,8 @@ #define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | \ MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #endif /* CONFIG_M5307 */ @@ -226,6 +244,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -248,6 +268,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #define CFG_SYS_INTR_BASE (MMAP_INTC0) @@ -278,6 +300,8 @@ #define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) #define CFG_SYS_TMRINTR_PRI (6) #define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#else +#define CFG_SYS_UDELAY_BASE (MMAP_PIT0) #endif #define CFG_SYS_INTR_BASE (MMAP_INTC0) diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c index 500e4dbbba2..61db1e6c500 100644 --- a/arch/m68k/lib/time.c +++ b/arch/m68k/lib/time.c @@ -111,8 +111,6 @@ ulong get_timer(ulong base) return (timestamp - base); } -#endif /* CONFIG_MCFTMR */ - /* * This function is derived from PowerPC code (read timebase as long long). * On M68K it just returns the timer value. @@ -121,6 +119,40 @@ unsigned long long get_ticks(void) { return get_timer(0); } +#else +static u64 timer64 __section(".data"); +static u16 timer16 __section(".data"); + +uint64_t __weak get_ticks(void) +{ + volatile pit_t *timerp = (pit_t *) (CFG_SYS_UDELAY_BASE); + u16 val = ~timerp->pcntr; + + if (timer16 > val) + timer64 += 0xffff - timer16 + val; + else + timer64 += val - timer16; + + timer16 = val; + + return timer64; +} + +/* PIT timer */ +int timer_init(void) +{ + volatile pit_t *timerp = (pit_t *) (CFG_SYS_UDELAY_BASE); + + timer16 = 0; + timer64 = 0; + + /* Set up PIT as timebase clock */ + timerp->pmr = 0xffff; + timerp->pcsr = PIT_PCSR_EN | PIT_PCSR_OVW; + + return 0; +} +#endif /* CONFIG_MCFTMR */ unsigned long usec2ticks(unsigned long usec) { diff --git a/common/board_f.c b/common/board_f.c index f3c1ab53b1c..c3f502ebd03 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -863,7 +863,7 @@ static const init_fnc_t init_sequence_f[] = { /* get CPU and bus clocks according to the environment variable */ get_clocks, /* get CPU and bus clocks (etc.) */ #endif -#if !defined(CONFIG_M68K) +#if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CFG_MCFTMR)) timer_init, /* initialize timer */ #endif #if defined(CONFIG_BOARD_POSTCLK_INIT) From patchwork Sun Mar 19 03:14:53 2023 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1679195713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=nDXub5rxJDtbnc8i9BatUo3U2SIJ0fXUB/0bzf6s1eE=; b=NxZ64/q3laD9M7wzvAc4zEaA0RlfwLG05SbA5TI4LG51O4wyDa0MZHpIpziCxpJZljis1q YcrUmVU81cMXXD1D0GRZpzuTgAzUtojxdMse++GacrzCQ4bPWq2mpo9m+gTJlWAmRqGrJo 0ZP8kdiVJe5XsE2EP+1qC9VzbVthf+zVWt+EE/3ysAsvJenpkFpb6y0VLvCqWBCOSobGZX xbGvI+Gd09/iJbmFBPkZyt3wS8QEiBA0cn7Up0sTsp1iREjk9FQrR46vwGmDU+nKp63tvO SwHbiK9JobNV8CokZGPIxU2xIOXhDxE0dmByDcBbrE4pLVC6eBFdIPRgOFqrEg== To: u-boot@lists.denx.de Cc: Marek Vasut , Angelo Dureghello , Huan Wang , Simon Glass , Stefan Roese , Tom Rini Subject: [PATCH 3/4] arch: m68k: Add QEMU specific RAMBAR workaround Date: Sun, 19 Mar 2023 04:14:53 +0100 Message-Id: <20230319031454.282990-3-marek.vasut+renesas@mailbox.org> In-Reply-To: <20230319031454.282990-1-marek.vasut+renesas@mailbox.org> References: <20230319031454.282990-1-marek.vasut+renesas@mailbox.org> MIME-Version: 1.0 X-MBO-RS-ID: 57afac8a4195f1f614a X-MBO-RS-META: rosmt6qbpykh9bh7t844n3exfysb3qob X-Rspamd-Queue-Id: 4PfNKH17L7z9sc9 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The QEMU emulation of m68k does not support RAMBAR accesses, add Kconfig option which inhibits those accesses, so that U-Boot can be started in m68k QEMU for CI testing purpopses until QEMU emulation improves. Signed-off-by: Marek Vasut --- Cc: Angelo Dureghello Cc: Huan Wang Cc: Marek Vasut Cc: Simon Glass Cc: Stefan Roese Cc: Tom Rini --- arch/m68k/Kconfig | 11 ++++++++++- arch/m68k/cpu/mcf52x2/start.S | 4 ++-- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 32759cde47d..1911563e540 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -198,8 +198,17 @@ source "board/freescale/m5373evb/Kconfig" source "board/sysam/amcore/Kconfig" source "board/sysam/stmark2/Kconfig" +config M68K_QEMU + bool "Build with workarounds for incomplete QEMU emulation" + default n + help + QEMU 8.x currently does not implement RAMBAR accesses and + DMA timers. Enable this option for U-Boot CI purposes only + to skip the RAMBAR accesses. + config MCFTMR bool "Use DMA timer" - default y + default y if !M68K_QEMU + default n if M68K_QEMU endmenu diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index d48d0192eea..51d2e23df10 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -98,7 +98,7 @@ _start: nop move.w #0x2700,%sr -#if defined(CONFIG_M5208) +#if defined(CONFIG_M5208) && !defined(CONFIG_M68K_QEMU) /* Initialize RAMBAR: locate SRAM and validate it */ move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0 movec %d0, %RAMBAR1 @@ -120,7 +120,7 @@ _start: movec %d0, %RAMBAR0 #endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */ -#if defined(CONFIG_M5282) || defined(CONFIG_M5271) +#if (defined(CONFIG_M5282) || defined(CONFIG_M5271)) && !defined(CONFIG_M68K_QEMU) /* set MBAR address + valid flag */ move.l #(CFG_SYS_MBAR + 1), %d0 move.l %d0, 0x40000000 From patchwork Sun Mar 19 03:14:54 2023 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org; s=mail20150812; t=1679195714; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Z0Nz2CleDN0xYv8GVZO1MnrBz7Vkw/ftUgl6x9WnLqk=; b=MwMbiFpHNJWrUA3XB7iafTSfcR1GCv2NqRSkVkMikJNNrZGwopkU3Tpmi0SkFWqGEqn3+E cuxWjaAtgCl32B9S4EhukVWEf4XH18/tG37st4MKmS0ZQ6+urZ75RlcciWlrYeSAx2N6Ju O13o6o7ASy+16FxGCgsA3J3zkwTEQd62rvkRCbqI3Fj53XFGFj6V7kzOl4VFdy3msjtzKw 7W0dxOXFK2CKrCHPaB2vCXUO+CDDrA3OGx54o3AOKPrkrPvWhvbwOQeL1HpnY0IofIPgxc WTKhBI1zlpyrCrniqaizmatKedc6hEd45Xyz+QuphJlYElxEsZWwSbiOMWDgqw== To: u-boot@lists.denx.de Cc: Marek Vasut , Angelo Dureghello , Huan Wang , Simon Glass , Stefan Roese , Tom Rini Subject: [PATCH 4/4] CI: Add m68k target Date: Sun, 19 Mar 2023 04:14:54 +0100 Message-Id: <20230319031454.282990-4-marek.vasut+renesas@mailbox.org> In-Reply-To: <20230319031454.282990-1-marek.vasut+renesas@mailbox.org> References: <20230319031454.282990-1-marek.vasut+renesas@mailbox.org> MIME-Version: 1.0 X-MBO-RS-ID: 5481c1815131065c4d8 X-MBO-RS-META: sihkyhr35amjduputibpoo37w6rmb576 X-Rspamd-Queue-Id: 4PfNKJ1PBcz9sW7 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add M5208EVBE board to CI. This does not use default config due to limitations of QEMU emulation, instead the timer is switched from DMA timer to PIT timer and RAMBAR accesses are inhibited. Local QEMU launch command is as follows: $ qemu-system-m68k -nographic -machine mcf5208evb -cpu m5208 -bios u-boot.bin Signed-off-by: Marek Vasut --- Cc: Angelo Dureghello Cc: Huan Wang Cc: Marek Vasut Cc: Simon Glass Cc: Stefan Roese Cc: Tom Rini --- .azure-pipelines.yml | 5 +++++ .gitlab-ci.yml | 8 ++++++++ 2 files changed, 13 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 947c400f8d3..e4e0c4c4d0d 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -268,6 +268,11 @@ stages: qemu_arm64: TEST_PY_BD: "qemu_arm64" TEST_PY_TEST_SPEC: "not sleep" + qemu_m68k: + TEST_PY_BD: "M5208EVBE" + TEST_PY_ID: "--id qemu" + TEST_PY_TEST_SPEC: "not sleep and not efi" + OVERRIDE: "-a CONFIG_M68K_QEMU=y -a CONFIG_MCFTMR=n" qemu_malta: TEST_PY_BD: "malta" TEST_PY_ID: "--id qemu" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 272d69e2206..4c144ab938a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -322,6 +322,14 @@ qemu_arm64 test.py: TEST_PY_TEST_SPEC: "not sleep" <<: *buildman_and_testpy_dfn +qemu_m68k test.py: + variables: + TEST_PY_BD: "M5208EVBE" + TEST_PY_TEST_SPEC: "not sleep and not efi" + TEST_PY_ID: "--id qemu" + OVERRIDE: "-a CONFIG_M68K_QEMU=y -a CONFIG_MCFTMR=n" + <<: *buildman_and_testpy_dfn + qemu_malta test.py: variables: TEST_PY_BD: "malta"