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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:26 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 01/13] Revert "buildman: Correct CROSS_COMPILE output for sandbox" Date: Sun, 12 Mar 2023 21:10:58 -0600 Message-Id: <20230313031111.725395-2-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This reverts commit bd0a548ad4a155fec29473d4cc8e135832926973. Signed-off-by: Simon Glass --- tools/buildman/toolchain.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index 8f9130bdcdf6..688f2e268726 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -156,8 +156,9 @@ class Toolchain: Returns: Value of that environment variable or arguments """ + wrapper = self.GetWrapper() if which == VAR_CROSS_COMPILE: - return self.GetWrapper() + self.cross + return wrapper + os.path.join(self.path, self.cross) elif which == VAR_PATH: return self.path elif which == VAR_ARCH: From patchwork Mon Mar 13 03:10:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756028 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=XG6I2UGo; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhY52R5Mz1yWt for ; Mon, 13 Mar 2023 14:12:41 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0FD7A8610E; Mon, 13 Mar 2023 04:11:40 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="XG6I2UGo"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id B96C8860F4; Mon, 13 Mar 2023 04:11:33 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x12e.google.com (mail-il1-x12e.google.com [IPv6:2607:f8b0:4864:20::12e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 95EEE860FA for ; Mon, 13 Mar 2023 04:11:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x12e.google.com with SMTP id h5so2282800ile.13 for ; Sun, 12 Mar 2023 20:11:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677088; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yCNuqXJAkvBg6N1+19ryZU7jS11vfqWP8L14/uxh168=; b=XG6I2UGo1ZCOsmRDJPpzFgZpyneGvVIEYoEEXfUrKBF6PCAqh/P7baWyQLvwM5muyL 33gDABE4X8uFojySglp7+VzF1fOCNUcmVrZ/DcJj2hW8+rBacAZ8dUiZfvpAnOJizMbP NgfJYR3PBwa5Tf4A5LvItbd7B1QKrUR2W6uz0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677088; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yCNuqXJAkvBg6N1+19ryZU7jS11vfqWP8L14/uxh168=; b=ah0T5ZNBEEc8wvrJYOlzvtLOFx6FgLgVUijXg8b50ngCK6giGlsMOCMmixsdJuYZiW 1117ln3luwcjOXWtNnqG7xRdcTPiUQ+Z2CA6x8Gd4FtjRRHfcSsG7jUtEDLeKkcl00En As4FRGCqJIap6rT72Ji0T0eJAiSpQzjCvZNEA6Kewx2V02spvMfmolArHYC5sCy7PcYY Mv60l1Dh7QYjZa4MIbPkjHRFrm4spN5jFl6vbxkAe46JGXNgUm4LohrpG2p/0t2N8TNc B49p3Ov+w4sqgUG1liXerkjMoF5URUGZvXN5MuVIJ8drPxGPGAQiJPeBDVXSgK0ZJIhR gkfg== X-Gm-Message-State: AO0yUKUzPWunrt3RLLIAtqh4u3q88A1uOKjZoyjkr3iy0pCjTHPXaxCm 5po7tABcXRm6063H8N0FtFzkJri8X+9WalICzGA= X-Google-Smtp-Source: AK7set9lueMzS79mPXOmmJc55TotRCoS9CXQXt7AdNcoeAt1IsCPeK8xyW9n4BGnpbnOCZZkhwtfow== X-Received: by 2002:a92:cda2:0:b0:315:9a7e:fb07 with SMTP id g2-20020a92cda2000000b003159a7efb07mr23733016ild.20.1678677088184; Sun, 12 Mar 2023 20:11:28 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:27 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 02/13] buildman: Fix CROSS_COMPILE output for sandbox Date: Sun, 12 Mar 2023 21:10:59 -0600 Message-Id: <20230313031111.725395-3-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The previous attempt at fixing this broke the normal usage of the -A flag. At present, 'buildman -A sandbox' adds the path containing the toolchain. We can assume that this is in the path and we don't want to set CROSS_COMPILE=/bin/ Change this to align with what MakeEnvironment() does, but only for sandbox boards. Signed-off-by: Simon Glass --- tools/buildman/toolchain.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index 688f2e268726..241e8e69307f 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -156,9 +156,10 @@ class Toolchain: Returns: Value of that environment variable or arguments """ - wrapper = self.GetWrapper() if which == VAR_CROSS_COMPILE: - return wrapper + os.path.join(self.path, self.cross) + wrapper = self.GetWrapper() + base = '' if self.arch == 'sandbox' else self.path + return wrapper + os.path.join(base, self.cross) elif which == VAR_PATH: return self.path elif which == VAR_ARCH: From patchwork Mon Mar 13 03:11:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756029 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=SRVVyisu; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhYK3kHLz1yWt for ; Mon, 13 Mar 2023 14:12:53 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3464985C45; Mon, 13 Mar 2023 04:11:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="SRVVyisu"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3882A860F4; Mon, 13 Mar 2023 04:11:35 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd36.google.com (mail-io1-xd36.google.com [IPv6:2607:f8b0:4864:20::d36]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8FAB2859B4 for ; Mon, 13 Mar 2023 04:11:30 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd36.google.com with SMTP id 76so4481958iou.9 for ; Sun, 12 Mar 2023 20:11:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677089; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VRayeN6qa1Fb6XI8n1/2JQUgjE2F5410TApHu96DFa4=; b=SRVVyisuhWWjmIxVJJ9Ta2iWumfYRF+yZCbtv6jeIR94cudLt9VMiIWfyq6DjD7opw tia6Utwa2CLjhXwqQsY0Cx7ej2A9OV8CLPWqIoC2LbNVA28uiDLgcsJu0o7oYjEB3G8c b01PRxhIBGDKZLo2FuQ0JlAFEQJpCtXBuGKXE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677089; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VRayeN6qa1Fb6XI8n1/2JQUgjE2F5410TApHu96DFa4=; b=5zhDCIVnQOYvA3TnUa948HNYCGVcIfBV8YFpST8Kgbencz1FIhsy+DUan16DdwoYPk 6rWPopnZqBPWeKAS5uJaQokdn9AqH9yTmP2ImQJ9bH1HrIldRJnhSkxtWi0AnQLuAA1s ZZG6yiSl7PsiQuekTZ4RSqHaKKbpXESMjCbjI0IEL9B/KBBAoxAi4wzY11IHuWqKIWiR /nHZL/+YislLPN87ZE56QdxD2mkd79/eAhZmlxH0Z0tKJ2iBomXWu+vTKPDJHmsGz12/ bzfrqDQvZ2lGCiBCjmtkerYTZDOB2oorpXx/khPTG3pE7Y6W+IeSVqFbp7/+mWXKuIlA P89w== X-Gm-Message-State: AO0yUKU18D3H0rjR0SL4th00EZhoeli75HtKlx0Nl0ZRlGqlrJrxaRTZ pcNODYpcpkClk7aK4tExkTAlDEpMC5jPYpEjRJs= X-Google-Smtp-Source: AK7set/zpHYtGHqzlO9xb97xppLHi8CoEfwf80Kp+qzBrByyU3M16uNS97pWAWF9gTU8On7NMqikmA== X-Received: by 2002:a5d:9acd:0:b0:704:d003:56be with SMTP id x13-20020a5d9acd000000b00704d00356bemr10449975ion.7.1678677088924; Sun, 12 Mar 2023 20:11:28 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:28 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 03/13] x86: samus: Drop EFI_LOADER Date: Sun, 12 Mar 2023 21:11:00 -0600 Message-Id: <20230313031111.725395-4-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This adds a lot of code so that it cannot be build with the binary blobs. It is not used on this board. Drop it. Signed-off-by: Simon Glass --- configs/chromebook_samus_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index b933a2352e3f..0d20891d2bcc 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -84,3 +84,4 @@ CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_TPM=y # CONFIG_GZIP is not set +# CONFIG_EFI_LOADER is not set From patchwork Mon Mar 13 03:11:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756034 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=XGx6DXI/; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhZV1W1rz1yWt for ; Mon, 13 Mar 2023 14:13:54 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 173788611D; Mon, 13 Mar 2023 04:12:09 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="XGx6DXI/"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id D8C27859B4; Mon, 13 Mar 2023 04:11:38 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x12c.google.com (mail-il1-x12c.google.com [IPv6:2607:f8b0:4864:20::12c]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 923F585C45 for ; Mon, 13 Mar 2023 04:11:31 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x12c.google.com with SMTP id r4so337317ilt.8 for ; Sun, 12 Mar 2023 20:11:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677089; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CYTZiMBafjzoXmqrL5A38iOAe+FXGAs56IJ9PsIcYGI=; b=XGx6DXI/OmvEdzphPOIDKfputRvMDZQ5i1deTOqAISZzmsreEkRtCuwcGSVG4C2fUX wfsCJ8wGsJIMgQRcDEN+1/G8FeY0OC61Ojaz152bhGQAkWVR0KTl0dZQafOeLQoWDNV6 IBc3VfY4WvclaUtyeMIHzjOEjZqGeR8mesf+Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677089; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CYTZiMBafjzoXmqrL5A38iOAe+FXGAs56IJ9PsIcYGI=; b=mlESBuaQuhAwt5beyTYLqnCjKItf6tJ/cC+Xqc/O3DguvYT3yse/sT5ssiHtfGhxkE k0UtSEanZKBDS/+gruG3qhoWszvYLMX5RdqlkSW5Es+PR9WnE1xbyQqxyrmmcSCBTFyN P4aH6sRoxnmT6DJOg7vI8WNWS4brzPk6UJ5Vv5Ii0D751teiS8rJOz6GN6fWlRpwM1Qn fBkK+EltrjjSp8dYT3jfhnR+r4GXwXhTmAyNxiCLLvh1aw7yYG2De4Cj9DPI695dbdjn V3x8pRKA/9Ith2QjxiXUhvzaHEmHN42/vByJz2NY+zJhmpvT9vEsl7kq7TAILlGNQwCr wOLg== X-Gm-Message-State: AO0yUKXrY4FRLO58AQqGQJ2jUNFhfvZ3rOJW9lnIvDhwqJ2PFfzd0IRa vnNjJvzfoQK009ED40rR0HFhnq+cXK9ZDrdF5VY= X-Google-Smtp-Source: AK7set8F/a2dAmRfs6NmpwRKjHXiyW4JkBfZGagbnsTe2uBLOJTzHPHA36eUjUilCwClMZum1M9GHA== X-Received: by 2002:a05:6e02:20ec:b0:323:7a4:808a with SMTP id q12-20020a056e0220ec00b0032307a4808amr1784625ilv.11.1678677089753; Sun, 12 Mar 2023 20:11:29 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:29 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 04/13] x86: ivybridge: Ensure LPC is available for GPIO base Date: Sun, 12 Mar 2023 21:11:01 -0600 Message-Id: <20230313031111.725395-5-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The bd82x6x_get_gpio_base() does not work if the LPC is not set up. Probe it early to avoid this problem. In chromebook_link64 this propblem shows up as an inability to read the GPIO straps for the memory type. Signed-off-by: Simon Glass --- arch/x86/cpu/ivybridge/bd82x6x.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 89312a863499..417290f559e9 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -31,7 +31,6 @@ DECLARE_GLOBAL_DATA_PTR; #define RCBA_AUDIO_CONFIG_HDA BIT(31) #define RCBA_AUDIO_CONFIG_MASK 0xfe -#ifndef CONFIG_HAVE_FSP static int pch_revision_id = -1; static int pch_type = -1; @@ -162,15 +161,19 @@ void pch_iobp_update(struct udevice *dev, u32 address, u32 andvalue, static int bd82x6x_probe(struct udevice *dev) { - if (!(gd->flags & GD_FLG_RELOC)) - return 0; + /* make sure the LPC is inited since it provides the gpio base */ + uclass_first_device(UCLASS_LPC, &dev); + + if (!IS_ENABLED(CONFIG_HAVE_FSP)) { + if (!(gd->flags & GD_FLG_RELOC)) + return 0; - /* Cause the SATA device to do its init */ - uclass_first_device(UCLASS_AHCI, &dev); + /* Cause the SATA device to do its init */ + uclass_first_device(UCLASS_AHCI, &dev); + } return 0; } -#endif /* CONFIG_HAVE_FSP */ static int bd82x6x_pch_get_spi_base(struct udevice *dev, ulong *sbasep) { @@ -269,8 +272,6 @@ U_BOOT_DRIVER(bd82x6x_drv) = { .name = "bd82x6x", .id = UCLASS_PCH, .of_match = bd82x6x_ids, -#ifndef CONFIG_HAVE_FSP .probe = bd82x6x_probe, -#endif .ops = &bd82x6x_pch_ops, }; From patchwork Mon Mar 13 03:11:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756030 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:30 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 05/13] x86: Support debug UART in 64-bit mode Date: Sun, 12 Mar 2023 21:11:02 -0600 Message-Id: <20230313031111.725395-6-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The debug UART is already set up in SPL, so there is no need to do anything here. We must provide the (empty) function though. Signed-off-by: Simon Glass --- arch/x86/cpu/x86_64/cpu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 6a387612916c..d1c3873dd6a7 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -50,3 +50,10 @@ int x86_cpu_init_f(void) { return 0; } + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + /* this was already done in SPL */ +} +#endif From patchwork Mon Mar 13 03:11:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756031 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=XRmIbKtt; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhYn5d4Wz1yWt for ; Mon, 13 Mar 2023 14:13:17 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B72D586109; Mon, 13 Mar 2023 04:11:51 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="XRmIbKtt"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 35820858ED; Mon, 13 Mar 2023 04:11:36 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x136.google.com (mail-il1-x136.google.com [IPv6:2607:f8b0:4864:20::136]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E26E386022 for ; Mon, 13 Mar 2023 04:11:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x136.google.com with SMTP id x10so6299110ill.12 for ; Sun, 12 Mar 2023 20:11:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677091; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1eeEoYPIuGpjlxw1zyr5GTEiDzfdn90QI/GYWFubmv4=; b=XRmIbKtt/WokiZIzSDYPR+Qii+dCAk5eCyXKEMDgED/hutrTmFHl+3Pz1E3+R9Zbr4 PXaIn/XpL1od140n/1r878xk7PKPfgen5iJQybHum1qt6/9QwjaYCfkJis402y/cQIHX FokrofJ6I30rvIOTuFRCCv+ZXUl+IznkND2Qg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677091; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1eeEoYPIuGpjlxw1zyr5GTEiDzfdn90QI/GYWFubmv4=; b=BUwi7YJut9/Ld4WP1lJyC+9DnIgIKy5eYmncV0WVIgFh6gVROvF0DJnXa6WntPlFb0 0JxqEp6tAyMi7Z34I+BUU2MyaIZjfFiUDmUGWXmT3Oxgyaeqk8H4SGodY7btHhc6vT4d 4xqPG7S4gRTPDZFQnHLyzVvbfOaJIgre6f42fV4oegTkpcMdgth2N1YmNejBgHFX3yae A3c7+1t6T88XfOTcHeXRp+kC047htmVvjMR3H6eEsmkzDAUU5Yt6rjlMv8zj0Gfno99+ Ef7woWmxquw8tyYsqd6Ua5xfRcshueASLaVnJMdPLQhMWET6v7ODkU9XIItmyFdYe4bE GpUQ== X-Gm-Message-State: AO0yUKVKUnB5KNy08dmETF9DzMV1Tx9TTXH4UdZ7XV7PRE0M1lM/ANlY Lww0gB7jH1jZvtd5ELvm8d1KHuCKO5lkEppjA2c= X-Google-Smtp-Source: AK7set9JFU3wuHBD7yNtQ0Nej6zZMT2IygyZop7dQuTIYmS9tg92bUvnecaT7RTNCQJyUpPTKhkpPw== X-Received: by 2002:a05:6e02:1686:b0:319:6826:5577 with SMTP id f6-20020a056e02168600b0031968265577mr29932435ila.23.1678677091456; Sun, 12 Mar 2023 20:11:31 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:31 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 06/13] x86: Tidy up availability of string functions Date: Sun, 12 Mar 2023 21:11:03 -0600 Message-Id: <20230313031111.725395-7-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean For now, just enable the fast-but-large string functions in 32-boot U-Boot proper only. Avoid using them in SPL. We cannot use then in 64-bit builds since we only have 32-bit assembly. Signed-off-by: Simon Glass --- arch/x86/include/asm/string.h | 6 +++++- arch/x86/lib/Makefile | 4 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/string.h b/arch/x86/include/asm/string.h index c15b264a5c08..5c49b0f009b7 100644 --- a/arch/x86/include/asm/string.h +++ b/arch/x86/include/asm/string.h @@ -14,7 +14,11 @@ extern char *strrchr(const char *s, int c); #undef __HAVE_ARCH_STRCHR extern char *strchr(const char *s, int c); -#ifdef CONFIG_X86_64 +/* + * Our assembly routines do not work on in 64-bit mode and we don't do a lot of + * copying in SPL, so code size is more important there. + */ +#if defined(CONFIG_SPL_BUILD) || !IS_ENABLED(CONFIG_X86_32BIT_INIT) #undef __HAVE_ARCH_MEMCPY extern void *memcpy(void *, const void *, __kernel_size_t); diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index a6f22441474b..b0612ae6dd5f 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -10,7 +10,9 @@ obj-y += bios.o obj-y += bios_asm.o obj-y += bios_interrupts.o endif -obj-y += string.o +endif +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_X86_32BIT_INIT) += string.o endif ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_BOOTM) += bootm.o From patchwork Mon Mar 13 03:11:04 2023 Content-Type: text/plain; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:32 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 07/13] x86: mrc: Correct SPL debug message Date: Sun, 12 Mar 2023 21:11:04 -0600 Message-Id: <20230313031111.725395-8-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean SPL printf() does not normally support %#x so just use %x instead. Hex is expected in U-Boot anyway. Signed-off-by: Simon Glass --- arch/x86/lib/mrccache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 38632e513fce..2f6f6880003e 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -303,7 +303,7 @@ static int mrccache_save_type(enum mrc_type_t type) mrc = &gd->arch.mrc[type]; if (!mrc->len) return 0; - log_debug("Saving %#x bytes of MRC output data type %d to SPI flash\n", + log_debug("Saving %x bytes of MRC output data type %d to SPI flash\n", mrc->len, type); ret = mrccache_get_region(type, &sf, &entry); if (ret) From patchwork Mon Mar 13 03:11:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756033 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=MUSaSQxe; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhZG4Dsdz1yWt for ; Mon, 13 Mar 2023 14:13:42 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2A485858ED; Mon, 13 Mar 2023 04:12:01 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="MUSaSQxe"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C63CA85813; Mon, 13 Mar 2023 04:11:38 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd31.google.com (mail-io1-xd31.google.com [IPv6:2607:f8b0:4864:20::d31]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 946EA85813 for ; Mon, 13 Mar 2023 04:11:34 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd31.google.com with SMTP id e11so4492374ioe.3 for ; Sun, 12 Mar 2023 20:11:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677093; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0YRrlwUzjMWO94KN79WhdiclHDgPgr/92z2VA9hNIoI=; b=MUSaSQxesMQrDwDtBblmzCIyw7v5jj6fjoWAm7V7Pk6tRZEk0LTTAvRKtEjw+jbON0 Ld4pLMRJ0HpfPlMrnKz9HbIVn3jbl/YkxSijLMSajvzcJ3gkvu7zq+nc0aXrUrmho1t/ 0e+0NuD+jMXV/0QkZxXNN3mUKa+ehETz0INhQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677093; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0YRrlwUzjMWO94KN79WhdiclHDgPgr/92z2VA9hNIoI=; b=D1mVpRcd07PdEiqSvAb6jK2tnVNjyCGEQHnpptM5K418OcPHKHoebEq/Z1ehdgNIK/ BAN9sypRONBUk+6LEqzC0mHLeQTiNy2VxFW/e6tbNcovFgBZRSbxTwczszpbiKrSDXbl mUOr4KqtadOAzwhmUnxRy6MWAYBFqBr30EV4FHOZJw6Lr3qHMuY/npHfng10UwP/trbr 0KjK4BVxic4xASG+8wvNSU2cyzPxUMh/bmN9OaWOl75dMNoos7n7uGTVPHZ26fXjLAUz SbfKzm6NRDJodTbCAX5O3PziBYSdhap0GtUla2syaM1fwAylKHFCFE/Yl5ExhBIRfObQ cK/Q== X-Gm-Message-State: AO0yUKVU9TRDWVEjryASDuH4tiEiv0IcQDKN/8E4bz/t3VYc9SbHt6my xjUuG5nxf2oaKShkjcI/jVJhGNwcmM79mdkq/dA= X-Google-Smtp-Source: AK7set/FUJ3YVvNDCc7B2z05UPBstzP189jdw5PIcM26BmFQ6OMCWp4W2LEiAlUbpEqsULOSbch8Kg== X-Received: by 2002:a6b:6e05:0:b0:74c:82ae:c87d with SMTP id d5-20020a6b6e05000000b0074c82aec87dmr19874120ioh.5.1678677093112; Sun, 12 Mar 2023 20:11:33 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:32 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 08/13] x86: spl: Show debugging for BSS Date: Sun, 12 Mar 2023 21:11:05 -0600 Message-Id: <20230313031111.725395-9-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Show the area of memory cleared for BSS, when debugging is enabled. Signed-off-by: Simon Glass --- arch/x86/lib/spl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index bdf57ef7b5bd..eb0af219ae29 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -117,7 +117,9 @@ static int x86_spl_init(void) } #ifndef CONFIG_SYS_COREBOOT - memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start); + debug("BSS clear from %lx to %lx len %lx\n", (ulong)&__bss_start, + (ulong)&__bss_end, (ulong)&__bss_end - (ulong)&__bss_start); + memset(&__bss_start, '\0', (ulong)&__bss_end - (ulong)&__bss_start); # ifndef CONFIG_TPL /* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */ From patchwork Mon Mar 13 03:11:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756035 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=O5ykUse2; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhZk4287z1yWt for ; Mon, 13 Mar 2023 14:14:06 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C4E4986104; Mon, 13 Mar 2023 04:12:13 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="O5ykUse2"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id E62B185C65; Mon, 13 Mar 2023 04:11:40 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-il1-x133.google.com (mail-il1-x133.google.com [IPv6:2607:f8b0:4864:20::133]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7B9E786106 for ; Mon, 13 Mar 2023 04:11:35 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x133.google.com with SMTP id j6so1854755ilr.7 for ; Sun, 12 Mar 2023 20:11:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677094; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=blUjn3Pej/ZOb+GqTcM3J8j4cbwelku7DMrjyXSwAfA=; b=O5ykUse2Ps3THKwrGuoAT+fMHVWN/bufBWb+EjqhqrHPTtr7Gu4h1xEDPvr8OinwXl V1c7g9bYB+76UjsBClIaQ6qidd1eq0ynasZwPiAslDJsxcoKOqjT4fTo5LJ9mTfvjITF VHNkkoKgDpllABXQ0ru6GoOpsVlmF35RNkjWY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677094; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=blUjn3Pej/ZOb+GqTcM3J8j4cbwelku7DMrjyXSwAfA=; b=8Q/BHSLGX5mBHRgR5XmfKQ3zZQgRYNqcAX1LLppxOZjFYgAiK5qgjBxkwszXWjhvMi tzUMJMFVVuGJipUDW/hswJRYnzwhuy9IjcAI4EeR44e0OeFfzwBBGyVAl6jiebMMU3R5 bVOOQb3lDVFKjS5+kUm5bBXi90l3czcsOp77h7fdZcSEQ+h5vsA4E/uG3zqiHC6EAztH ZJEUlAzYErqS1sFFy6jNRlcL0yXm62tJuQVo9hTGSdaDlmv8FrxYKKJhZwTqNwOOw8Wc RX6O41CJWO3ODxwzBoGhHPeh1Mh5sgBLH4nzNcoXOa7xHDqC3U3KFRO1iaPmPshlgsMw 5XoA== X-Gm-Message-State: AO0yUKWmNGPZm3ZPct55vPXbFezjHR0/r2U91tf8vlMP3bGzpKkp6hlg LG7bB8cELb627RofQ6LnP7J7HFa58FLeL78NcLI= X-Google-Smtp-Source: AK7set/8fkf4OUAxNGkHngUduZ6RAudgM+dF6oB0puSuAyaldodK3CVQrwKlAhsVYgZR8EzDtLi88Q== X-Received: by 2002:a05:6e02:2162:b0:319:ac45:56f4 with SMTP id s2-20020a056e02216200b00319ac4556f4mr26862350ilv.7.1678677094025; Sun, 12 Mar 2023 20:11:34 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:33 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass , Jagan Teki , Mike Frysinger , Vignesh R Subject: [PATCH 09/13] sf: Guard against zero erasesize Date: Sun, 12 Mar 2023 21:11:06 -0600 Message-Id: <20230313031111.725395-10-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean With tiny SPI flash the erasesize is 0 which can cause a divide-by-zero error. Check for this and returns a proper error instead. Signed-off-by: Simon Glass --- drivers/mtd/spi/sf_probe.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index e192f97efdc4..de6516f1065b 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -189,7 +189,8 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) struct mtd_info *mtd = &flash->mtd; struct erase_info instr; - if (offset % mtd->erasesize || len % mtd->erasesize) { + if (!mtd->erasesize || + (offset % mtd->erasesize || len % mtd->erasesize)) { debug("SF: Erase offset/length not multiple of erase size\n"); return -EINVAL; } From patchwork Mon Mar 13 03:11:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756036 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=JSOAReAe; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhZy1MfMz1yWt for ; Mon, 13 Mar 2023 14:14:18 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5D6DE86117; Mon, 13 Mar 2023 04:12:17 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="JSOAReAe"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DD53F858ED; Mon, 13 Mar 2023 04:11:41 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-io1-xd36.google.com (mail-io1-xd36.google.com [IPv6:2607:f8b0:4864:20::d36]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7080E860FB for ; Mon, 13 Mar 2023 04:11:35 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-io1-xd36.google.com with SMTP id 76so4482018iou.9 for ; Sun, 12 Mar 2023 20:11:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677095; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/3cXR29UcpzVK7jXl9VtVKVD+c9WKbwy+6jit2Dc+yI=; b=JSOAReAevpbaTXgiIqIkcFYSKh+MPb6mnGUkukQk7YoTZN6ICbvBlpw48trhTNDUu0 YjJSLzcEGur8qqDLe6tQymqDg7xPgitSrW+qEi8c7iKYjawpW9JGOg/GfWMjiOtsAvNH yGgwVeTUJbyU/OQKk9XlbhxdwZj6Fbjbypf/8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677095; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/3cXR29UcpzVK7jXl9VtVKVD+c9WKbwy+6jit2Dc+yI=; b=f3FcbaijK1j9m5CXiTbRMhODHmZMyN0OxSOXeNyRl6omjEfoMHht2mdM42e45y+lup e/5tIdNXIiYTyKpqgh873U8ZQh7DppDKO6XcKwyeBq8fmq95kDOPqTAPpDYwxr8ysTNP Rfk/JwpHB0TwJHjxGmeh+uLOQkbNW0MnYjAKBoB96LDKLN8ZQYK4IorQw3wdhYB1xz1k YXyeMFJMQp2IrYTqf6ToT+Shm78GLaJSNSKdJKsCxyalg9Y9p4xDfc0hVkCf67TPOZAP qJMfVkL9GtybFXhUO+uBus6AIquwHQLr31dRw0Ryf+C8BFPaM4ta3k97wvkv1+m5mQAf OpLA== X-Gm-Message-State: AO0yUKWfjg20Nh72orn1fGhAZ/7NS4yTCHV9/j/wUjBPhuAodrHFYJTp g/2ldyanGUc1TWqCqdfmj728bycTjNYr93xdt6w= X-Google-Smtp-Source: AK7set8hLCw3sTS22AJcTZNsWDxF19hqWVZM1K8fT5Ec9TrkaEAmYafv2HqIwglF7Z/RXR2jPXoGaA== X-Received: by 2002:a6b:6111:0:b0:74c:ac95:24e0 with SMTP id v17-20020a6b6111000000b0074cac9524e0mr20671695iob.10.1678677094891; Sun, 12 Mar 2023 20:11:34 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:34 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass , Jagan Teki , Mike Frysinger , Vignesh R Subject: [PATCH 10/13] sf: Rename spi-nor-tiny functions Date: Sun, 12 Mar 2023 21:11:07 -0600 Message-Id: <20230313031111.725395-11-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The 'tiny' SPI nor functions have the same name as their big brothers, which can be confusing. Use different names so it is clear which version is in the image. Signed-off-by: Simon Glass --- drivers/mtd/spi/spi-nor-tiny.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 68152ce3b4b9..7aa24e129f96 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -361,7 +361,7 @@ static int spi_nor_wait_till_ready(struct spi_nor *nor) * Erase an address range on the nor chip. The address range may extend * one or more erase sectors. Return an error is there is a problem erasing. */ -static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) +static int spi_nor_erase_tiny(struct mtd_info *mtd, struct erase_info *instr) { return -ENOTSUPP; } @@ -390,8 +390,8 @@ static const struct flash_info *spi_nor_read_id(struct spi_nor *nor) return ERR_PTR(-EMEDIUMTYPE); } -static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf) +static int spi_nor_read_tiny(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char *buf) { struct spi_nor *nor = mtd_to_spi_nor(mtd); int ret; @@ -426,8 +426,8 @@ read_err: * FLASH_PAGESIZE chunks. The address range may be any size provided * it is within the physical boundaries. */ -static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) +static int spi_nor_write_tiny(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) { return -ENOTSUPP; } @@ -741,9 +741,9 @@ int spi_nor_scan(struct spi_nor *nor) mtd->writesize = 1; mtd->flags = MTD_CAP_NORFLASH; mtd->size = info->sector_size * info->n_sectors; - mtd->_erase = spi_nor_erase; - mtd->_read = spi_nor_read; - mtd->_write = spi_nor_write; + mtd->_erase = spi_nor_erase_tiny; + mtd->_read = spi_nor_read_tiny; + mtd->_write = spi_nor_write_tiny; nor->size = mtd->size; From patchwork Mon Mar 13 03:11:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756039 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256 header.s=google header.b=N7Yl9yas; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PZhbf0z8rz1yWt for ; Mon, 13 Mar 2023 14:14:54 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DBAB386123; Mon, 13 Mar 2023 04:12:25 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="N7Yl9yas"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4739E860F5; Mon, 13 Mar 2023 04:11:48 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mail-il1-x130.google.com (mail-il1-x130.google.com [IPv6:2607:f8b0:4864:20::130]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A6E378610C for ; Mon, 13 Mar 2023 04:11:38 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@chromium.org Received: by mail-il1-x130.google.com with SMTP id l9so3216414iln.1 for ; Sun, 12 Mar 2023 20:11:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1678677096; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rpz4xhyekpR0TvqyqIkcKL0rmxNBN0pJZRLjxpRC7dE=; b=N7Yl9yaseTXP8m5ZJTMtbQszKi1kdHPnYS0GBLwWJgJTeoMGhphWpd6LCvltwC4AXy 0mqbVcJOynhI1l3VvNMLZt6jcW8S+d8gOlfU6EiaoMVe9/ZcWRaG68VvxoNJosCm7/03 OEIJ53THGur71tpxB09+qZrOWqiuGe4uVYDCI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678677096; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rpz4xhyekpR0TvqyqIkcKL0rmxNBN0pJZRLjxpRC7dE=; b=pL5P7N+bbOu0xP7TY74eXrG/hEexdtX8xyooFdUP7IhSgtZCj8SFcEbNMkQgSYkSGH dr6bBV26HtpbOnonjq6jLdCt2+Ikyp6UfnEadxnzsHnntuzXFeDbEZTxjQ3Elwt+U9u4 gMi/Arlnbo8JzlkW40FH2yCOH3P4TUjrHmfEYbQBFahHQZYEi4o1mVFVj6FRdthGUaDG CZgNvOHuYTDhoRiCC2J6gE8fwVcR8VZMclQOoAsVgQQCFsxU4/iNtq3rw3IUiNeHYi0U Cwxd2emPGqQb9sGHOFPkP+tFgJCc5M/spreENteWq98LliTkUyLvc3HTFRRZg1vi/JuB vwWg== X-Gm-Message-State: AO0yUKUnQvRnvLIHl6/QmWWRd/OZdYR97MLjr/WifkrnPwLookVgpAfR 2c7m9rF/X/4A2852H34e+XlEd0oFlIXYuK/6iIg= X-Google-Smtp-Source: AK7set9DqVPj6oDQF2c8CnoctDf02bFd92B9D5IjZf5VBH4wxyi9lQ3znFAstU5MxCFc95WezoJ16Q== X-Received: by 2002:a92:d083:0:b0:323:ad6:5357 with SMTP id h3-20020a92d083000000b003230ad65357mr1276842ilh.28.1678677096501; Sun, 12 Mar 2023 20:11:36 -0700 (PDT) Received: from sjg1.roam.corp.google.com (c-73-14-173-85.hsd1.co.comcast.net. [73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:36 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass , Andrejs Cainikovs , Andrew Scull , Biwen Li , Daniel Schwierzeck , Fabio Estevam , Gaurav Jain , =?utf-8?q?Horia_Geant=C4=83?= , Jacky Bai , Ji Luo , Jian Li , Leo , Marek Vasut , Michal Simek , Michal Suchanek , "NXP i.MX U-Boot Team" , Nikita Shubin , Ovidiu Panait , Padmarao Begari , Pavel Herrmann , Peng Fan , Rasmus Villemoes , Rick Chen , Samuel Holland , Stefano Babic , Thomas Chou , Ye Li , Yu Chien Peter Lin Subject: [PATCH 11/13] dm: Emit the arch_cpu_init_dm() even only before relocation Date: Sun, 12 Mar 2023 21:11:08 -0600 Message-Id: <20230313031111.725395-12-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean The original function was only called once, before relocation. The new one is called again after relocation. This was not the intend of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f ("event: Convert arch_cpu_init_dm() to") Signed-off-by: Simon Glass --- arch/arm/mach-imx/imx8/cpu.c | 2 +- arch/arm/mach-imx/imx8m/soc.c | 2 +- arch/arm/mach-imx/imx8ulp/soc.c | 2 +- arch/arm/mach-imx/imx9/soc.c | 2 +- arch/arm/mach-omap2/am33xx/board.c | 2 +- arch/arm/mach-omap2/hwinit-common.c | 2 +- arch/mips/mach-pic32/cpu.c | 2 +- arch/nios2/cpu/cpu.c | 2 +- arch/riscv/cpu/cpu.c | 2 +- arch/x86/cpu/baytrail/cpu.c | 2 +- arch/x86/cpu/broadwell/cpu.c | 2 +- arch/x86/cpu/ivybridge/cpu.c | 2 +- arch/x86/cpu/quark/quark.c | 2 +- arch/x86/lib/fsp2/fsp_init.c | 2 +- doc/develop/event.rst | 6 +++--- drivers/core/root.c | 4 ++-- drivers/cpu/microblaze_cpu.c | 2 +- include/event.h | 2 +- 18 files changed, 21 insertions(+), 21 deletions(-) diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index be1f4edded10..99772f68c32b 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -89,7 +89,7 @@ static int imx8_init_mu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, imx8_init_mu); +EVENT_SPY(EVT_DM_POST_INIT_F, imx8_init_mu); #if defined(CONFIG_ARCH_MISC_INIT) int arch_misc_init(void) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index df865e997d38..903620ad6a83 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -549,7 +549,7 @@ static int imx8m_check_clock(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock); +EVENT_SPY(EVT_DM_POST_INIT_F, imx8m_check_clock); static void imx8m_setup_snvs(void) { diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 5d95fb89a61c..70142cbb0f4b 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -685,7 +685,7 @@ static int imx8ulp_check_mu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu); +EVENT_SPY(EVT_DM_POST_INIT_F, imx8ulp_check_mu); #if defined(CONFIG_SPL_BUILD) __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) diff --git a/arch/arm/mach-imx/imx9/soc.c b/arch/arm/mach-imx/imx9/soc.c index a16e22ea6bbf..252663a9eec2 100644 --- a/arch/arm/mach-imx/imx9/soc.c +++ b/arch/arm/mach-imx/imx9/soc.c @@ -262,7 +262,7 @@ int imx9_probe_mu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, imx9_probe_mu); +EVENT_SPY(EVT_DM_POST_INIT_F, imx9_probe_mu); int timer_init(void) { diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index a52d04d85c8a..ecc0a592e993 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -535,4 +535,4 @@ static int am33xx_dm_post_init(void *ctx, struct event *event) #endif return 0; } -EVENT_SPY(EVT_DM_POST_INIT, am33xx_dm_post_init); +EVENT_SPY(EVT_DM_POST_INIT_F, am33xx_dm_post_init); diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index c4a8eabc3ebe..771533394bcd 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -246,7 +246,7 @@ static int omap2_system_init(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, omap2_system_init); +EVENT_SPY(EVT_DM_POST_INIT_F, omap2_system_init); /* * Routine: wait_for_command_complete diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c index de449e3c6a20..ec3c2505313c 100644 --- a/arch/mips/mach-pic32/cpu.c +++ b/arch/mips/mach-pic32/cpu.c @@ -102,7 +102,7 @@ static int pic32_flash_prefetch(void *ctx, struct event *event) prefetch_init(); return 0; } -EVENT_SPY(EVT_DM_POST_INIT, pic32_flash_prefetch); +EVENT_SPY(EVT_DM_POST_INIT_F, pic32_flash_prefetch); /* Un-gate DDR2 modules (gated by default) */ static void ddr2_pmd_ungate(void) diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c index 85544503a5ee..da167f4b29e9 100644 --- a/arch/nios2/cpu/cpu.c +++ b/arch/nios2/cpu/cpu.c @@ -80,7 +80,7 @@ static int nios_cpu_setup(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, nios_cpu_setup); +EVENT_SPY(EVT_DM_POST_INIT_F, nios_cpu_setup); static int altera_nios2_get_desc(const struct udevice *dev, char *buf, int size) diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index e1ed4ec01d04..ecfb1fb08c4b 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -145,7 +145,7 @@ int riscv_cpu_setup(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, riscv_cpu_setup); +EVENT_SPY(EVT_DM_POST_INIT_F, riscv_cpu_setup); int arch_early_init_r(void) { diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 4fb6a485542f..4a7b4f617f8a 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -64,7 +64,7 @@ static int baytrail_uart_init(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, baytrail_uart_init); +EVENT_SPY(EVT_DM_POST_INIT_F, baytrail_uart_init); static void set_max_freq(void) { diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 7877961451a6..f30aebfe4c62 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -40,7 +40,7 @@ static int broadwell_init_cpu(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu); +EVENT_SPY(EVT_DM_POST_INIT_F, broadwell_init_cpu); void set_max_freq(void) { diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index cffc5d5b1d86..c988d7ff477f 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -86,7 +86,7 @@ static int ivybridge_cpu_init(void *ctx, struct event *ev) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, ivybridge_cpu_init); +EVENT_SPY(EVT_DM_POST_INIT_F, ivybridge_cpu_init); #define PCH_EHCI0_TEMP_BAR0 0xe8000000 #define PCH_EHCI1_TEMP_BAR0 0xe8000400 diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 0a1fbb34d40d..1be8e38cdf41 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -263,7 +263,7 @@ static int quark_init_pcie(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, quark_init_pcie); +EVENT_SPY(EVT_DM_POST_INIT_F, quark_init_pcie); int checkcpu(void) { diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index b15926e8247b..afec7d08d67f 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -42,7 +42,7 @@ int fsp_setup_pinctrl(void *ctx, struct event *event) return ret; } -EVENT_SPY(EVT_DM_POST_INIT, fsp_setup_pinctrl); +EVENT_SPY(EVT_DM_POST_INIT_F, fsp_setup_pinctrl); #if !defined(CONFIG_TPL_BUILD) binman_sym_declare(ulong, intel_fsp_m, image_pos); diff --git a/doc/develop/event.rst b/doc/develop/event.rst index 4ff593483715..4c34fffc63bc 100644 --- a/doc/develop/event.rst +++ b/doc/develop/event.rst @@ -11,7 +11,7 @@ block device is probed. Rather than using weak functions and direct calls across subsystemss, it is often easier to use an event. -An event consists of a type (e.g. EVT_DM_POST_INIT) and some optional data, +An event consists of a type (e.g. EVT_DM_POST_INIT_F) and some optional data, in `union event_data`. An event spy can be creasted to watch for events of a particular type. When the event is created, it is sent to each spy in turn. @@ -26,9 +26,9 @@ To declare a spy, use something like this:: /* do something */ return 0; } - EVENT_SPY(EVT_DM_POST_INIT, snow_setup_cpus); + EVENT_SPY(EVT_DM_POST_INIT_F, snow_setup_cpus); -Your function is called when EVT_DM_POST_INIT is emitted, i.e. after driver +Your function is called when EVT_DM_POST_INIT_F is emitted, i.e. after driver model is inited (in SPL, or in U-Boot proper before and after relocation). diff --git a/drivers/core/root.c b/drivers/core/root.c index c4fb48548bb3..6775fb0b6575 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -436,8 +436,8 @@ int dm_init_and_scan(bool pre_reloc_only) return ret; } } - if (CONFIG_IS_ENABLED(DM_EVENT)) { - ret = event_notify_null(EVT_DM_POST_INIT); + if (CONFIG_IS_ENABLED(DM_EVENT) && !(gd->flags & GD_FLG_RELOC)) { + ret = event_notify_null(EVT_DM_POST_INIT_F); if (ret) return log_msg_ret("ev", ret); } diff --git a/drivers/cpu/microblaze_cpu.c b/drivers/cpu/microblaze_cpu.c index b9d07928223f..c97a89fbd5c8 100644 --- a/drivers/cpu/microblaze_cpu.c +++ b/drivers/cpu/microblaze_cpu.c @@ -29,7 +29,7 @@ static int microblaze_cpu_probe_all(void *ctx, struct event *event) return 0; } -EVENT_SPY(EVT_DM_POST_INIT, microblaze_cpu_probe_all); +EVENT_SPY(EVT_DM_POST_INIT_F, microblaze_cpu_probe_all); static void microblaze_set_cpuinfo_pvr(struct microblaze_cpuinfo *ci) { diff --git a/include/event.h b/include/event.h index e4580b683502..fe41080fa63b 100644 --- a/include/event.h +++ b/include/event.h @@ -22,7 +22,7 @@ enum event_t { EVT_TEST, /* Events related to driver model */ - EVT_DM_POST_INIT, + EVT_DM_POST_INIT_F, EVT_DM_PRE_PROBE, EVT_DM_POST_PROBE, EVT_DM_PRE_REMOVE, From patchwork Mon Mar 13 03:11:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756038 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:37 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 12/13] x86: Allow listing MTRRs in SPL Date: Sun, 12 Mar 2023 21:11:09 -0600 Message-Id: <20230313031111.725395-13-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Move MTRR-listing code into a common file so it can be used from SPL. Update the 'mtrr' command to call it. Use this in SPL just before adjusting the MTRRs, so we can see the state set up by the board. Only show it when debug is enabled. Signed-off-by: Simon Glass --- arch/x86/cpu/mtrr.c | 61 +++++++++++++++++++++++++++++++++++++ arch/x86/include/asm/mtrr.h | 20 ++++++++++++ arch/x86/lib/spl.c | 7 +++++ cmd/x86/mtrr.c | 60 +++--------------------------------- 4 files changed, 92 insertions(+), 56 deletions(-) diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index e69dfb552b16..1d3beee33555 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -30,6 +30,16 @@ DECLARE_GLOBAL_DATA_PTR; +const char *const mtrr_type_name[MTRR_TYPE_COUNT] = { + "Uncacheable", + "Combine", + "2", + "3", + "Through", + "Protect", + "Back", +}; + /* Prepare to adjust MTRRs */ void mtrr_open(struct mtrr_state *state, bool do_caches) { @@ -320,3 +330,54 @@ int mtrr_set(int cpu_select, int reg, u64 base, u64 mask) return mtrr_start_op(cpu_select, &oper); } + +static void read_mtrrs_(void *arg) +{ + struct mtrr_info *info = arg; + + mtrr_read_all(info); +} + +int mtrr_list(int reg_count, int cpu_select) +{ + struct mtrr_info info; + int ret; + int i; + + printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||", + "Mask ||", "Size ||"); + memset(&info, '\0', sizeof(info)); + ret = mp_run_on_cpus(cpu_select, read_mtrrs_, &info); + if (ret) + return log_msg_ret("run", ret); + for (i = 0; i < reg_count; i++) { + const char *type = "Invalid"; + uint64_t base, mask, size; + bool valid; + + base = info.mtrr[i].base; + mask = info.mtrr[i].mask; + size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1); + size |= (1 << 12) - 1; + size += 1; + valid = mask & MTRR_PHYS_MASK_VALID; + type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK]; + printf("%d %-5s %-12s %016llx %016llx %016llx\n", i, + valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK, + mask & ~MTRR_PHYS_MASK_VALID, size); + } + + return 0; +} + +int mtrr_get_type_by_name(const char *typename) +{ + int i; + + for (i = 0; i < MTRR_TYPE_COUNT; i++) { + if (*typename == *mtrr_type_name[i]) + return i; + } + + return -EINVAL; +}; diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index ca2edc7878f7..2e995f540616 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -190,6 +190,26 @@ int mtrr_set(int cpu_select, int reg, u64 base, u64 mask); */ int mtrr_get_var_count(void); +/** + * mtrr_list() - List the MTRRs + * + * Shows a list of all the MTRRs including their values + * + * @reg_count: Number of registers to show. You can use mtrr_get_var_count() for + * this + * @cpu_select: CPU to use. Use MP_SELECT_BSP for the boot CPU + * Returns: 0 if OK, -ve if the CPU was not found + */ +int mtrr_list(int reg_count, int cpu_select); + +/** + * mtrr_get_type_by_name() - Get the type of an MTRR given its type name + * + * @typename: Name to check + * Returns: MTRR type (MTRR_TYPE_...) or -EINVAL if invalid + */ +int mtrr_get_type_by_name(const char *typename); + #endif #if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index eb0af219ae29..0f2319ccc212 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -139,6 +140,12 @@ static int x86_spl_init(void) arch_setup_gd(gd->new_gd); gd->start_addr_sp = (ulong)ptr; + if (_LOG_DEBUG) { + ret = mtrr_list(mtrr_get_var_count(), MP_SELECT_BSP); + if (ret) + printf("mtrr_list failed\n"); + } + /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */ ret = mtrr_add_request(MTRR_TYPE_WRBACK, (1ULL << 32) - CONFIG_XIP_ROM_SIZE, diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c index b213a942fde4..c1880c7806e6 100644 --- a/cmd/x86/mtrr.c +++ b/cmd/x86/mtrr.c @@ -10,71 +10,19 @@ #include #include -static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = { - "Uncacheable", - "Combine", - "2", - "3", - "Through", - "Protect", - "Back", -}; - -static void read_mtrrs(void *arg) -{ - struct mtrr_info *info = arg; - - mtrr_read_all(info); -} - -static int do_mtrr_list(int reg_count, int cpu_select) -{ - struct mtrr_info info; - int ret; - int i; - - printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||", - "Mask ||", "Size ||"); - memset(&info, '\0', sizeof(info)); - ret = mp_run_on_cpus(cpu_select, read_mtrrs, &info); - if (ret) - return log_msg_ret("run", ret); - for (i = 0; i < reg_count; i++) { - const char *type = "Invalid"; - uint64_t base, mask, size; - bool valid; - - base = info.mtrr[i].base; - mask = info.mtrr[i].mask; - size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1); - size |= (1 << 12) - 1; - size += 1; - valid = mask & MTRR_PHYS_MASK_VALID; - type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK]; - printf("%d %-5s %-12s %016llx %016llx %016llx\n", i, - valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK, - mask & ~MTRR_PHYS_MASK_VALID, size); - } - - return 0; -} - static int do_mtrr_set(int cpu_select, uint reg, int argc, char *const argv[]) { const char *typename = argv[0]; uint32_t start, size; uint64_t base, mask; - int i, type = -1; + int type = -1; bool valid; int ret; if (argc < 3) return CMD_RET_USAGE; - for (i = 0; i < MTRR_TYPE_COUNT; i++) { - if (*typename == *mtrr_type_name[i]) - type = i; - } - if (type == -1) { + type = mtrr_get_type_by_name(typename); + if (type < 0) { printf("Invalid type name %s\n", typename); return CMD_RET_USAGE; } @@ -146,7 +94,7 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc, if (!first) printf("\n"); printf("CPU %d:\n", i); - ret = do_mtrr_list(reg_count, i); + ret = mtrr_list(reg_count, i); if (ret) { printf("Failed to read CPU %d (err=%d)\n", i, ret); From patchwork Mon Mar 13 03:11:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 1756037 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[73.14.173.85]) by smtp.gmail.com with ESMTPSA id b7-20020a02a587000000b003c4f902cca5sm2089409jam.172.2023.03.12.20.11.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Mar 2023 20:11:38 -0700 (PDT) From: Simon Glass To: U-Boot Mailing List Cc: Bin Meng , Simon Glass Subject: [PATCH 13/13] x86: Add on to existing MTRRs in SPL Date: Sun, 12 Mar 2023 21:11:10 -0600 Message-Id: <20230313031111.725395-14-sjg@chromium.org> X-Mailer: git-send-email 2.40.0.rc1.284.g88254d51c5-goog In-Reply-To: <20230313031111.725395-1-sjg@chromium.org> References: <20230313031111.725395-1-sjg@chromium.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean We don't actually set up all of these registers in SPL, so using mtrr_commit() with erase some. Use mtrr_set_next_var() instead. Signed-off-by: Simon Glass --- arch/x86/lib/spl.c | 10 +++++----- configs/chromebook_link64_defconfig | 2 ++ 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 0f2319ccc212..88d7e1424174 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -147,14 +147,14 @@ static int x86_spl_init(void) } /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */ - ret = mtrr_add_request(MTRR_TYPE_WRBACK, + mtrr_set_next_var(MTRR_TYPE_WRBACK, (1ULL << 32) - CONFIG_XIP_ROM_SIZE, CONFIG_XIP_ROM_SIZE); - if (ret) { - debug("%s: SPI cache setup failed (err=%d)\n", __func__, ret); - return ret; + if (_LOG_DEBUG) { + ret = mtrr_list(mtrr_get_var_count(), MP_SELECT_BSP); + if (ret) + printf("mtrr_list failed\n"); } - mtrr_commit(true); # else ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit); if (ret) diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 8c75d654290b..192cbbecbe0e 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -69,6 +69,7 @@ CONFIG_TFTP_TSIZE=y CONFIG_USE_ROOTPATH=y CONFIG_REGMAP=y CONFIG_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y # CONFIG_ACPIGEN is not set CONFIG_LBA48=y CONFIG_SYS_64BIT_LBA=y @@ -88,6 +89,7 @@ CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_VIDEO_IVYBRIDGE_IGD=y CONFIG_CONSOLE_SCROLL_LINES=5 +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y # CONFIG_GZIP is not set