From patchwork Fri Mar 10 17:42:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755453 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=Y6W30hS5; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PYD0h4lDJz1yWm for ; Sat, 11 Mar 2023 04:43:00 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1paglS-0007NM-Hf; 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Fri, 10 Mar 2023 17:42:33 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BB4792004E; Fri, 10 Mar 2023 17:42:33 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3001E2004B; Fri, 10 Mar 2023 17:42:33 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:33 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Harold Grovesteen , Nina Schoetterl-Glausch Subject: [PATCH 01/12] target/s390x: Handle branching to odd addresses Date: Fri, 10 Mar 2023 18:42:12 +0100 Message-Id: <20230310174223.944843-2-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: uRS8_YxkOnO4DozIxsWDcmE2BtkyXGMM X-Proofpoint-ORIG-GUID: 4lKkd3phCmBmUNAGT61dZ7rYKl6fzyu0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 mlxscore=0 phishscore=0 impostorscore=0 adultscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.158.5; envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Let branching happen and try to generate a new translation block with an odd address. Generate a specification exception in cpu_get_tb_cpu_state(). Reported-by: Harold Grovesteen Reported-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich --- target/s390x/cpu.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 7d6d01325b2..0a76e96e078 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -29,6 +29,7 @@ #include "cpu_models.h" #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" +#include "tcg/tcg_s390x.h" #define ELF_MACHINE_UNAME "S390X" @@ -381,6 +382,14 @@ static inline int cpu_mmu_index(CPUS390XState *env, bool ifetch) static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) { + if (env->psw.addr & 1) { + /* + * Instructions must be at even addresses. + * This needs to be checked before address translation. + */ + env->int_pgm_ilen = 2; /* see s390_cpu_tlb_fill() */ + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, 0); + } *pc = env->psw.addr; *cs_base = env->ex_value; *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; 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Fri, 10 Mar 2023 17:42:35 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C793220043; Fri, 10 Mar 2023 17:42:35 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4023720040; Fri, 10 Mar 2023 17:42:35 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:35 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PATCH 02/12] target/s390x: Handle EXECUTE of odd addresses Date: Fri, 10 Mar 2023 18:42:13 +0100 Message-Id: <20230310174223.944843-3-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: luGR7NTxl4iJwEOkqJN0eo0WQ58X5mxh X-Proofpoint-ORIG-GUID: WcdH6shNJaRyXU4SIaWcFVI0POQBCjT5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 phishscore=0 bulkscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 adultscore=0 lowpriorityscore=0 mlxlogscore=766 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.156.1; 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Reported-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/mem_helper.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 6835c26dda4..9d1c4bb7374 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -2468,8 +2468,16 @@ void HELPER(stpq_parallel)(CPUS390XState *env, uint64_t addr, */ void HELPER(ex)(CPUS390XState *env, uint32_t ilen, uint64_t r1, uint64_t addr) { - uint64_t insn = cpu_lduw_code(env, addr); - uint8_t opc = insn >> 8; + uint64_t insn; + uint8_t opc; + + /* EXECUTE targets must be at even addresses. */ + if (addr & 1) { + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + } + + insn = cpu_lduw_code(env, addr); + opc = insn >> 8; /* Or in the contents of R1[56:63]. */ insn |= r1 & 0xff; From patchwork Fri Mar 10 17:42:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755459 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Fri, 10 Mar 2023 17:42:37 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 59C9E2004E; Fri, 10 Mar 2023 17:42:37 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:37 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PATCH 03/12] target/s390x: Handle LGRL from non-aligned addresses Date: Fri, 10 Mar 2023 18:42:14 +0100 Message-Id: <20230310174223.944843-4-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 9KQ01nAA5ZnXOtl3MDy7SrrUhaFdJ1tr X-Proofpoint-ORIG-GUID: sMhDIfiHVGE1VJFbosvq4Rk-8d73lHLB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 suspectscore=0 clxscore=1015 bulkscore=0 impostorscore=0 adultscore=0 malwarescore=0 mlxlogscore=958 spamscore=0 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.156.1; envelope-from=iii@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use MO_ALIGN_8 and let do_unaligned_access() generate a specification exception. Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/insn-data.h.inc | 6 +++--- target/s390x/tcg/translate.c | 3 ++- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc index 6fe8ca51437..0e0351a5192 100644 --- a/target/s390x/tcg/insn-data.h.inc +++ b/target/s390x/tcg/insn-data.h.inc @@ -414,7 +414,7 @@ C(0xe358, LY, RXY_a, LD, 0, a2, new, r1_32, ld32s, 0) C(0xb904, LGR, RRE, Z, 0, r2_o, 0, r1, mov2, 0) C(0xb914, LGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, 0) - C(0xe304, LG, RXY_a, Z, 0, a2, r1, 0, ld64, 0) + D(0xe304, LG, RXY_a, Z, 0, a2, r1, 0, ld64, 0, 0) C(0xe314, LGF, RXY_a, Z, 0, a2, r1, 0, ld32s, 0) F(0x2800, LDR, RR_a, Z, 0, f2, 0, f1, mov2, 0, IF_AFP1 | IF_AFP2) F(0x6800, LD, RX_a, Z, 0, m2_64, 0, f1, mov2, 0, IF_AFP1) @@ -427,7 +427,7 @@ C(0xc001, LGFI, RIL_a, EI, 0, i2, 0, r1, mov2, 0) /* LOAD RELATIVE LONG */ C(0xc40d, LRL, RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0) - C(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0) + D(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0, MO_ALIGN_8) C(0xc40c, LGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0) /* LOAD ADDRESS */ C(0x4100, LA, RX_a, Z, 0, a2, 0, r1, mov2, 0) @@ -457,7 +457,7 @@ C(0xb902, LTGR, RRE, Z, 0, r2_o, 0, r1, mov2, s64) C(0xb912, LTGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, s64) C(0xe312, LT, RXY_a, EI, 0, a2, new, r1_32, ld32s, s64) - C(0xe302, LTG, RXY_a, EI, 0, a2, r1, 0, ld64, s64) + D(0xe302, LTG, RXY_a, EI, 0, a2, r1, 0, ld64, s64, 0) C(0xe332, LTGF, RXY_a, GIE, 0, a2, r1, 0, ld32s, s64) F(0xb302, LTEBR, RRE, Z, 0, e2, 0, cond_e1e2, mov2, f32, IF_BFP) F(0xb312, LTDBR, RRE, Z, 0, f2, 0, f1, mov2, f64, IF_BFP) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index d324c0b6f2a..924efdad7a4 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -2851,7 +2851,8 @@ static DisasJumpType op_ld32u(DisasContext *s, DisasOps *o) static DisasJumpType op_ld64(DisasContext *s, DisasOps *o) { - tcg_gen_qemu_ld64(o->out, o->in2, get_mem_index(s)); + tcg_gen_qemu_ld_i64(o->out, o->in2, get_mem_index(s), + MO_TEUQ | s->insn->data); return DISAS_NEXT; } From patchwork Fri Mar 10 17:42:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755464 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=G1/MvbGy; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PYD362kn3z1yWp for ; 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Fri, 10 Mar 2023 17:42:43 GMT Received: from smtprelay03.fra02v.mail.ibm.com ([9.218.2.224]) by ppma05fra.de.ibm.com (PPS) with ESMTPS id 3p6g75b4nu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Mar 2023 17:42:42 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay03.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 32AHgdwp62652896 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 10 Mar 2023 17:42:39 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6030B2004B; Fri, 10 Mar 2023 17:42:39 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D642C20040; Fri, 10 Mar 2023 17:42:38 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:38 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PATCH 04/12] target/s390x: Handle LRL and LGFRL from non-aligned addresses Date: Fri, 10 Mar 2023 18:42:15 +0100 Message-Id: <20230310174223.944843-5-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: bE5OcZCodz0Z_31zFppCk_vkbo2DyVFT X-Proofpoint-ORIG-GUID: 8g74N_tSU2L2h1TM0541T6vVLYBWLQui X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 spamscore=0 suspectscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 malwarescore=0 mlxlogscore=882 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.158.5; envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use MO_ALIGN_4 and let do_unaligned_access() generate a specification exception. Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/insn-data.h.inc | 14 +++++++------- target/s390x/tcg/translate.c | 3 ++- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc index 0e0351a5192..3f95493282a 100644 --- a/target/s390x/tcg/insn-data.h.inc +++ b/target/s390x/tcg/insn-data.h.inc @@ -410,12 +410,12 @@ /* LOAD */ C(0x1800, LR, RR_a, Z, 0, r2_o, 0, cond_r1r2_32, mov2, 0) - C(0x5800, L, RX_a, Z, 0, a2, new, r1_32, ld32s, 0) - C(0xe358, LY, RXY_a, LD, 0, a2, new, r1_32, ld32s, 0) + D(0x5800, L, RX_a, Z, 0, a2, new, r1_32, ld32s, 0, 0) + D(0xe358, LY, RXY_a, LD, 0, a2, new, r1_32, ld32s, 0, 0) C(0xb904, LGR, RRE, Z, 0, r2_o, 0, r1, mov2, 0) C(0xb914, LGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, 0) D(0xe304, LG, RXY_a, Z, 0, a2, r1, 0, ld64, 0, 0) - C(0xe314, LGF, RXY_a, Z, 0, a2, r1, 0, ld32s, 0) + D(0xe314, LGF, RXY_a, Z, 0, a2, r1, 0, ld32s, 0, 0) F(0x2800, LDR, RR_a, Z, 0, f2, 0, f1, mov2, 0, IF_AFP1 | IF_AFP2) F(0x6800, LD, RX_a, Z, 0, m2_64, 0, f1, mov2, 0, IF_AFP1) F(0xed65, LDY, RXY_a, LD, 0, m2_64, 0, f1, mov2, 0, IF_AFP1) @@ -426,9 +426,9 @@ /* LOAD IMMEDIATE */ C(0xc001, LGFI, RIL_a, EI, 0, i2, 0, r1, mov2, 0) /* LOAD RELATIVE LONG */ - C(0xc40d, LRL, RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0) + D(0xc40d, LRL, RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0, MO_ALIGN_4) D(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0, MO_ALIGN_8) - C(0xc40c, LGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0) + D(0xc40c, LGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0, MO_ALIGN_4) /* LOAD ADDRESS */ C(0x4100, LA, RX_a, Z, 0, a2, 0, r1, mov2, 0) C(0xe371, LAY, RXY_a, LD, 0, a2, 0, r1, mov2, 0) @@ -456,9 +456,9 @@ C(0x1200, LTR, RR_a, Z, 0, r2_o, 0, cond_r1r2_32, mov2, s32) C(0xb902, LTGR, RRE, Z, 0, r2_o, 0, r1, mov2, s64) C(0xb912, LTGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, s64) - C(0xe312, LT, RXY_a, EI, 0, a2, new, r1_32, ld32s, s64) + D(0xe312, LT, RXY_a, EI, 0, a2, new, r1_32, ld32s, s64, 0) D(0xe302, LTG, RXY_a, EI, 0, a2, r1, 0, ld64, s64, 0) - C(0xe332, LTGF, RXY_a, GIE, 0, a2, r1, 0, ld32s, s64) + D(0xe332, LTGF, RXY_a, GIE, 0, a2, r1, 0, ld32s, s64, 0) F(0xb302, LTEBR, RRE, Z, 0, e2, 0, cond_e1e2, mov2, f32, IF_BFP) F(0xb312, LTDBR, RRE, Z, 0, f2, 0, f1, mov2, f64, IF_BFP) F(0xb342, LTXBR, RRE, Z, x2h, x2l, 0, x1_P, movx, f128, IF_BFP) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 924efdad7a4..5033767cef4 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -2839,7 +2839,8 @@ static DisasJumpType op_ld16u(DisasContext *s, DisasOps *o) static DisasJumpType op_ld32s(DisasContext *s, DisasOps *o) { - tcg_gen_qemu_ld32s(o->out, o->in2, get_mem_index(s)); + tcg_gen_qemu_ld_tl(o->out, o->in2, get_mem_index(s), + MO_TESL | s->insn->data); return DISAS_NEXT; } From patchwork Fri Mar 10 17:42:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=NuDGTj40; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PYD1l14Cjz1yWm for ; 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envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use MO_ALIGN_4 and let do_unaligned_access() generate a specification exception. Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/insn-data.h.inc | 6 +++--- target/s390x/tcg/translate.c | 3 ++- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc index 3f95493282a..b2451a720b6 100644 --- a/target/s390x/tcg/insn-data.h.inc +++ b/target/s390x/tcg/insn-data.h.inc @@ -502,16 +502,16 @@ C(0xc405, LHRL, RIL_b, GIE, 0, ri2, new, r1_32, ld16s, 0) C(0xc404, LGHRL, RIL_b, GIE, 0, ri2, r1, 0, ld16s, 0) /* LOAD HIGH */ - C(0xe3ca, LFH, RXY_a, HW, 0, a2, new, r1_32h, ld32u, 0) + D(0xe3ca, LFH, RXY_a, HW, 0, a2, new, r1_32h, ld32u, 0, 0) /* LOAG HIGH AND TRAP */ C(0xe3c8, LFHAT, RXY_a, LAT, 0, m2_32u, r1, 0, lfhat, 0) /* LOAD LOGICAL */ C(0xb916, LLGFR, RRE, Z, 0, r2_32u, 0, r1, mov2, 0) - C(0xe316, LLGF, RXY_a, Z, 0, a2, r1, 0, ld32u, 0) + D(0xe316, LLGF, RXY_a, Z, 0, a2, r1, 0, ld32u, 0, 0) /* LOAD LOGICAL AND TRAP */ C(0xe39d, LLGFAT, RXY_a, LAT, 0, a2, r1, 0, llgfat, 0) /* LOAD LOGICAL RELATIVE LONG */ - C(0xc40e, LLGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32u, 0) + D(0xc40e, LLGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32u, 0, MO_ALIGN_4) /* LOAD LOGICAL CHARACTER */ C(0xb994, LLCR, RRE, EI, 0, r2_8u, 0, r1_32, mov2, 0) C(0xb984, LLGCR, RRE, EI, 0, r2_8u, 0, r1, mov2, 0) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 5033767cef4..6ceb14de92f 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -2846,7 +2846,8 @@ static DisasJumpType op_ld32s(DisasContext *s, DisasOps *o) static DisasJumpType op_ld32u(DisasContext *s, DisasOps *o) { - tcg_gen_qemu_ld32u(o->out, o->in2, get_mem_index(s)); + tcg_gen_qemu_ld_tl(o->out, o->in2, get_mem_index(s), + MO_TEUL | s->insn->data); return DISAS_NEXT; } From patchwork Fri Mar 10 17:42:17 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755461 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=f7eCpaJg; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PYD2R4FJwz1yWm for ; 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Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 6ceb14de92f..d5e64d168f2 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -5999,7 +5999,8 @@ static void in2_mri2_16u(DisasContext *s, DisasOps *o) static void in2_mri2_32s(DisasContext *s, DisasOps *o) { o->in2 = tcg_temp_new_i64(); - tcg_gen_qemu_ld32s(o->in2, gen_ri2(s), get_mem_index(s)); + tcg_gen_qemu_ld_tl(o->in2, gen_ri2(s), get_mem_index(s), + MO_TESL | MO_ALIGN_4); } #define SPEC_in2_mri2_32s 0 From patchwork Fri Mar 10 17:42:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755460 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Fri, 10 Mar 2023 17:42:43 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DBCD720043; Fri, 10 Mar 2023 17:42:42 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:42 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PATCH 07/12] target/s390x: Handle CGRL and CLGRL with non-aligned addresses Date: Fri, 10 Mar 2023 18:42:18 +0100 Message-Id: <20230310174223.944843-8-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: CtzQRfCXEccdQBFftHnoGzZkG37ZtpZh X-Proofpoint-ORIG-GUID: 8ezwh6eQ4RrtEyT5Qj-VgNwLmh1bFRcr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 suspectscore=0 clxscore=1015 bulkscore=0 impostorscore=0 adultscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.156.1; 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Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index d5e64d168f2..02c415bdbd6 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6014,7 +6014,8 @@ static void in2_mri2_32u(DisasContext *s, DisasOps *o) static void in2_mri2_64(DisasContext *s, DisasOps *o) { o->in2 = tcg_temp_new_i64(); - tcg_gen_qemu_ld64(o->in2, gen_ri2(s), get_mem_index(s)); + tcg_gen_qemu_ld_i64(o->in2, gen_ri2(s), get_mem_index(s), + MO_TEUQ | MO_ALIGN_8); } #define SPEC_in2_mri2_64 0 From patchwork Fri Mar 10 17:42:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755454 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Fri, 10 Mar 2023 17:42:45 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7B2E620040; Fri, 10 Mar 2023 17:42:44 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:44 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PATCH 08/12] target/s390x: Handle CLRL and CLGFRL with non-aligned addresses Date: Fri, 10 Mar 2023 18:42:19 +0100 Message-Id: <20230310174223.944843-9-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ZHDvQzAq3qYOJwd0evVEzsG4D0dL0hHg X-Proofpoint-ORIG-GUID: m9VhffSkmF0lK5ubOujlXPqv19z7N2H9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 phishscore=0 bulkscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 adultscore=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.156.1; 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Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 02c415bdbd6..a8dcc234a53 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6007,7 +6007,8 @@ static void in2_mri2_32s(DisasContext *s, DisasOps *o) static void in2_mri2_32u(DisasContext *s, DisasOps *o) { o->in2 = tcg_temp_new_i64(); - tcg_gen_qemu_ld32u(o->in2, gen_ri2(s), get_mem_index(s)); + tcg_gen_qemu_ld_tl(o->in2, gen_ri2(s), get_mem_index(s), + MO_TEUL | MO_ALIGN_4); } #define SPEC_in2_mri2_32u 0 From patchwork Fri Mar 10 17:42:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755462 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Fri, 10 Mar 2023 17:42:46 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CCC9620040; Fri, 10 Mar 2023 17:42:45 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:45 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich , Nina Schoetterl-Glausch Subject: [PATCH 09/12] target/s390x: Handle STRL to non-aligned addresses Date: Fri, 10 Mar 2023 18:42:20 +0100 Message-Id: <20230310174223.944843-10-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: FLKDobC7oTWJ6xJK3U_6e8_a6vnycd8t X-Proofpoint-GUID: ioPn-ULGEry_7202X-y8476CETeaGuSt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=999 priorityscore=1501 adultscore=0 spamscore=0 impostorscore=0 suspectscore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.156.1; 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Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/insn-data.h.inc | 12 ++++++------ target/s390x/tcg/translate.c | 3 ++- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc index b2451a720b6..4e635fb1677 100644 --- a/target/s390x/tcg/insn-data.h.inc +++ b/target/s390x/tcg/insn-data.h.inc @@ -840,15 +840,15 @@ F(0xed15, SQDB, RXE, Z, 0, m2_64, new, f1, sqdb, 0, IF_BFP) /* STORE */ - C(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0) - C(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0) + D(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0, 0) + D(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0, 0) C(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0) F(0x6000, STD, RX_a, Z, f1, a2, 0, 0, st64, 0, IF_AFP1) F(0xed67, STDY, RXY_a, LD, f1, a2, 0, 0, st64, 0, IF_AFP1) - F(0x7000, STE, RX_a, Z, e1, a2, 0, 0, st32, 0, IF_AFP1) - F(0xed66, STEY, RXY_a, LD, e1, a2, 0, 0, st32, 0, IF_AFP1) + E(0x7000, STE, RX_a, Z, e1, a2, 0, 0, st32, 0, 0, IF_AFP1) + E(0xed66, STEY, RXY_a, LD, e1, a2, 0, 0, st32, 0, 0, IF_AFP1) /* STORE RELATIVE LONG */ - C(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0) + D(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0, MO_ALIGN_4) C(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0) /* STORE CHARACTER */ C(0x4200, STC, RX_a, Z, r1_o, a2, 0, 0, st8, 0) @@ -867,7 +867,7 @@ /* STORE HALFWORD RELATIVE LONG */ C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0) /* STORE HIGH */ - C(0xe3cb, STFH, RXY_a, HW, r1_sr32, a2, 0, 0, st32, 0) + D(0xe3cb, STFH, RXY_a, HW, r1_sr32, a2, 0, 0, st32, 0, 0) /* STORE ON CONDITION */ D(0xebf3, STOC, RSY_b, LOC, 0, 0, 0, 0, soc, 0, 0) D(0xebe3, STOCG, RSY_b, LOC, 0, 0, 0, 0, soc, 0, 1) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index a8dcc234a53..818f3292c5c 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -4497,7 +4497,8 @@ static DisasJumpType op_st16(DisasContext *s, DisasOps *o) static DisasJumpType op_st32(DisasContext *s, DisasOps *o) { - tcg_gen_qemu_st32(o->in1, o->in2, get_mem_index(s)); + tcg_gen_qemu_st_tl(o->in1, o->in2, get_mem_index(s), + MO_TEUL | s->insn->data); return DISAS_NEXT; } From patchwork Fri Mar 10 17:42:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755457 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=NtUMfQQ7; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PYD1H1bHDz1yWm for ; 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envelope-from=iii@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use MO_ALIGN_8 and let do_unaligned_access() generate a specification exception. Reported-by: Nina Schoetterl-Glausch Suggested-by: Nina Schoetterl-Glausch Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/insn-data.h.inc | 8 ++++---- target/s390x/tcg/translate.c | 3 ++- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/target/s390x/tcg/insn-data.h.inc b/target/s390x/tcg/insn-data.h.inc index 4e635fb1677..c60e29b3ad9 100644 --- a/target/s390x/tcg/insn-data.h.inc +++ b/target/s390x/tcg/insn-data.h.inc @@ -842,14 +842,14 @@ /* STORE */ D(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0, 0) D(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0, 0) - C(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0) - F(0x6000, STD, RX_a, Z, f1, a2, 0, 0, st64, 0, IF_AFP1) - F(0xed67, STDY, RXY_a, LD, f1, a2, 0, 0, st64, 0, IF_AFP1) + D(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0, 0) + E(0x6000, STD, RX_a, Z, f1, a2, 0, 0, st64, 0, 0, IF_AFP1) + E(0xed67, STDY, RXY_a, LD, f1, a2, 0, 0, st64, 0, 0, IF_AFP1) E(0x7000, STE, RX_a, Z, e1, a2, 0, 0, st32, 0, 0, IF_AFP1) E(0xed66, STEY, RXY_a, LD, e1, a2, 0, 0, st32, 0, 0, IF_AFP1) /* STORE RELATIVE LONG */ D(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0, MO_ALIGN_4) - C(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0) + D(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0, MO_ALIGN_8) /* STORE CHARACTER */ C(0x4200, STC, RX_a, Z, r1_o, a2, 0, 0, st8, 0) C(0xe372, STCY, RXY_a, LD, r1_o, a2, 0, 0, st8, 0) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 818f3292c5c..5609ea2e93d 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -4504,7 +4504,8 @@ static DisasJumpType op_st32(DisasContext *s, DisasOps *o) static DisasJumpType op_st64(DisasContext *s, DisasOps *o) { - tcg_gen_qemu_st64(o->in1, o->in2, get_mem_index(s)); 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Fri, 10 Mar 2023 17:42:51 GMT Received: from smtprelay05.fra02v.mail.ibm.com ([9.218.2.225]) by ppma06fra.de.ibm.com (PPS) with ESMTPS id 3p6g0pk4ta-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Mar 2023 17:42:51 +0000 Received: from smtpav02.fra02v.mail.ibm.com (smtpav02.fra02v.mail.ibm.com [10.20.54.101]) by smtprelay05.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 32AHgmXB50659644 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 10 Mar 2023 17:42:48 GMT Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A78AC2004B; Fri, 10 Mar 2023 17:42:48 +0000 (GMT) Received: from smtpav02.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2E46B20040; Fri, 10 Mar 2023 17:42:48 +0000 (GMT) Received: from heavy.boeblingen.de.ibm.com (unknown [9.171.22.18]) by smtpav02.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 10 Mar 2023 17:42:48 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich Subject: [PATCH 11/12] target/s390x: Update do_unaligned_access() comment Date: Fri, 10 Mar 2023 18:42:22 +0100 Message-Id: <20230310174223.944843-12-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Rd7oXuRoDgBVphd6K_vG3eA0UKPkHTi9 X-Proofpoint-ORIG-GUID: E4UrkP7yKnlY9DXRDnAA78GkhZB6EQxk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 priorityscore=1501 adultscore=0 bulkscore=0 mlxlogscore=999 clxscore=1015 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.158.5; 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Signed-off-by: Ilya Leoshkevich Reviewed-by: Richard Henderson --- target/s390x/tcg/excp_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index bc767f04438..cafdef77234 100644 --- a/target/s390x/tcg/excp_helper.c +++ b/target/s390x/tcg/excp_helper.c @@ -85,8 +85,8 @@ void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc) /* * Unaligned accesses are only diagnosed with MO_ALIGN. At the moment, - * this is only for the atomic operations, for which we want to raise a - * specification exception. + * this is only for the atomic and relative long operations, for which we want + * to raise a specification exception. */ static G_NORETURN void do_unaligned_access(CPUState *cs, uintptr_t retaddr) From patchwork Fri Mar 10 17:42:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1755456 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=n+ZUpQ0V; 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Fri, 10 Mar 2023 17:42:49 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , David Hildenbrand Cc: Thomas Huth , qemu-s390x@nongnu.org, qemu-devel@nongnu.org, Ilya Leoshkevich Subject: [PATCH 12/12] tests/tcg/s390x: Test unaligned accesses Date: Fri, 10 Mar 2023 18:42:23 +0100 Message-Id: <20230310174223.944843-13-iii@linux.ibm.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310174223.944843-1-iii@linux.ibm.com> References: <20230310174223.944843-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: JoQNDa4Nx5-x_ZPtm2Ba7lwt127dvUNc X-Proofpoint-ORIG-GUID: n51yJq_FCgvFSGDkT-EONO_ZMZGGgqON X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-10_08,2023-03-10_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 spamscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 mlxlogscore=999 mlxscore=0 phishscore=0 impostorscore=0 adultscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2303100139 Received-SPF: pass client-ip=148.163.158.5; envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Add a number of small test that check whether accessing unaligned addresses in various ways leads to a specification exception. Run these test both in softmmu and user configurations; expect a PGM in one case and SIGILL in the other. Signed-off-by: Ilya Leoshkevich --- tests/tcg/s390x/Makefile.softmmu-target | 4 +- tests/tcg/s390x/Makefile.target | 3 + tests/tcg/s390x/asm-const.h | 13 ++++ tests/tcg/s390x/br-odd.S | 18 +++++ tests/tcg/s390x/cgrl-unaligned.S | 17 +++++ tests/tcg/s390x/clrl-unaligned.S | 15 +++++ tests/tcg/s390x/crl-unaligned.S | 17 +++++ tests/tcg/s390x/ex-odd.S | 17 +++++ tests/tcg/s390x/lgrl-unaligned.S | 17 +++++ tests/tcg/s390x/llgfrl-unaligned.S | 17 +++++ tests/tcg/s390x/lpswe-unaligned.S | 17 +++++ tests/tcg/s390x/lrl-unaligned.S | 17 +++++ tests/tcg/s390x/pgm-specification.inc | 90 +++++++++++++++++++++++++ tests/tcg/s390x/pgm-specification.mak | 15 +++++ tests/tcg/s390x/stgrl-unaligned.S | 17 +++++ tests/tcg/s390x/strl-unaligned.S | 17 +++++ 16 files changed, 310 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/s390x/asm-const.h create mode 100644 tests/tcg/s390x/br-odd.S create mode 100644 tests/tcg/s390x/cgrl-unaligned.S create mode 100644 tests/tcg/s390x/clrl-unaligned.S create mode 100644 tests/tcg/s390x/crl-unaligned.S create mode 100644 tests/tcg/s390x/ex-odd.S create mode 100644 tests/tcg/s390x/lgrl-unaligned.S create mode 100644 tests/tcg/s390x/llgfrl-unaligned.S create mode 100644 tests/tcg/s390x/lpswe-unaligned.S create mode 100644 tests/tcg/s390x/lrl-unaligned.S create mode 100644 tests/tcg/s390x/pgm-specification.inc create mode 100644 tests/tcg/s390x/pgm-specification.mak create mode 100644 tests/tcg/s390x/stgrl-unaligned.S create mode 100644 tests/tcg/s390x/strl-unaligned.S diff --git a/tests/tcg/s390x/Makefile.softmmu-target b/tests/tcg/s390x/Makefile.softmmu-target index 725b6c598db..f32b7872e51 100644 --- a/tests/tcg/s390x/Makefile.softmmu-target +++ b/tests/tcg/s390x/Makefile.softmmu-target @@ -4,8 +4,10 @@ QEMU_OPTS=-action panic=exit-failure -kernel %: %.S $(CC) -march=z13 -m64 -nostdlib -static -Wl,-Ttext=0 \ - -Wl,--build-id=none $< -o $@ + -Wl,--build-id=none -D__ASSEMBLY__ -DCONFIG_SOFTMMU $< -o $@ TESTS += unaligned-lowcore TESTS += bal TESTS += sam + +include $(S390X_SRC)/pgm-specification.mak diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target index a3d3beeffe8..c826eb6fa24 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -33,6 +33,9 @@ TESTS+=chrl cdsg: CFLAGS+=-pthread cdsg: LDFLAGS+=-pthread +include $(S390X_SRC)/pgm-specification.mak +$(PGM_SPECIFICATION_TESTS): CFLAGS+=-x c + Z13_TESTS=vistr $(Z13_TESTS): CFLAGS+=-march=z13 -O2 TESTS+=$(Z13_TESTS) diff --git a/tests/tcg/s390x/asm-const.h b/tests/tcg/s390x/asm-const.h new file mode 100644 index 00000000000..c7e2d6ddc45 --- /dev/null +++ b/tests/tcg/s390x/asm-const.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Based on linux kernel's arch/s390/include/asm/asm-const.h . */ +#ifndef ASM_CONST_H +#define ASM_CONST_H + +#ifdef __ASSEMBLY__ +#define stringify_in_c(...) __VA_ARGS__ +#else +#define __stringify_in_c(...) #__VA_ARGS__ +#define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " " +#endif + +#endif diff --git a/tests/tcg/s390x/br-odd.S b/tests/tcg/s390x/br-odd.S new file mode 100644 index 00000000000..9848c18d6e0 --- /dev/null +++ b/tests/tcg/s390x/br-odd.S @@ -0,0 +1,18 @@ +/* + * Test BRanching to a non-mapped odd address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c( lgrl %r1,addr;) \ + stringify_in_c( br %r1;) + +#define DATA \ + stringify_in_c(addr:;) \ + stringify_in_c( .quad 0xDDDDDDDDDDDDDDDD;) + +#define EXPECTED_OLD_PSWA 0xDDDDDDDDDDDDDDDD + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/cgrl-unaligned.S b/tests/tcg/s390x/cgrl-unaligned.S new file mode 100644 index 00000000000..573eaa5c849 --- /dev/null +++ b/tests/tcg/s390x/cgrl-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test CGRL with a non-doubleword aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( cgrl %r1,unaligned;) + +#define DATA \ + stringify_in_c( .long 0;) \ + stringify_in_c(unaligned:;) \ + stringify_in_c( .quad 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/clrl-unaligned.S b/tests/tcg/s390x/clrl-unaligned.S new file mode 100644 index 00000000000..bd0c02fac73 --- /dev/null +++ b/tests/tcg/s390x/clrl-unaligned.S @@ -0,0 +1,15 @@ +/* + * Test CLRL with a non-word aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa: clrl %r1,unaligned;) + +#define DATA \ + stringify_in_c(.short 0;) \ + stringify_in_c(unaligned: .long 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/crl-unaligned.S b/tests/tcg/s390x/crl-unaligned.S new file mode 100644 index 00000000000..8446be13efc --- /dev/null +++ b/tests/tcg/s390x/crl-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test CRL with a non-word aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( crl %r1,unaligned;) + +#define DATA \ + stringify_in_c( .short 0;) \ + stringify_in_c(unaligned:;) \ + stringify_in_c( .long 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/ex-odd.S b/tests/tcg/s390x/ex-odd.S new file mode 100644 index 00000000000..0427c79d8a4 --- /dev/null +++ b/tests/tcg/s390x/ex-odd.S @@ -0,0 +1,17 @@ +/* + * Test EXECUTEing a non-mapped odd address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c( lgrl %r1,odd_addr;) \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( ex 0,%r1;) + +#define DATA \ + stringify_in_c(odd_addr:;) \ + stringify_in_c( .quad 0xDDDDDDDDDDDDDDDD;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/lgrl-unaligned.S b/tests/tcg/s390x/lgrl-unaligned.S new file mode 100644 index 00000000000..8afb350f0fd --- /dev/null +++ b/tests/tcg/s390x/lgrl-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test LGRL from a non-doubleword aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( lgrl %r1,unaligned;) + +#define DATA \ + stringify_in_c( .long 0;) \ + stringify_in_c(unaligned:) \ + stringify_in_c( .quad 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/llgfrl-unaligned.S b/tests/tcg/s390x/llgfrl-unaligned.S new file mode 100644 index 00000000000..4b22a31c267 --- /dev/null +++ b/tests/tcg/s390x/llgfrl-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test LLGFRL from a non-word aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( llgfrl %r1,unaligned;) + +#define DATA \ + stringify_in_c( .short 0;) \ + stringify_in_c(unaligned:;) \ + stringify_in_c( .long 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/lpswe-unaligned.S b/tests/tcg/s390x/lpswe-unaligned.S new file mode 100644 index 00000000000..3aa1da7298f --- /dev/null +++ b/tests/tcg/s390x/lpswe-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test LPSWE from a non-doubleword aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( lpswe unaligned;) + +#define DATA \ + stringify_in_c( .long 0;) \ + stringify_in_c(unaligned:) \ + stringify_in_c( .quad 0, 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/lrl-unaligned.S b/tests/tcg/s390x/lrl-unaligned.S new file mode 100644 index 00000000000..a7f75a78d7d --- /dev/null +++ b/tests/tcg/s390x/lrl-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test LRL from a non-word aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( lrl %r1,unaligned;) + +#define DATA \ + stringify_in_c( .short 0;) \ + stringify_in_c(unaligned:;) \ + stringify_in_c( .long 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/pgm-specification.inc b/tests/tcg/s390x/pgm-specification.inc new file mode 100644 index 00000000000..e3899ed4718 --- /dev/null +++ b/tests/tcg/s390x/pgm-specification.inc @@ -0,0 +1,90 @@ +/* + * Common code for specification exception testing. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifdef CONFIG_SOFTMMU + .org 0x8d +ilc: + .org 0x8e +program_interruption_code: + .org 0x150 +program_old_psw: + .org 0x1D0 /* program new PSW */ + .quad 0x180000000,pgm /* 64-bit mode */ + .org 0x200 /* lowcore padding */ + + .globl _start +_start: + lpswe start64_psw +start64: + CODE + j failure + +pgm: + chhsi program_interruption_code,0x6 /* PGM_SPECIFICATION? */ + jne failure + lg %r0,expected_old_psw+8 /* ilc adjustment */ + llgc %r1,ilc + agr %r0,%r1 + stg %r0,expected_old_psw+8 + clc expected_old_psw(16),program_old_psw /* correct location? */ + jne failure + lpswe success_psw +failure: + lpswe failure_psw + + .align 8 +start64_psw: + .quad 0x180000000,start64 /* 64-bit mode */ +expected_old_psw: +#ifndef EXPECTED_OLD_PSWA +#define EXPECTED_OLD_PSWA expected_old_pswa +#endif + .quad 0x180000000,EXPECTED_OLD_PSWA +success_psw: + .quad 0x2000180000000,0xfff /* see is_special_wait_psw() */ +failure_psw: + .quad 0x2000180000000,0 /* disabled wait */ + DATA +#else +#include +#include +#include +#include +#include + +#ifndef EXPECTED_OLD_PSWA +extern char expected_old_pswa[]; +#define EXPECTED_OLD_PSWA (long)expected_old_pswa +#endif + +static void handle_sigill(int sig, siginfo_t *info, void *ucontext) +{ + if ((long)info->si_addr != EXPECTED_OLD_PSWA) { + _exit(EXIT_FAILURE); + } + _exit(EXIT_SUCCESS); +} + +asm(" .data\n" + " .align 8\n" + DATA + " .previous\n"); + +int main(void) +{ + struct sigaction act; + int err; + + memset(&act, 0, sizeof(act)); + act.sa_sigaction = handle_sigill; + act.sa_flags = SA_SIGINFO; + err = sigaction(SIGILL, &act, NULL); + assert(err == 0); + + asm volatile(CODE); + + return EXIT_FAILURE; +} +#endif diff --git a/tests/tcg/s390x/pgm-specification.mak b/tests/tcg/s390x/pgm-specification.mak new file mode 100644 index 00000000000..6f8684901d5 --- /dev/null +++ b/tests/tcg/s390x/pgm-specification.mak @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +PGM_SPECIFICATION_TESTS = \ + br-odd \ + cgrl-unaligned \ + clrl-unaligned \ + crl-unaligned \ + ex-odd \ + lgrl-unaligned \ + llgfrl-unaligned \ + lpswe-unaligned \ + lrl-unaligned \ + stgrl-unaligned \ + strl-unaligned +$(PGM_SPECIFICATION_TESTS) : asm-const.h pgm-specification.inc +TESTS += $(PGM_SPECIFICATION_TESTS) diff --git a/tests/tcg/s390x/stgrl-unaligned.S b/tests/tcg/s390x/stgrl-unaligned.S new file mode 100644 index 00000000000..f105560c5c4 --- /dev/null +++ b/tests/tcg/s390x/stgrl-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test STGRL to a non-doubleword aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:) \ + stringify_in_c( stgrl %r1,unaligned) + +#define DATA \ + stringify_in_c( .long 0;) \ + stringify_in_c(unaligned:;) \ + stringify_in_c( .quad 0;) + +#include "pgm-specification.inc" diff --git a/tests/tcg/s390x/strl-unaligned.S b/tests/tcg/s390x/strl-unaligned.S new file mode 100644 index 00000000000..896708cebd1 --- /dev/null +++ b/tests/tcg/s390x/strl-unaligned.S @@ -0,0 +1,17 @@ +/* + * Test STRL to a non-word aligned address. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "asm-const.h" + +#define CODE \ + stringify_in_c(expected_old_pswa:;) \ + stringify_in_c( strl %r1,unaligned;) + +#define DATA \ + stringify_in_c( .short 0;) \ + stringify_in_c(unaligned:;) \ + stringify_in_c( .long 0;) + +#include "pgm-specification.inc"