From patchwork Mon Feb 13 19:27:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1741885 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=yI1EHBwp; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PFvWl06L4z23hX for ; Tue, 14 Feb 2023 06:28:18 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 01392383801D for ; Mon, 13 Feb 2023 19:28:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 01392383801D DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1676316497; bh=4X5eEgCY09FE37P8z6S2iVLquWNR3H0NoDr/ADMAL9A=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=yI1EHBwpeRxrH3bqhupaOhOtoBqjgJTQQumpZbp8LbnSF8GJ5UnnR3lQHvfjsdDYR lA53t09Cr4UraFsWAGr1RHaryMRF+TJ6E0I7IpBXvYYofoi0XV0UOKhZ/qfmYuBZ4Z 6DY/HbJzpTAhkEttTFwna9AhhgJ/ga8l7eRm6lyE= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-yb1-xb31.google.com (mail-yb1-xb31.google.com [IPv6:2607:f8b0:4864:20::b31]) by sourceware.org (Postfix) with ESMTPS id 3F5AF385B51A for ; Mon, 13 Feb 2023 19:27:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3F5AF385B51A Received: by mail-yb1-xb31.google.com with SMTP id 81so5117620ybp.5 for ; Mon, 13 Feb 2023 11:27:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=4X5eEgCY09FE37P8z6S2iVLquWNR3H0NoDr/ADMAL9A=; b=q0U0yI3mueNQmrPz71LOHduNJEEptA12slSVSqzyxR02gvPfELGxU4IboakufkIfqq nv5ixsysjQExD6ZtiXzyHSy7A7/Ln06d1ZAmRSqpQJFn72tNLH5kkjo1pKtyX+lMO9+w tvj2hgDHmiewnPXTt7iz2oPiVX/SQwi3vZojoeb5AYtUa/6Ila1v48UNqcG+qs7Ww3OS wcJGRu3D7rv7GaiCz1d6oQhkSbho304phsCWwzaXO/xOhbc3phYNWo6ejc2fm1E1Dpj2 C9+TiFNoh/tq9P5p4btzRSjMKIduDiFCd/pRR3afpzWQdZRHZR7MHoR9uD0zINuenPdy PZOA== X-Gm-Message-State: AO0yUKVtEvuHRN8+l/jbev/wKOkRCUNyMCHuIuzL7JVJDqpP16U0if+u bd2t2HhrhoxBzuJtWftqhNfnRj9d8ql5YVC5ZWSomDr137YWqg== X-Google-Smtp-Source: AK7set+PKIeyjdQOr/U6e+gTZtenZ/4gAF3OH2OAg+RPNcCjtKAqnRMSO8+xqoLB2LRYT2XtSh+muV7PBQchM+ClORc= X-Received: by 2002:a5b:e86:0:b0:80b:71d9:2ef2 with SMTP id z6-20020a5b0e86000000b0080b71d92ef2mr6154ybr.149.1676316475208; Mon, 13 Feb 2023 11:27:55 -0800 (PST) MIME-Version: 1.0 Date: Mon, 13 Feb 2023 20:27:43 +0100 Message-ID: Subject: [PATCH] i386: Relax extract location operand mode requirements [PR108516] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Combine pass simplifies zero-extend of a zero-extract to: Trying 16 -> 6: 16: r86:QI#0=zero_extract(r87:HI,0x8,0x8) REG_DEAD r87:HI 6: r84:SI=zero_extend(r86:QI) REG_DEAD r86:QI Failed to match this instruction: (set (reg:SI 84 [ s.e2 ]) (zero_extract:SI (reg:HI 87) (const_int 8 [0x8]) (const_int 8 [0x8]))) which fails instruction recognision. The pattern is valid, since there is no requirement on the mode of the location operand. The patch relaxes location operand mode requirements of *extzv and *extv insn patterns to allow all supported integer modes. The patch also adds support for a related sign-extend from zero-extracted operand. 2023-02-13 Uroš Bizjak gcc/ChangeLog: PR target/108516 * config/i386/predicates.md (extr_register_operand): New special predicate. * config/i386/i386.md (*extv): Use extr_register_operand as operand 1 predicate. (*exzv): Ditto. (*extendqi_ext_1): New insn pattern. gcc/testsuite/ChangeLog: PR target/108516 * gcc.target/i386/pr108516-1.c: New test. * gcc.target/i386/pr108516-2.c: Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index e62dd07ad8b..5a946beb1c6 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3159,7 +3159,7 @@ (define_insn "*extv" [(set (match_operand:SWI24 0 "register_operand" "=R") - (sign_extract:SWI24 (match_operand:SWI24 1 "register_operand" "Q") + (sign_extract:SWI24 (match_operand 1 "extr_register_operand" "Q") (const_int 8) (const_int 8)))] "" @@ -3202,7 +3202,7 @@ (define_insn "*extzv" [(set (match_operand:SWI248 0 "register_operand" "=R") - (zero_extract:SWI248 (match_operand:SWI248 1 "register_operand" "Q") + (zero_extract:SWI248 (match_operand 1 "extr_register_operand" "Q") (const_int 8) (const_int 8)))] "" @@ -4777,6 +4777,19 @@ (if_then_else (eq_attr "prefix_0f" "0") (const_string "0") (const_string "1")))]) + +(define_insn "*extendqi_ext_1" + [(set (match_operand:SWI24 0 "register_operand" "=R") + (sign_extend:SWI24 + (subreg:QI + (zero_extract:SWI248 + (match_operand:SWI248 1 "register_operand" "Q") + (const_int 8) + (const_int 8)) 0)))] + "" + "movs{b|x}\t{%h1, %0|%0, %h1}" + [(set_attr "type" "imovx") + (set_attr "mode" "")]) ;; Conversions between float and double. diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index ec1785cde49..cca64f00a6a 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -92,6 +92,14 @@ (and (match_code "reg") (match_test "MASK_REGNO_P (REGNO (op))"))) +;; Match a DI, SI or HImode register operand for extract op. +(define_special_predicate "extr_register_operand" + (and (match_operand 0 "register_operand") + (ior (and (match_test "TARGET_64BIT") + (match_test "GET_MODE (op) == DImode")) + (match_test "GET_MODE (op) == SImode") + (match_test "GET_MODE (op) == HImode")))) + ;; Match a DI, SI, HI or QImode nonimmediate_operand. (define_special_predicate "int_nonimmediate_operand" (and (match_operand 0 "nonimmediate_operand") diff --git a/gcc/testsuite/gcc.target/i386/pr108516-1.c b/gcc/testsuite/gcc.target/i386/pr108516-1.c new file mode 100644 index 00000000000..d5344ef23e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr108516-1.c @@ -0,0 +1,19 @@ +/* PR target/108516 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -dp" } */ +/* { dg-additional-options "-mregparm=1" { target ia32 } } */ + +struct S +{ + unsigned char e1; + unsigned char e2; + unsigned char e3; +}; + +unsigned int +f2 (struct S s) +{ + return s.e2; +} + +/* { dg-final { scan-assembler-not "\\*zero_extend" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr108516-2.c b/gcc/testsuite/gcc.target/i386/pr108516-2.c new file mode 100644 index 00000000000..3e709e8c738 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr108516-2.c @@ -0,0 +1,19 @@ +/* PR target/108516 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -dp" } */ +/* { dg-additional-options "-mregparm=1" { target ia32 } } */ + +struct S +{ + signed char e1; + signed char e2; + signed char e3; +}; + +int +f2 (struct S s) +{ + return s.e2; +} + +/* { dg-final { scan-assembler-not "\\*extzv" } } */