From patchwork Fri Feb 3 14:00:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Isaev X-Patchwork-Id: 1737004 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=syntacore.com header.i=@syntacore.com header.a=rsa-sha256 header.s=mail header.b=DXuaQ+UQ; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4P7cmv02j1z23gY for ; Sat, 4 Feb 2023 01:02:54 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pNwdf-0002Am-3Y; Fri, 03 Feb 2023 09:02:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pNwdd-00025I-An; Fri, 03 Feb 2023 09:02:01 -0500 Received: from forward102j.mail.yandex.net ([2a02:6b8:0:801:2::102]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pNwdZ-000457-SX; Fri, 03 Feb 2023 09:02:01 -0500 Received: from iva1-5283d83ef885.qloud-c.yandex.net (iva1-5283d83ef885.qloud-c.yandex.net [IPv6:2a02:6b8:c0c:16a7:0:640:5283:d83e]) by forward102j.mail.yandex.net (Yandex) with ESMTP id 4EBF84BE8CBD; Fri, 3 Feb 2023 17:01:12 +0300 (MSK) Received: by iva1-5283d83ef885.qloud-c.yandex.net (smtp/Yandex) with ESMTPSA id 91ZhCplZXqM1-DEOe97Z8; Fri, 03 Feb 2023 17:01:11 +0300 X-Yandex-Fwd: 1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=syntacore.com; s=mail; t=1675432871; bh=HDfbGdBTM5i/4nShW913NUhDHP3xIIxXseefl/b2Z8A=; h=Message-Id:Date:Cc:Subject:To:From; b=DXuaQ+UQS9USPC1Lj3g0i1le+HfIhuvLdgVZnblqK8n0wkg3UwaZxZ9Py5f2r2799 2jtPUNfP35tD8X8yxHUt09zf51bAy3gmyounjFN5q24hkT0wJIpR8Mcczj/4+BOND+ s17IkV/PY/LNI7MVNzVHI5t5tF/PNxZhr7UlT618= Authentication-Results: iva1-5283d83ef885.qloud-c.yandex.net; dkim=pass header.i=@syntacore.com From: Vladimir Isaev To: richard.henderson@linaro.org, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, qemu-riscv@nongnu.org Cc: qemu-devel@nongnu.org, Vladimir Isaev Subject: [PATCH] target/riscv: fix ctzw behavior Date: Fri, 3 Feb 2023 17:00:59 +0300 Message-Id: <20230203140059.13068-1-vladimir.isaev@syntacore.com> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 Received-SPF: pass client-ip=2a02:6b8:0:801:2::102; envelope-from=vladimir.isaev@syntacore.com; helo=forward102j.mail.yandex.net X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org According to spec, ctzw should work with 32-bit register, not 64. For example, previous implementation returns 33 for (1<<33) input when the new one returns 32. Signed-off-by: Vladimir Isaev --- target/riscv/insn_trans/trans_rvb.c.inc | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_trans/trans_rvb.c.inc index e2b8329f1e5b..42c6ded13de8 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -80,7 +80,14 @@ static void gen_ctz(TCGv ret, TCGv arg1) static void gen_ctzw(TCGv ret, TCGv arg1) { - tcg_gen_ctzi_tl(ret, arg1, 32); + TCGv_i32 t = tcg_temp_new_i32(); + + tcg_gen_trunc_tl_i32(t, arg1); + tcg_gen_ctzi_i32(t, t, 32); + + tcg_gen_extu_i32_tl(ret, t); + + tcg_temp_free_i32(t); } static bool trans_ctz(DisasContext *ctx, arg_ctz *a)