From patchwork Mon Jan 30 16:54:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 1734289 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=QbEicjF7; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4P5DnG44v9z23j8 for ; Tue, 31 Jan 2023 03:54:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235730AbjA3Qy5 (ORCPT ); Mon, 30 Jan 2023 11:54:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235917AbjA3Qyr (ORCPT ); Mon, 30 Jan 2023 11:54:47 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ABC533D936 for ; Mon, 30 Jan 2023 08:54:45 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id mf7so14877902ejc.6 for ; Mon, 30 Jan 2023 08:54:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=LXg0vcX33DnXDRl4Qdi6ZDWogrA8s0G2Rrxf8IO1PKs=; b=QbEicjF7YmF13ezulDFfNuz727VQByALrw9uuIPZvtZlKMsoG+jKaOarkL4iXLFKTG M0d6hNOY6JOUyW1OrmRyichUnqhw1kBkVBj0LApPmSnftNSC8johSQ78djllzPoCumbP KOd3H32nWwAcGVcTBDzQpq/8ZHGB8vg9dmTqpZYpQxcSQgiP1cAI2AjgfSPJiazPGZl1 wxFm74achDIccqe7q6gGhas3ePdnaoHCZLqbcWoTFz16gQOpPV2Di3ZmnB9dc01SgKNY /ckAetNlwTU+YT3b2tGaxVSjfp7t2vt0DQJWAVym52nNEYWv3LPl04ChAPzvthnsLTsJ Jz6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=LXg0vcX33DnXDRl4Qdi6ZDWogrA8s0G2Rrxf8IO1PKs=; b=FgFIf15KXl3FyO44BxofTPNbKonndwWVdoCI1EMyHNVc7mbBMrd+kyNM2yB8w97WcM I24VFmAnZyKUjm2b3G/n5MpsR4N3kbC91orskDRxXR92GsyAQ7LzZUbyu41MShBebmaD clkja1VAWBBndoFn4/Tld1pE9Q9qLHaqAu2LIAeF2iWJ1m8C+Poqjgk0phs96gO1O7/c ScGUptKTirbPxPH3mHc0YnQ++ucyfw1iliHyMKaq0mX/YW4R+ecr7TQgZ4gNkflfPtaq ETEoj+i3cK+LctRmEcHRiAAFd+JO50S8xFE2eSm/t/ZoglnJi6RkWecEXvZ26EFxUFSG tvfA== X-Gm-Message-State: AO0yUKUqTD0pGKcP2qe//4Ag1cXbdaOfR7k7D/haMib5+0fGrOFNpapO iYSmVRbG2wxC6AF3/dLmZvpB4A== X-Google-Smtp-Source: AK7set+Mbu9nF6QDeSGgFURDfRkwriUDkJi++ex+D+IPiTZoixzQMsBWsfU1u1xAf1BAwf+msRnsxQ== X-Received: by 2002:a17:907:3c16:b0:889:daeb:5532 with SMTP id gh22-20020a1709073c1600b00889daeb5532mr2195829ejc.47.1675097684236; Mon, 30 Jan 2023 08:54:44 -0800 (PST) Received: from localhost.localdomain (abyl20.neoplus.adsl.tpnet.pl. [83.9.31.20]) by smtp.gmail.com with ESMTPSA id lj14-20020a170906f9ce00b0088744fc7084sm2590651ejb.38.2023.01.30.08.54.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 08:54:43 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 1/2] dt-bindings: pincfg-node: Introduce an overridable way to set bias on pins Date: Mon, 30 Jan 2023 17:54:34 +0100 Message-Id: <20230130165435.2347569-1-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We came to a point where we sometimes we support a few dozen boards with a given SoC. Sometimes, we have to take into consideration configurations which deviate rather significatly from the reference or most common designs. In the context of pinctrl, this often comes down to wildly different pin configurations. While pins, function and drive-strength are easily overridable, the (mostly) boolean properties associated with setting bias, aren't. This wouldn't be much of a problem if they didn't differ between boards so often, preventing us from having a "nice" baseline setup without inevitably having to go with an ugly /delete-property/. Introduce bias-type, a bias-type- specific property and clone the pinconf-generic type enum into dt-bindings to allow for setting the bias in an easily overridable manner such as: // SoC DT i2c0_pin: i2c0-pin-state { pins = "gpio10"; function = "gpio"; bias-type = ; }; // Deviant board DT &i2c0_pin { bias-type = ; }; Signed-off-by: Konrad Dybcio --- .../bindings/pinctrl/pincfg-node.yaml | 4 ++ include/dt-bindings/pinctrl/pinconf-generic.h | 40 +++++++++++++++++++ 2 files changed, 44 insertions(+) create mode 100644 include/dt-bindings/pinctrl/pinconf-generic.h diff --git a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml index be81ed22a036..d4ea563d283e 100644 --- a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml @@ -51,6 +51,10 @@ properties: description: use pin-default pull state. Takes as optional argument on hardware supporting it the pull strength in Ohm. + bias-type: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Use the specified bias type. + drive-push-pull: oneOf: - type: boolean diff --git a/include/dt-bindings/pinctrl/pinconf-generic.h b/include/dt-bindings/pinctrl/pinconf-generic.h new file mode 100644 index 000000000000..7d9c7d8f9105 --- /dev/null +++ b/include/dt-bindings/pinctrl/pinconf-generic.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2011 ST-Ericsson SA + * Written on behalf of Linaro for ST-Ericsson + * + * Author: Linus Walleij + */ + +#ifndef _DT_BINDINGS_PINCTRL_PINCONF_GENERIC_H +#define _DT_BINDINGS_PINCTRL_PINCONF_GENERIC_H + +#define BIAS_BUS_HOLD 0 +#define BIAS_DISABLE 1 +#define BIAS_HIGH_IMPEDANCE 2 +#define BIAS_PULL_DOWN 3 +#define BIAS_PULL_PIN_DEFAULT 4 +#define BIAS_PULL_UP 5 +#define DRIVE_OPEN_DRAIN 6 +#define DRIVE_OPEN_SOURCE 7 +#define DRIVE_PUSH_PULL 8 +#define DRIVE_STRENGTH 9 +#define DRIVE_STRENGTH_UA 10 +#define INPUT_DEBOUNCE 11 +#define INPUT_ENABLE 12 +#define INPUT_SCHMITT 13 +#define INPUT_SCHMITT_ENABLE 14 +#define MODE_LOW_POWER 15 +#define MODE_PWM 16 +#define OUTPUT 17 +#define OUTPUT_ENABLE 18 +#define OUTPUT_IMPEDANCE_OHMS 19 +#define PERSIST_STATE 20 +#define POWER_SOURCE 21 +#define SKEW_DELAY 22 +#define SLEEP_HARDWARE_STATE 23 +#define SLEW_RATE 24 +#define PIN_CONFIG_END 0x7F +#define PIN_CONFIG_MAX 0xFF + +#endif From patchwork Mon Jan 30 16:54:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 1734290 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=GOoodPz+; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4P5DnH3CGTz23j6 for ; Tue, 31 Jan 2023 03:54:59 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236213AbjA3Qy6 (ORCPT ); Mon, 30 Jan 2023 11:54:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53158 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236158AbjA3Qys (ORCPT ); Mon, 30 Jan 2023 11:54:48 -0500 Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35AC43D0A4 for ; Mon, 30 Jan 2023 08:54:47 -0800 (PST) Received: by mail-ej1-x632.google.com with SMTP id dr8so12017621ejc.12 for ; Mon, 30 Jan 2023 08:54:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ufhJAWNpVWI5s+uFKzVFnYTvPvLzKFeYy7PIx77olTQ=; b=GOoodPz+j/Nj3krXYVUmcMvp7eE4Q9UnmiITSbTtixmCz/KCJv/O6ZSWAte9XLOJNx EoYDCRXJVT4C5BBRlNTB2AwOe3F5exjMz23eDTpl/ISOgpFuMd53TJYDzlc5yzTq0Q7p FV8E3uD+zyzedG3+64Q1DBSYdkCJiTZwLdzg/d2/7czrMJcFhH1iRpoAwM/jQleWbbkX 0adA11S0DNb1eY4JMhEBvQmCWXkctklrW47nmZ0StqH446q98+48qUNgmYQDdDgWUQKT e9+p+kIOvT7lwhLsKDdg23VtyqMAIK/V+wUt8RPWnJHYWWKB0yA2q7wUhTaQAI8kSjxs ErUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ufhJAWNpVWI5s+uFKzVFnYTvPvLzKFeYy7PIx77olTQ=; b=ecZotcV8ISI71QLd2OZeHEZFAaqrhTNZScd29pbOo6fsWEzy3Wt8feawnc2hJCXblG Vk8Iqfx1j2cAy4ZSGKSyR824rTCh8VC4vpI5U4Sep1xnemBJ/THwDkehsZt2k8nuO4fF oBmql8FKcsKpa+QXHpvUCd/OWXL0ZsnRkQrjU49hFsmYJ7ekdjz5eQ4yfAAByv3RY5LH /wLinZ/TklzjPyX9txF3i44xiHw90lUtHRZjdR/lzf2QEYuS9r7J9M/aONIVep7rnFaY e7JJ9nSrJnsmB8Zak3r/fUqShTR0DxfGsujbFAhZiTErvSJy4qSPlwjZ330t2sa/0rma AcFg== X-Gm-Message-State: AO0yUKUuJDhCt5Yys0Gi+26dNFW7PajoX8j8WlLGiIyR2HXniM+yJZzO bvlmjsve/NtZBZ2P0El6CJX3Dw== X-Google-Smtp-Source: AK7set9N7uRLgO4eAE1Paw3D3zsrQ3qY4m8inwATd9YUXZRpAgs/GLFR396GwUyTsSUXxvW6BwSHjA== X-Received: by 2002:a17:907:8b90:b0:87b:db63:1e18 with SMTP id tb16-20020a1709078b9000b0087bdb631e18mr122730ejc.71.1675097685873; Mon, 30 Jan 2023 08:54:45 -0800 (PST) Received: from localhost.localdomain (abyl20.neoplus.adsl.tpnet.pl. [83.9.31.20]) by smtp.gmail.com with ESMTPSA id lj14-20020a170906f9ce00b0088744fc7084sm2590651ejb.38.2023.01.30.08.54.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 08:54:45 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 2/2] pinctrl: pinconf-generic: Add an overridable way to set bias property Date: Mon, 30 Jan 2023 17:54:35 +0100 Message-Id: <20230130165435.2347569-2-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230130165435.2347569-1-konrad.dybcio@linaro.org> References: <20230130165435.2347569-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We came to a point where we sometimes we support a few dozen boards with a given SoC. Sometimes, we have to take into consideration configurations which deviate rather significatly from the reference or most common designs. In the context of pinctrl, this often comes down to wildly different pin configurations. While pins, function and drive-strength are easily overridable, the (mostly) boolean properties associated with setting bias, aren't. This wouldn't be much of a problem if they didn't differ between boards so often, preventing us from having a "nice" baseline setup without inevitably having to go with an ugly /delete-property/. Introduce logic to handle bias-type, a property which sets a single boolean type of bias on the pin (more than one type of BIAS_ does not make sense, anyway) to make it easily overridable. Signed-off-by: Konrad Dybcio --- drivers/pinctrl/pinconf-generic.c | 35 ++++++++++++++++++++++--- include/linux/pinctrl/pinconf-generic.h | 1 + 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c index 365c4b0ca465..b99c2a85486e 100644 --- a/drivers/pinctrl/pinconf-generic.c +++ b/drivers/pinctrl/pinconf-generic.c @@ -206,11 +206,38 @@ static void parse_dt_cfg(struct device_node *np, unsigned int count, unsigned long *cfg, unsigned int *ncfg) { - int i; + int i, ret; + u32 val; + + /* Let's assume only one type of bias is used.. as it should be.. */ + ret = of_property_read_u32(np, "bias-type", &val); + if (!ret) { + /* Bias properties end at idx PIN_CONFIG_BIAS_PULL_UP */ + if (ret > PIN_CONFIG_BIAS_PULL_UP) { + pr_err("invalid type: %u\n", val); + goto generic_parse; + } - for (i = 0; i < count; i++) { - u32 val; - int ret; + pr_debug("found bias type %u\n", val); + /* + * Properties between PIN_CONFIG_BIAS_PULL_DOWN and PIN_CONFIG_BIAS_PULL_UP + * have a default value of one, others default to zero. + */ + cfg[*ncfg] = pinconf_to_config_packed(val, val >= PIN_CONFIG_BIAS_PULL_DOWN); + (*ncfg)++; + + /* Start the generic property read loop where bias properties end. */ + i = PIN_CONFIG_DRIVE_OPEN_DRAIN; + } else { + /* + * If we don't set bias through bias-type, search for all DT + * properties like nothing ever happened. + */ +generic_parse: + i = 0; + } + + for (; i < count; i++) { const struct pinconf_generic_params *par = ¶ms[i]; ret = of_property_read_u32(np, par->property, &val); diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h index d74b7a4ea154..bcf68ba1ea46 100644 --- a/include/linux/pinctrl/pinconf-generic.h +++ b/include/linux/pinctrl/pinconf-generic.h @@ -117,6 +117,7 @@ struct pinctrl_map; * presented using the packed format. */ enum pin_config_param { + /* Keep in sync with dt-bindings/pinctrl/pinconf-generic.h! */ PIN_CONFIG_BIAS_BUS_HOLD, PIN_CONFIG_BIAS_DISABLE, PIN_CONFIG_BIAS_HIGH_IMPEDANCE,