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Tue, 10 Jan 2023 05:10:34 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:34 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 01/12] configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT Date: Tue, 10 Jan 2023 18:40:05 +0530 Message-Id: <20230110131016.12480-2-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356237-305754-5401-7019-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.215.200 X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan10-87.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Enable configs for building multiple dtbs into a single fit image and load the right dtb for next stage. This will help to use same defconfig for both EVM and SK. Signed-off-by: Sinthu Raja --- No changes configs/j721s2_evm_r5_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 2de5d87bdb..7418dc2900 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -84,6 +84,9 @@ CONFIG_CMD_TIME=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board k3-am68-sk-r5-base-board" +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y From patchwork Tue Jan 10 13:10:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 1724039 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 10 Jan 2023 05:10:38 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:37 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 02/12] configs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT Date: Tue, 10 Jan 2023 18:40:06 +0530 Message-Id: <20230110131016.12480-3-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356239-305754-5398-7020-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.214.199 X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan16-4.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Enable configs for building multiple dtbs into a single fit image and load the right dtb for next stage. Add k3-am68-sk-base-board dtb along with evm dtb inside DTB FIT image. This helps to use same defconfig for both EVM and SK Signed-off-by: Sinthu Raja --- No changes in V5 configs/j721s2_evm_a72_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 2b2f80c4aa..75b4e52238 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -89,6 +89,7 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_OF_LIST="k3-j721s2-common-proc-board k3-am68-sk-base-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y From patchwork Tue Jan 10 13:10:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 1724040 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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So, save env in FAT partition of MMC SD Card. Enable defconfigs relevant for storing env on FAT partition of MMC. Signed-off-by: Sinthu Raja --- No changes in v5. configs/j721s2_evm_a72_defconfig | 3 ++- configs/j721s2_evm_r5_defconfig | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 75b4e52238..1db5b47a24 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -92,7 +92,8 @@ CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_OF_LIST="k3-j721s2-common-proc-board k3-am68-sk-base-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 7418dc2900..f7805e83e0 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -88,6 +88,7 @@ CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board k3-am68-sk-r5-base-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_OVERWRITE=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y From patchwork Tue Jan 10 13:10:08 2023 Content-Type: text/plain; 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Tue, 10 Jan 2023 05:10:43 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:43 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 04/12] board: ti: j721s2: Add support to update board_name for am68-sk Date: Tue, 10 Jan 2023 18:40:08 +0530 Message-Id: <20230110131016.12480-5-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356245-311847-5640-6427-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.215.197 X-BESS-Outbound-Spam-Score: 0.40 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan8-233.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.40 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_SA085b, BSF_BESS_OUTBOUND, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Update setup_board_eeprom_env() to choose the right board name for am68-sk. Signed-off-by: Sinthu Raja Reviewed-by: Tom Rini --- Changes in V5: ============= Add Reviewed-by tag Changes in V2: ============= Address review comments: - Move board_is_xxx within CONFIG_TI_I2C_BOARD_DETECT block to maintain the "mini" U-Boot concept for this SoC. V1: https://patchwork.ozlabs.org/project/uboot/patch/20221027104846.11820-5-sinthu.raja@ti.com/ board/ti/j721s2/evm.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index e09adc8ad3..f223ccf2c6 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -26,8 +26,6 @@ #include "../common/board_detect.h" -#define board_is_j721s2_som() board_ti_k3_is("J721S2X-PM1-SOM") - DECLARE_GLOBAL_DATA_PTR; int board_init(void) @@ -101,6 +99,14 @@ int ft_board_setup(void *blob, struct bd_info *bd) #endif #ifdef CONFIG_TI_I2C_BOARD_DETECT +/* + * Functions specific to EVM and SK designs of J721S2/AM68 family. + */ + +#define board_is_j721s2_som() board_ti_k3_is("J721S2X-PM1-SOM") + +#define board_is_am68_sk_som() board_ti_k3_is("AM68-SK-SOM") + int do_board_detect(void) { int ret; @@ -136,6 +142,8 @@ static void setup_board_eeprom_env(void) if (board_is_j721s2_som()) name = "j721s2"; + else if (board_is_am68_sk_som()) + name = "am68-sk"; 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Tue, 10 Jan 2023 05:10:46 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:45 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 05/12] board: ti: j721s2: Enable support for reading EEPROM at next alternate address Date: Tue, 10 Jan 2023 18:40:09 +0530 Message-Id: <20230110131016.12480-6-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356247-305754-5401-7030-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.215.200 X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan16-56.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at next address 0x51 in order to be compatible with RPi. So start looking for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51. Signed-off-by: Sinthu Raja Reviewed-by: Tom Rini --- Changes in V5: ============= Add Reviewed-by tag board/ti/j721s2/evm.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index f223ccf2c6..a3adb8704e 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -113,9 +113,15 @@ int do_board_detect(void) ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS); - if (ret) - pr_err("Reading on-board EEPROM at 0x%02x failed %d\n", - CONFIG_EEPROM_CHIP_ADDRESS, ret); + if (ret) { + printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n", + CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1); + ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS, + CONFIG_EEPROM_CHIP_ADDRESS + 1); + if (ret) + pr_err("Reading on-board EEPROM at 0x%02x failed %d\n", + CONFIG_EEPROM_CHIP_ADDRESS + 1, ret); + } return ret; } From patchwork Tue Jan 10 13:10:10 2023 Content-Type: text/plain; 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Tue, 10 Jan 2023 05:10:49 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:48 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 06/12] board: ti: j721s2: Add support for detecting multiple device trees Date: Tue, 10 Jan 2023 18:40:10 +0530 Message-Id: <20230110131016.12480-7-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356250-305754-5398-7032-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.216.70 X-BESS-Outbound-Spam-Score: 0.40 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan22-139.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.40 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_SC0_SA085b, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Update the board_fit_config_name_match() to choose the right dtb based on the board name read from EEPROM. Also restrict multpile EEPROM reads by verifying if EEPROM is already read Signed-off-by: Sinthu Raja --- Changes in V5: ============= - Add comment to board_fit_config_name_match API as per the review. No Changes in V3 and V4. Changes in V2: ============= Address review comments: - Remove support for detecting multiple device trees using different DTB V1: https://patchwork.ozlabs.org/project/uboot/patch/20221027104846.11820-7-sinthu.raja@ti.com/ V2: https://patchwork.ozlabs.org/project/uboot/patch/20221221135219.24702-7-sinthu.raja@ti.com/ V4: https://patchwork.ozlabs.org/project/uboot/patch/20230104094350.19394-7-sinthu.raja@ti.com/ board/ti/j721s2/evm.c | 34 ++++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index a3adb8704e..63788f8e44 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -72,16 +72,6 @@ int dram_init_banksize(void) return 0; } -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - if (!strcmp(name, "k3-j721s2-common-proc-board")) - return 0; - - return -1; -} -#endif - #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { @@ -111,6 +101,9 @@ int do_board_detect(void) { int ret; + if (board_ti_was_eeprom_read()) + return 0; + ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS); if (ret) { @@ -179,6 +172,27 @@ static void setup_serial(void) } #endif +/* + * This function chooses the right dtb based on the board name read from + * EEPROM, and it is the safe default for the SoC. + */ +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + bool eeprom_read = board_ti_was_eeprom_read(); + + if (!eeprom_read || board_is_j721s2_som()) { + if (!strcmp(name, "k3-j721s2-common-proc-board")) + return 0; + } else if (!eeprom_read || board_is_am68_sk_som()) { + if (!strcmp(name, "k3-am68-sk-base-board")) + return 0; + } + + return -1; +} +#endif + int board_late_init(void) { if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) { From patchwork Tue Jan 10 13:10:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 1724043 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 10 Jan 2023 05:10:51 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:51 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 07/12] arch: mach-k3: Update board specific API name to K3 generic API name Date: Tue, 10 Jan 2023 18:40:11 +0530 Message-Id: <20230110131016.12480-8-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356216-311847-5640-6399-2 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.215.198 X-BESS-Outbound-Spam-Score: 0.60 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan16-56.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.60 MARKETING_SUBJECT META: Subject contains popular marketing words X-BESS-Outbound-Spam-Status: SCORE=0.60 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_BESS_OUTBOUND, MARKETING_SUBJECT X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Although the board_init_f API initialises the SoC, the API name is incorrectly specified and misleads the functionality. This file should only include k3-specific functionality. Change the API's name to something more K3-specific and separate the function to make it more modular. Signed-off-by: Sinthu Raja Reviewed-by: Tom Rini --- Changes in V5: ============= Add Reviewed-by tag arch/arm/mach-k3/include/mach/sys_proto.h | 3 +++ arch/arm/mach-k3/j721s2_init.c | 13 ++++++++++++- 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h b/arch/arm/mach-k3/include/mach/sys_proto.h index 60287b261c..3d3d90d02d 100644 --- a/arch/arm/mach-k3/include/mach/sys_proto.h +++ b/arch/arm/mach-k3/include/mach/sys_proto.h @@ -19,4 +19,7 @@ int fdt_disable_node(void *blob, char *node_path); bool soc_is_j721e(void); bool soc_is_j7200(void); +void k3_spl_init(void); +void k3_mem_init(void); +bool check_rom_loaded_sysfw(void); #endif diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c index 0206b01d9e..09e55ed456 100644 --- a/arch/arm/mach-k3/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2_init.c @@ -93,7 +93,7 @@ static void store_boot_info_from_rom(void) sizeof(struct rom_extended_boot_data)); } -void board_init_f(ulong dummy) +void k3_spl_init(void) { struct udevice *dev; int ret; @@ -154,6 +154,17 @@ void board_init_f(ulong dummy) /* Output System Firmware version info */ k3_sysfw_print_ver(); +} + +bool check_rom_loaded_sysfw(void) +{ + return is_rom_loaded_sysfw(&bootdata); +} + +void k3_mem_init(void) +{ + struct udevice *dev; + int ret; if (IS_ENABLED(CONFIG_TARGET_J721S2_R5_EVM)) { ret = uclass_get_device_by_name(UCLASS_MISC, "msmc", &dev); From patchwork Tue Jan 10 13:10:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 1724047 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mistralsolutions.com header.i=@mistralsolutions.com header.a=rsa-sha256 header.s=google header.b=SX8IraSS; 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Tue, 10 Jan 2023 05:10:54 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:54 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 08/12] board: ti: j721s2: Add board_init and support for selecting DT based on EEPROM Date: Tue, 10 Jan 2023 18:40:12 +0530 Message-Id: <20230110131016.12480-9-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356258-302964-5495-6548-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.214.200 X-BESS-Outbound-Spam-Score: 0.40 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan8-85.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.40 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND, BSF_SC0_SA085b, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Add the board_init_f API for SPL and run the platform-required SoC initialization. Add the functionality for board name-based DTB selection from FIT within SPL. This will make it easier to utilise one defconfig for both the EVM and the SK. Signed-off-by: Sinthu Raja Reviewed-by: Tom Rini --- Changes in V5: ============= Add Reviewed-by tag Changes in V4: ============= Address review comments: - In align wih the macro conditional statement which missed it in the previous version Changes in V3: ============= Address review comments: - Rework on DTB selection API clarity about mini-U-Boot vs EVM and family support as suggested. V2: https://patchwork.ozlabs.org/project/uboot/cover/20221221135219.24702-9-sinthu.raja@ti.com/ V3: https://patchwork.ozlabs.org/project/uboot/patch/20221227121543.22306-9-sinthu.raja@ti.com/ V4: https://patchwork.ozlabs.org/project/uboot/patch/20230104094350.19394-9-sinthu.raja@ti.com/ board/ti/j721s2/evm.c | 64 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index 63788f8e44..2f6a8b9bee 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "../common/board_detect.h" @@ -206,3 +207,66 @@ int board_late_init(void) void spl_board_init(void) { } + +/* Support for the various EVM / SK families */ +#if defined(CONFIG_SPL_OF_LIST) && defined(CONFIG_TI_I2C_BOARD_DETECT) +void do_dt_magic(void) +{ + int ret, rescan, mmc_dev = -1; + static struct mmc *mmc; + + do_board_detect(); + + /* + * Board detection has been done. + * Let us see if another dtb wouldn't be a better match + * for our board + */ + if (IS_ENABLED(CONFIG_CPU_V7R)) { + ret = fdtdec_resetup(&rescan); + if (!ret && rescan) { + dm_uninit(); + dm_init_and_scan(true); + } + } + + /* + * Because of multi DTB configuration, the MMC device has + * to be re-initialized after reconfiguring FDT inorder to + * boot from MMC. Do this when boot mode is MMC and ROM has + * not loaded SYSFW. + */ + switch (spl_boot_device()) { + case BOOT_DEVICE_MMC1: + mmc_dev = 0; + break; + case BOOT_DEVICE_MMC2: + case BOOT_DEVICE_MMC2_2: + mmc_dev = 1; + break; + } + + if (mmc_dev > 0 && !check_rom_loaded_sysfw()) { + ret = mmc_init_device(mmc_dev); + if (!ret) { + mmc = find_mmc_device(mmc_dev); + if (mmc) { + ret = mmc_init(mmc); + if (ret) + printf("mmc init failed with error: %d\n", ret); + } + } + } +} +#endif + +#ifdef CONFIG_SPL_BUILD +void board_init_f(ulong dummy) +{ + k3_spl_init(); +#if defined(CONFIG_SPL_OF_LIST) && defined(CONFIG_TI_I2C_BOARD_DETECT) + do_dt_magic(); +#endif + k3_mem_init(); +} +#endif From patchwork Tue Jan 10 13:10:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 1724044 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 10 Jan 2023 05:10:57 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:56 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 09/12] arm: dts: Add initial support for AM68 Starter Kit System on Module Date: Tue, 10 Jan 2023 18:40:13 +0530 Message-Id: <20230110131016.12480-10-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356258-305754-5398-7041-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.214.199 X-BESS-Outbound-Spam-Score: 0.90 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan8-85.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.40 BSF_SC0_SA085b META: Custom Rule SA085b 0.50 BSF_RULE_7582B META: Custom Rule 7582B 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.90 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND, BSF_SC0_SA085b, BSF_RULE_7582B, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja AM68 Starter Kit (SK) is a low cost, small form factor board designed for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high performance vision accelerators, hardware accelerators, latest C71x DSP, high bandwidth real-time IPs for capture and display. The SoC is power optimized to provide best in class performance for industrial applications. AM68 SK supports the following interfaces: * 16 GB LPDDR4 RAM * x1 Gigabit Ethernet interface * x1 USB 3.1 Type-C port * x2 USB 3.1 Type-A ports * x1 PCIe M.2 M Key * 512 Mbit OSPI flash * x2 CSI2 Camera interface (RPi and TI Camera connector) * 40-pin Raspberry Pi GPIO header SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash. Therefore, add support for the components present on the SoM. Schematics: https://www.ti.com/lit/zip/SPRR463 TRM: http://www.ti.com/lit/pdf/spruj28 Signed-off-by: Sinthu Raja --- Hi All, The Kernel DTSI is under review and waiting to get merged. Kernel Link: https://lore.kernel.org/linux-arm-kernel/20230110110052.14851-4-sinthu.raja@ti.com/ No Changes in V5 arch/arm/dts/k3-am68-sk-som.dtsi | 127 +++++++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 arch/arm/dts/k3-am68-sk-som.dtsi diff --git a/arch/arm/dts/k3-am68-sk-som.dtsi b/arch/arm/dts/k3-am68-sk-som.dtsi new file mode 100644 index 0000000000..cb1c58fcd1 --- /dev/null +++ b/arch/arm/dts/k3-am68-sk-som.dtsi @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-j721s2.dtsi" +#include + +/ { + memory@80000000 { + device_type = "memory"; + /* 16 GB RAM */ + reg = <0x00 0x80000000 0x00 0x80000000>, + <0x08 0x80000000 0x03 0x80000000>; + }; + + /* Reserving memory regions still pending */ + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; 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Tue, 10 Jan 2023 05:11:00 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.10.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:10:59 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 10/12] arm: dts: Add support for A72 specific AM68 Starter Kit Base Board Date: Tue, 10 Jan 2023 18:40:14 +0530 Message-Id: <20230110131016.12480-11-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356261-302964-5500-6554-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.216.72 X-BESS-Outbound-Spam-Score: 0.50 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan15-241.eu-central-1a.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.50 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_RULE7568M, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja The SK architecture comprises of baseboard and a SOM board. The AM68 Starter Kit's baseboard contains most of the actual connectors, power supply etc. The System on Module (SoM) is plugged on to the base board. Therefore, add support for peripherals brought out in the base board. Schematics: https://www.ti.com/lit/zip/SPRR463 Signed-off-by: Sinthu Raja --- No changes in V5 arch/arm/dts/Makefile | 3 +- .../arm/dts/k3-am68-sk-base-board-u-boot.dtsi | 150 ++++++++ arch/arm/dts/k3-am68-sk-base-board.dts | 353 ++++++++++++++++++ 3 files changed, 505 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am68-sk-base-board.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 43951a7731..6d49baaaa7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1249,7 +1249,8 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ k3-j7200-r5-common-proc-board.dtb \ k3-j721e-sk.dtb \ k3-j721e-r5-sk.dtb -dtb-$(CONFIG_SOC_K3_J721S2) += k3-j721s2-common-proc-board.dtb\ +dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\ + k3-j721s2-common-proc-board.dtb\ k3-j721s2-r5-common-proc-board.dtb dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \ k3-am642-r5-evm.dtb \ diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi new file mode 100644 index 0000000000..12faaae59b --- /dev/null +++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/ { + chosen { + stdout-path = "serial2:115200n8"; + tick-timer = &timer1; + }; + + aliases { + serial0 = &wkup_uart0; + serial1 = &mcu_uart0; + serial2 = &main_uart8; + i2c0 = &wkup_i2c0; + i2c1 = &mcu_i2c0; + i2c2 = &mcu_i2c1; + i2c3 = &main_i2c0; + ethernet0 = &cpsw_port1; + mmc1 = &main_sdhci1; + }; +}; + +&wkup_i2c0 { + u-boot,dm-spl; +}; + +&cbass_main { + u-boot,dm-spl; +}; + +&main_navss { + u-boot,dm-spl; +}; + +&cbass_mcu_wakeup { + u-boot,dm-spl; + + timer1: timer@40400000 { + compatible = "ti,omap5430-timer"; + reg = <0x0 0x40400000 0x0 0x80>; + ti,timer-alwon; + clock-frequency = <250000000>; + u-boot,dm-spl; + }; + + chipid@43000014 { + u-boot,dm-spl; + }; +}; + +&mcu_navss { + u-boot,dm-spl; +}; + +&mcu_ringacc { + reg = <0x0 0x2b800000 0x0 0x400000>, + <0x0 0x2b000000 0x0 0x400000>, + <0x0 0x28590000 0x0 0x100>, + <0x0 0x2a500000 0x0 0x40000>, + <0x0 0x28440000 0x0 0x40000>; + reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; + u-boot,dm-spl; +}; + +&mcu_udmap { + reg = <0x0 0x285c0000 0x0 0x100>, + <0x0 0x284c0000 0x0 0x4000>, + <0x0 0x2a800000 0x0 0x40000>, + <0x0 0x284a0000 0x0 0x4000>, + <0x0 0x2aa00000 0x0 0x40000>, + <0x0 0x28400000 0x0 0x2000>; + reg-names = "gcfg", "rchan", "rchanrt", "tchan", + "tchanrt", "rflow"; + u-boot,dm-spl; +}; + +&secure_proxy_main { + u-boot,dm-spl; +}; + +&sms { + u-boot,dm-spl; + k3_sysreset: sysreset-controller { + compatible = "ti,sci-sysreset"; + u-boot,dm-spl; + }; +}; + +&main_pmx0 { + u-boot,dm-spl; +}; + +&main_uart8_pins_default { + u-boot,dm-spl; +}; + +&main_mmc1_pins_default { + u-boot,dm-spl; +}; + +&wkup_pmx0 { + u-boot,dm-spl; +}; + +&k3_pds { + u-boot,dm-spl; +}; + +&k3_clks { + u-boot,dm-spl; +}; + +&k3_reset { + u-boot,dm-spl; +}; + +&main_uart8 { + u-boot,dm-spl; +}; + +&mcu_uart0 { + u-boot,dm-spl; +}; + +&wkup_uart0 { + u-boot,dm-spl; +}; + +&mcu_cpsw { + reg = <0x0 0x46000000 0x0 0x200000>, + <0x0 0x40f00200 0x0 0x8>; + reg-names = "cpsw_nuss", "mac_efuse"; + /delete-property/ ranges; + + cpsw-phy-sel@40f04040 { + compatible = "ti,am654-cpsw-phy-sel"; + reg= <0x0 0x40f04040 0x0 0x4>; + reg-names = "gmii-sel"; + }; +}; + +&main_sdhci0 { + status = "disabled"; +}; + +&main_sdhci1 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-am68-sk-base-board.dts b/arch/arm/dts/k3-am68-sk-base-board.dts new file mode 100644 index 0000000000..8fc03324ab --- /dev/null +++ b/arch/arm/dts/k3-am68-sk-base-board.dts @@ -0,0 +1,353 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + * + * Base Board: **Yet to Add** + */ + +/dts-v1/; + +#include "k3-am68-sk-som.dtsi" +#include +#include +#include + +/ { + compatible = "ti,am68-sk", "ti,j721s2"; + model = "Texas Instruments AM68 SK"; + + chosen { + stdout-path = "serial2:115200n8"; + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000"; + }; + + aliases { + serial2 = &main_uart8; + mmc1 = &main_sdhci1; + }; + + vusb_main: fixedregulator-vusb-main5v0 { + /* USB MAIN INPUT 5V DC */ + compatible = "regulator-fixed"; + regulator-name = "vusb-main5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + vsys_3v3: fixedregulator-vsys3v3 { + /* Output of LM5141 */ + compatible = "regulator-fixed"; + regulator-name = "vsys_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vusb_main>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_mmc1: fixedregulator-sd { + /* Output of TPS22918 */ + compatible = "regulator-fixed"; + regulator-name = "vdd_mmc1"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + vin-supply = <&vsys_3v3>; + gpio = <&exp1 10 GPIO_ACTIVE_HIGH>; + }; + + vdd_sd_dv: gpio-regulator-TLV71033 { + /* Output of TLV71033 */ + compatible = "regulator-gpio"; + regulator-name = "tlv71033"; + pinctrl-names = "default"; + pinctrl-0 = <&vdd_sd_dv_pins_default>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + vin-supply = <&vsys_3v3>; + gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0>, + <3300000 0x1>; + }; +}; + +&main_pmx0 { + main_uart8_pins_default: main-uart8-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */ + J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */ + J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ + J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ + >; + }; + + main_i2c0_pins_default: i2c0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */ + J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */ + >; + }; + + main_mmc1_pins_default: main-mmc1-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ + J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ + J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */ + J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ + J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ + J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ + J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ + J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ + >; + }; + + vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0c4, PIN_INPUT, 7) /* (AB26) ECAP0_IN_APWM_OUT.GPIO0_49 */ + >; + }; +}; + +&wkup_pmx0 { + mcu_cpsw_pins_default: mcu-cpsw-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ + J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ + J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */ + J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */ + J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */ + J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */ + J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */ + J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */ + J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */ + J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */ + J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */ + J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ + >; + }; + + mcu_mdio_pins_default: mcu-mdio-pins-default { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ + J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ + >; + }; +}; + +&main_gpio2 { + status = "disabled"; +}; + +&main_gpio4 { + status = "disabled"; +}; + +&main_gpio6 { + status = "disabled"; +}; + +&wkup_gpio1 { + status = "disabled"; +}; + +&wkup_uart0 { + status = "reserved"; +}; + +&main_uart0 { + status = "disabled"; +}; + +&main_uart1 { + status = "disabled"; +}; + +&main_uart2 { + status = "disabled"; +}; + +&main_uart3 { + status = "disabled"; +}; + +&main_uart4 { + status = "disabled"; +}; + +&main_uart5 { + status = "disabled"; +}; + +&main_uart6 { + status = "disabled"; +}; + +&main_uart7 { + status = "disabled"; +}; + +&main_uart8 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart8_pins_default>; + /* Shared with TFA on this platform */ + power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>; +}; + +&main_uart9 { + status = "disabled"; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + + exp1: gpio@21 { + compatible = "ti,tca6416"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPN", "HDMI_PDN", + "HDMI_LS_OE", "DP0_3V3_EN", "BOARDID_EEPROM_WP", + "CAN_STB", "","GPIO_uSD_PWR_EN", "EDP_ENABLE", + "IO_EXP_PCIE1_M2_RSTZ", "IO_EXP_MCU_RGMII_RSTZ", + "IO_EXP_CSI1_EXP_RSTZ", "","CSI0_B_GPIO1", + "CSI1_B_GPIO1"; + }; +}; + +&main_i2c1 { + status = "disabled"; +}; + +&main_i2c2 { + status = "disabled"; +}; + +&main_i2c3 { + status = "disabled"; +}; + +&main_i2c4 { + status = "disabled"; +}; + +&main_i2c5 { + status = "disabled"; +}; + +&main_i2c6 { + status = "disabled"; +}; + +&main_sdhci0 { + status = "disabled"; +}; + +&main_sdhci1 { + /* SD card */ + pinctrl-0 = <&main_mmc1_pins_default>; + pinctrl-names = "default"; + disable-wp; + vmmc-supply = <&vdd_mmc1>; + vqmmc-supply = <&vdd_sd_dv>; +}; + +&mcu_cpsw { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; +}; + +&davinci_mdio { + phy0: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = ; + ti,fifo-depth = ; + ti,min-output-impedance; + }; +}; + +&cpsw_port1 { + phy-mode = "rgmii-rxid"; + phy-handle = <&phy0>; +}; + +&mcu_mcan0 { + status = "disabled"; +}; + +&mcu_mcan1 { + status = "disabled"; +}; + +&main_mcan0 { + status = "disabled"; +}; + +&main_mcan1 { + status = "disabled"; +}; + +&main_mcan2 { + status = "disabled"; +}; + +&main_mcan3 { + status = "disabled"; +}; + +&main_mcan4 { + status = "disabled"; +}; + +&main_mcan5 { + status = "disabled"; +}; + +&main_mcan6 { + status = "disabled"; +}; + +&main_mcan7 { + status = "disabled"; +}; + +&main_mcan8 { + status = "disabled"; +}; + +&main_mcan9 { + status = "disabled"; +}; + +&main_mcan10 { + status = "disabled"; +}; + +&main_mcan11 { + status = "disabled"; +}; + +&main_mcan12 { + status = "disabled"; +}; + +&main_mcan13 { + status = "disabled"; +}; + +&main_mcan14 { + status = "disabled"; +}; + +&main_mcan15 { + status = "disabled"; +}; + +&main_mcan17 { + status = "disabled"; +}; From patchwork Tue Jan 10 13:10:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 1724046 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mistralsolutions.com header.i=@mistralsolutions.com header.a=rsa-sha256 header.s=google header.b=bIZkfs81; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NrrpP5PHcz23gB for ; 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Tue, 10 Jan 2023 05:11:02 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.11.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:11:02 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 11/12] arm: dts: k3-am68-sk: Add r5 specific dt support Date: Tue, 10 Jan 2023 18:40:15 +0530 Message-Id: <20230110131016.12480-12-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356264-305754-5394-7046-1 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.214.199 X-BESS-Outbound-Spam-Score: 0.50 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan20-207.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.50 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_SC0_MISMATCH_TO, BSF_RULE7568M, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Add initial support for AM68 SK device tree that runs on R5. Signed-off-by: Sinthu Raja --- No changes in V5 arch/arm/dts/Makefile | 1 + arch/arm/dts/k3-am68-sk-r5-base-board.dts | 194 ++++++++++++++++++++++ 2 files changed, 195 insertions(+) create mode 100644 arch/arm/dts/k3-am68-sk-r5-base-board.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 6d49baaaa7..be6e7b4e79 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1250,6 +1250,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ k3-j721e-sk.dtb \ k3-j721e-r5-sk.dtb dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\ + k3-am68-sk-r5-base-board.dtb\ k3-j721s2-common-proc-board.dtb\ k3-j721s2-r5-common-proc-board.dtb dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \ diff --git a/arch/arm/dts/k3-am68-sk-r5-base-board.dts b/arch/arm/dts/k3-am68-sk-r5-base-board.dts new file mode 100644 index 0000000000..46ee6c4422 --- /dev/null +++ b/arch/arm/dts/k3-am68-sk-r5-base-board.dts @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; + +#include "k3-am68-sk-som.dtsi" +#include "k3-j721s2-ddr-evm-lp4-4266.dtsi" +#include "k3-j721s2-ddr.dtsi" + +/ { + chosen { + firmware-loader = &fs_loader0; + stdout-path = &main_uart8; + tick-timer = &timer1; + }; + + aliases { + remoteproc0 = &sysctrler; + remoteproc1 = &a72_0; + }; + + fs_loader0: fs_loader@0 { + compatible = "u-boot,fs-loader"; + u-boot,dm-pre-reloc; + }; + + a72_0: a72@0 { + compatible = "ti,am654-rproc"; + reg = <0x0 0x00a90000 0x0 0x10>; + power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; + resets = <&k3_reset 202 0>; + clocks = <&k3_clks 61 1>; + assigned-clocks = <&k3_clks 61 1>, <&k3_clks 202 0>; + assigned-clock-parents = <&k3_clks 61 2>; + assigned-clock-rates = <200000000>, <2000000000>; + ti,sci = <&sms>; + ti,sci-proc-id = <32>; + ti,sci-host-id = <10>; + u-boot,dm-spl; + }; + + clk_200mhz: dummy_clock_200mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + u-boot,dm-spl; + }; + + clk_19_2mhz: dummy_clock_19_2mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <19200000>; + u-boot,dm-spl; + }; +}; + +&cbass_mcu_wakeup { + sa3_secproxy: secproxy@44880000 { + u-boot,dm-spl; + compatible = "ti,am654-secure-proxy"; + reg = <0x0 0x44880000 0x0 0x20000>, + <0x0 0x44860000 0x0 0x20000>, + <0x0 0x43600000 0x0 0x10000>; + reg-names = "rt", "scfg", "target_data"; + #mbox-cells = <1>; + }; + + mcu_secproxy: secproxy@2a380000 { + compatible = "ti,am654-secure-proxy"; + reg = <0x0 0x2a380000 0x0 0x80000>, + <0x0 0x2a400000 0x0 0x80000>, + <0x0 0x2a480000 0x0 0x80000>; + reg-names = "rt", "scfg", "target_data"; + #mbox-cells = <1>; + u-boot,dm-spl; + }; + + sysctrler: sysctrler { + compatible = "ti,am654-system-controller"; + mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>, <&sa3_secproxy 5>; + mbox-names = "tx", "rx", "boot_notify"; + u-boot,dm-spl; + }; + + dm_tifs: dm-tifs { + compatible = "ti,j721e-dm-sci"; + ti,host-id = <3>; + ti,secure-host; + mbox-names = "rx", "tx"; + mboxes= <&mcu_secproxy 21>, + <&mcu_secproxy 23>; + u-boot,dm-spl; + }; +}; + +&main_pmx0 { + main_uart8_pins_default: main-uart8-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */ + J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ + >; + }; + + main_mmc1_pins_default: main-mmc1-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ + J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ + J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */ + J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */ + J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ + J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */ + J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */ + J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ + >; + }; + + main_usbss0_pins_default: main-usbss0-pins-default { + pinctrl-single,pins = < + J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */ + >; + }; +}; + +&wkup_pmx0 { + mcu_uart0_pins_default: mcu-uart0-pins-default { + u-boot,dm-spl; + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0f4, PIN_INPUT, 0) /*(C24) WKUP_GPIO0_13.MCU_UART0_RXD*/ + J721S2_WKUP_IOPAD(0x0f0, PIN_OUTPUT, 0) /*(C25) WKUP_GPIO0_12.MCU_UART0_TXD*/ + >; + }; + + wkup_uart0_pins_default: wkup-uart0-pins-default { + u-boot,dm-spl; + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0d8, PIN_INPUT, 0) /*(E25) WKUP_GPIO0_6.WKUP_UART0_CTSn*/ + J721S2_WKUP_IOPAD(0x0dc, PIN_OUTPUT, 0) /*(F28) WKUP_GPIO0_7.WKUP_UART0_RTSn*/ + J721S2_WKUP_IOPAD(0x0b0, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */ + J721S2_WKUP_IOPAD(0x0b4, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */ + >; + }; + +}; + +&sms { + mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; + mbox-names = "tx", "rx", "notify"; + ti,host-id = <4>; + ti,secure-host; + u-boot,dm-spl; +}; + +&wkup_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&wkup_uart0_pins_default>; +}; + +&mcu_uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&mcu_uart0_pins_default>; +}; + +&main_uart8 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart8_pins_default>; +}; + +&main_sdhci0 { + status = "disabled"; +}; + +&main_sdhci1 { + /delete-property/ power-domains; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + pinctrl-0 = <&main_mmc1_pins_default>; + pinctrl-names = "default"; + clock-names = "clk_xin"; + clocks = <&clk_200mhz>; + ti,driver-strength-ohm = <50>; +}; + +&mcu_ringacc { + ti,sci = <&dm_tifs>; +}; + +&mcu_udmap { + ti,sci = <&dm_tifs>; +}; + +#include "k3-am68-sk-base-board-u-boot.dtsi" From patchwork Tue Jan 10 13:10:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinthu Raja X-Patchwork-Id: 1724049 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Tue, 10 Jan 2023 05:11:05 -0800 (PST) X-Google-Smtp-Source: AMrXdXvWjc+r/wmAHrDSffV/oYUY61nZioOT2rT6VeJMJcq6vmUUu92tRUE0avIvN3JphXwhKSUf4g== X-Received: by 2002:a62:1c84:0:b0:576:e4c7:97bf with SMTP id c126-20020a621c84000000b00576e4c797bfmr66352082pfc.15.1673356265618; Tue, 10 Jan 2023 05:11:05 -0800 (PST) Received: from LAP568U.mistral.in ([106.51.227.150]) by smtp.gmail.com with ESMTPSA id 14-20020a630c4e000000b00478f87eaa44sm6654907pgm.35.2023.01.10.05.11.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jan 2023 05:11:05 -0800 (PST) From: Sinthu Raja X-Google-Original-From: Sinthu Raja To: u-boot@lists.denx.de, Tom Rini , Marcel Ziswiler , Marek Vasut , Vignesh Raghavendra Cc: Sinthu Raja Subject: [PATCH V5 12/12] include: configs: Update env for selecting right dtb Date: Tue, 10 Jan 2023 18:40:16 +0530 Message-Id: <20230110131016.12480-13-sinthu.raja@ti.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230110131016.12480-1-sinthu.raja@ti.com> References: <20230110131016.12480-1-sinthu.raja@ti.com> MIME-Version: 1.0 X-BESS-ID: 1673356233-302964-5494-6522-4 X-BESS-VER: 2019.1_20221214.2106 X-BESS-Apparent-Source-IP: 209.85.216.71 X-BESS-Outbound-Spam-Score: 0.00 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.245374 [from cloudscan18-46.eu-central-1b.ess.aws.cudaops.com] Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.00 BSF_BESS_OUTBOUND META: BESS Outbound 0.00 BSF_SC0_MISMATCH_TO META: Envelope rcpt doesn't match header X-BESS-Outbound-Spam-Status: SCORE=0.00 using account:ESS91090 scores of KILL_LEVEL=7.0 tests=BSF_BESS_OUTBOUND, BSF_SC0_MISMATCH_TO X-BESS-BRTS-Status: 1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Sinthu Raja Now that single defconfig shall be used for booting J721S2 EVM and AM68 SK, the default device tree will not work for selecting dtb for kernel. Update the findfdt env to select right dtb based on board_name env variable. Signed-off-by: Sinthu Raja Reviewed-by: Tom Rini --- Changes in V5: ============= Add Reviewed-by tag. include/configs/j721s2_evm.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 932d7d3c8c..715f03048a 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -32,6 +32,10 @@ "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "findfdt=" \ "setenv name_fdt ${default_device_tree};" \ + "if test $board_name = j721s2; then " \ + "setenv name_fdt k3-j721s2-common-proc-board.dtb; fi;" \ + "if test $board_name = am68-sk; then " \ + "setenv name_fdt k3-am68-sk-base-board.dtb; fi;"\ "setenv fdtfile ${name_fdt}\0" \ "name_kern=Image\0" \ "console=ttyS2,115200n8\0" \