From patchwork Tue Jan 3 07:24:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "juzhe.zhong@rivai.ai" X-Patchwork-Id: 1720916 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NmPQ52Vrdz23dq for ; Tue, 3 Jan 2023 18:24:58 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 788A53858281 for ; Tue, 3 Jan 2023 07:24:56 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) by sourceware.org (Postfix) with ESMTPS id 46A923858D1E for ; Tue, 3 Jan 2023 07:24:44 +0000 (GMT) X-QQ-mid: bizesmtp67t1672730679tbd4dh0s Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 03 Jan 2023 15:24:38 +0800 (CST) X-QQ-SSF: 01400000000000E0L000000A0000000 X-QQ-FEAT: r/cTxDoDoiGuF0xg/22P82O61igd0JFapi9JKHSiUpTobNzWH27UYAMuRH6Z7 eQoTY8ZwN5P8hDFP0d62Km9xtsD5TQq5U0qAbTMLf4IAzBfDbUUIhmFmak7bMBKY488W4Q0 J/iO2N9bGDKNsvG7zUqSTlzG5iKbrqQbckWCjZVYVAtZ16y5yU9AiR1l/SBFxoajmEA6hLu NghHsL56T5+XP2/YnSdebtwNRRLbIOseCqOhzLx66JOjC3ZyQwG8NXyD+70+Oe0l6SDM8ly /v7tRXYJXtd/rr+at1w397b9JzAgVdxQ6JmnACy6eGy/Y5RACKtYhr6IKbv9NaorEAf8uu0 USlOTWiXi2LsB9Xv2DZx/iW5DBFEDgMb+dNa5qOfDq6dlrR7T+5BEPHClCu2WMtslXLg2LD ssQOEE8IwOU= X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Simplify codes of changing vsetvl instruction Date: Tue, 3 Jan 2023 15:24:36 +0800 Message-Id: <20230103072436.157051-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Ju-Zhe Zhong This patch is NFC patch. I move these code as a function since we will reuse it in the following patch (Refine phase 3 of VSETVL PASS) gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function. (pass_vsetvl::compute_global_backward_infos): Simplify codes. --- gcc/config/riscv/riscv-vsetvl.cc | 36 ++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index fe76bea297e..6dbaea32b03 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -880,6 +880,25 @@ change_insn (function_info *ssa, insn_change change, insn_info *insn, return true; } +static void +change_vsetvl_insn (const insn_info *insn, const vector_insn_info &info) +{ + rtx_insn *rinsn; + if (vector_config_insn_p (insn->rtl ())) + { + rinsn = insn->rtl (); + gcc_assert (vsetvl_insn_p (rinsn) && "Can't handle X0, rs1 vsetvli yet"); + } + else + { + gcc_assert (has_vtype_op (insn->rtl ())); + rinsn = PREV_INSN (insn->rtl ()); + gcc_assert (vector_config_insn_p (rinsn)); + } + rtx new_pat = gen_vsetvl_pat (rinsn, info); + change_insn (rinsn, new_pat); +} + avl_info::avl_info (const avl_info &other) { m_value = other.get_value (); @@ -1941,7 +1960,6 @@ pass_vsetvl::compute_global_backward_infos (void) /* Backward propagate to each predecessor. */ FOR_EACH_EDGE (e, ei, cfg_bb->preds) { - rtx new_pat; auto &block_info = m_vector_manager->vector_block_infos[e->src->index]; @@ -2011,21 +2029,7 @@ pass_vsetvl::compute_global_backward_infos (void) be_merged = block_info.local_dem; vector_insn_info new_info = be_merged.merge (prop, true); - rtx_insn *rinsn; - if (vector_config_insn_p (new_info.get_insn ()->rtl ())) - { - rinsn = new_info.get_insn ()->rtl (); - gcc_assert (vsetvl_insn_p (rinsn) - && "Can't handle X0, rs1 vsetvli yet"); - } - else - { - gcc_assert (has_vtype_op (new_info.get_insn ()->rtl ())); - rinsn = PREV_INSN (new_info.get_insn ()->rtl ()); - gcc_assert (vector_config_insn_p (rinsn)); - } - new_pat = gen_vsetvl_pat (rinsn, new_info); - change_insn (rinsn, new_pat); + change_vsetvl_insn (new_info.get_insn (), new_info); if (block_info.local_dem == block_info.reaching_out) block_info.local_dem = new_info; block_info.reaching_out = new_info;