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Mon, 12 Dec 2022 20:50:10 -0500 (EST) From: Samuel Holland To: Stefan Roese Cc: Simon Glass , u-boot@lists.denx.de, Tom Rini , Samuel Holland , Johan Jonker , =?utf-8?q?Pali_Roh=C3=A1r?= Subject: [PATCH v2] serial: ns16550: Enable clocks during probe Date: Mon, 12 Dec 2022 19:50:09 -0600 Message-Id: <20221213015009.9229-1-samuel@sholland.org> X-Mailer: git-send-email 2.37.4 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean If the UART bus clock has a gate, it must be enabled before the UART can be used. Signed-off-by: Samuel Holland --- Changes in v2: - Only enable the first clock, as using the clk_get_bulk() API pushes a board (phycore-rk3288) over its SPL size limit. drivers/serial/ns16550.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 7592979cab5..072419343a3 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -507,6 +507,7 @@ int ns16550_serial_probe(struct udevice *dev) struct ns16550 *const com_port = dev_get_priv(dev); struct reset_ctl_bulk reset_bulk; fdt_addr_t addr; + struct clk clk; int ret; /* @@ -524,6 +525,10 @@ int ns16550_serial_probe(struct udevice *dev) if (!ret) reset_deassert_bulk(&reset_bulk); + ret = clk_get_by_index(dev, 0, &clk); + if (!ret) + clk_enable(&clk); + com_port->plat = dev_get_plat(dev); ns16550_init(com_port, -1);