From patchwork Thu Mar 8 13:33:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 883151 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=axis.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zxs2f64mHz9sfj for ; Fri, 9 Mar 2018 00:35:22 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755898AbeCHNdn (ORCPT ); Thu, 8 Mar 2018 08:33:43 -0500 Received: from bastet.se.axis.com ([195.60.68.11]:60570 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755824AbeCHNdl (ORCPT ); Thu, 8 Mar 2018 08:33:41 -0500 Received: from localhost (localhost [127.0.0.1]) by bastet.se.axis.com (Postfix) with ESMTP id 2BC5118771; Thu, 8 Mar 2018 14:33:40 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at bastet.se.axis.com Received: from bastet.se.axis.com ([IPv6:::ffff:127.0.0.1]) by localhost (bastet.se.axis.com [::ffff:127.0.0.1]) (amavisd-new, port 10024) with LMTP id 9jR31fmaJYtw; Thu, 8 Mar 2018 14:33:39 +0100 (CET) Received: from boulder02.se.axis.com (boulder02.se.axis.com [10.0.8.16]) by bastet.se.axis.com (Postfix) with ESMTPS id D78051876E; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C147C1A088; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B4D251A06B; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: from thoth.se.axis.com (unknown [10.0.2.173]) by boulder02.se.axis.com (Postfix) with ESMTP; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by thoth.se.axis.com (Postfix) with ESMTP id A82CB2AB5; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id A4495401A5; Thu, 8 Mar 2018 14:33:38 +0100 (CET) From: Niklas Cassel To: kishon@ti.com, Lorenzo Pieralisi , Bjorn Helgaas , Sekhar Nori , John Keeping , Shawn Lin , Niklas Cassel , Cyrille Pitchen Cc: Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 1/5] PCI: endpoint: BAR width should not depend on sizeof dma_addr_t Date: Thu, 8 Mar 2018 14:33:26 +0100 Message-Id: <20180308133331.19464-2-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180308133331.19464-1-niklas.cassel@axis.com> References: <20180308133331.19464-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If a BAR supports 64-bit width or not depends on the hardware, and should thus not depend on sizeof(dma_addr_t). Since this driver is generic, default to always using BAR width of 32-bits. 64-bit BARs can easily be tested by replacing PCI_BASE_ADDRESS_MEM_TYPE_32 with PCI_BASE_ADDRESS_MEM_TYPE_64 in bar_flags. Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I --- Note to Lorenzo/Bjorn: It is not trivial to convert the bar_size + bar_flags + struct pci_epf->bar member array to an array of struct resources, since we need to be able to store the addresses returned by dma_alloc_coherent(), which is of type dma_addr_t. struct resource uses resource_size_t, which is defined as phys_addr_t. E.g. ARTPEC-7 uses 64-bit dma_addr_t, but only 32-bit phys_addr_t. drivers/pci/endpoint/functions/pci-epf-test.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 800da09d9005..7c70433b11a7 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -71,6 +71,14 @@ struct pci_epf_test_data { }; static int bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 }; +static int bar_flags[] = { + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32, + PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32 +}; static int pci_epf_test_copy(struct pci_epf_test *epf_test) { @@ -358,7 +366,6 @@ static void pci_epf_test_unbind(struct pci_epf *epf) static int pci_epf_test_set_bar(struct pci_epf *epf) { - int flags; int bar; int ret; struct pci_epf_bar *epf_bar; @@ -367,15 +374,11 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) struct pci_epf_test *epf_test = epf_get_drvdata(epf); enum pci_barno test_reg_bar = epf_test->test_reg_bar; - flags = PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32; - if (sizeof(dma_addr_t) == 0x8) - flags |= PCI_BASE_ADDRESS_MEM_TYPE_64; - for (bar = BAR_0; bar <= BAR_5; bar++) { epf_bar = &epf->bar[bar]; ret = pci_epc_set_bar(epc, epf->func_no, bar, epf_bar->phys_addr, - epf_bar->size, flags); + epf_bar->size, bar_flags[bar]); if (ret) { pci_epf_free_space(epf, epf_test->reg[bar], bar); dev_err(dev, "failed to set BAR%d\n", bar); From patchwork Thu Mar 8 13:33:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 883152 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=axis.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zxs2h0fYPz9sgY for ; Fri, 9 Mar 2018 00:35:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755107AbeCHNfW (ORCPT ); Thu, 8 Mar 2018 08:35:22 -0500 Received: from bastet.se.axis.com ([195.60.68.11]:60583 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755897AbeCHNdm (ORCPT ); Thu, 8 Mar 2018 08:33:42 -0500 Received: from localhost (localhost [127.0.0.1]) by bastet.se.axis.com (Postfix) with ESMTP id 4E08818768; Thu, 8 Mar 2018 14:33:41 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at bastet.se.axis.com Received: from bastet.se.axis.com ([IPv6:::ffff:127.0.0.1]) by localhost (bastet.se.axis.com [::ffff:127.0.0.1]) (amavisd-new, port 10024) with LMTP id MZ6so-xg3Z8K; Thu, 8 Mar 2018 14:33:39 +0100 (CET) Received: from boulder02.se.axis.com (boulder02.se.axis.com [10.0.8.16]) by bastet.se.axis.com (Postfix) with ESMTPS id 4C6F41876B; Thu, 8 Mar 2018 14:33:39 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F29311A06B; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E62A01A066; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: from thoth.se.axis.com (unknown [10.0.2.173]) by boulder02.se.axis.com (Postfix) with ESMTP; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by thoth.se.axis.com (Postfix) with ESMTP id DA05A2AB5; Thu, 8 Mar 2018 14:33:38 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id D54A9401A5; Thu, 8 Mar 2018 14:33:38 +0100 (CET) From: Niklas Cassel To: kishon@ti.com, Jingoo Han , Joao Pinto , Lorenzo Pieralisi , Bjorn Helgaas Cc: Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/5] PCI: designware-ep: Make dw_pcie_ep_set_bar() handle 64-bit BARs properly Date: Thu, 8 Mar 2018 14:33:27 +0100 Message-Id: <20180308133331.19464-3-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180308133331.19464-1-niklas.cassel@axis.com> References: <20180308133331.19464-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Since a 64-bit BAR consists of a BAR pair, we need to write to both BARs in the BAR pair to setup the BAR properly. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-designware-ep.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c index 9236b998327f..946bbdf53c4d 100644 --- a/drivers/pci/dwc/pcie-designware-ep.c +++ b/drivers/pci/dwc/pcie-designware-ep.c @@ -136,8 +136,15 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, return ret; dw_pcie_dbi_ro_wr_en(pci); - dw_pcie_writel_dbi2(pci, reg, size - 1); - dw_pcie_writel_dbi(pci, reg, flags); + if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) { + dw_pcie_writel_dbi2(pci, reg, lower_32_bits(size - 1)); + dw_pcie_writel_dbi(pci, reg, flags); + dw_pcie_writel_dbi2(pci, reg + 4, upper_32_bits(size - 1)); + dw_pcie_writel_dbi(pci, reg + 4, 0); + } else { + dw_pcie_writel_dbi2(pci, reg, size - 1); + dw_pcie_writel_dbi(pci, reg, flags); + } dw_pcie_dbi_ro_wr_dis(pci); return 0; From patchwork Thu Mar 8 13:33:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 883150 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=axis.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zxs2c4QgTz9sfj for ; Fri, 9 Mar 2018 00:35:20 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754990AbeCHNd4 (ORCPT ); Thu, 8 Mar 2018 08:33:56 -0500 Received: from bastet.se.axis.com ([195.60.68.11]:60617 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755824AbeCHNdz (ORCPT ); Thu, 8 Mar 2018 08:33:55 -0500 Received: from localhost (localhost [127.0.0.1]) by bastet.se.axis.com (Postfix) with ESMTP id 0B5A01876B; Thu, 8 Mar 2018 14:33:54 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at bastet.se.axis.com Received: from bastet.se.axis.com ([IPv6:::ffff:127.0.0.1]) by localhost (bastet.se.axis.com [::ffff:127.0.0.1]) (amavisd-new, port 10024) with LMTP id P7sPBS8Bvrnj; Thu, 8 Mar 2018 14:33:53 +0100 (CET) Received: from boulder03.se.axis.com (boulder03.se.axis.com [10.0.8.17]) by bastet.se.axis.com (Postfix) with ESMTPS id 85BD018768; Thu, 8 Mar 2018 14:33:53 +0100 (CET) Received: from boulder03.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 72DCE1E088; Thu, 8 Mar 2018 14:33:53 +0100 (CET) Received: from boulder03.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 66E5A1E087; Thu, 8 Mar 2018 14:33:53 +0100 (CET) Received: from seth.se.axis.com (unknown [10.0.2.172]) by boulder03.se.axis.com (Postfix) with ESMTP; Thu, 8 Mar 2018 14:33:53 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by seth.se.axis.com (Postfix) with ESMTP id 59D1C2A71; Thu, 8 Mar 2018 14:33:53 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id 549AB401A5; Thu, 8 Mar 2018 14:33:53 +0100 (CET) From: Niklas Cassel To: kishon@ti.com, Jingoo Han , Joao Pinto , Lorenzo Pieralisi , Bjorn Helgaas Cc: Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/5] PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly Date: Thu, 8 Mar 2018 14:33:28 +0100 Message-Id: <20180308133331.19464-4-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180308133331.19464-1-niklas.cassel@axis.com> References: <20180308133331.19464-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Since a 64-bit BAR consists of a BAR pair, we need to write to both BARs in the BAR pair to clear the BAR properly. Signed-off-by: Niklas Cassel --- drivers/pci/dwc/pcie-designware-ep.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c index 946bbdf53c4d..b20b2651caf9 100644 --- a/drivers/pci/dwc/pcie-designware-ep.c +++ b/drivers/pci/dwc/pcie-designware-ep.c @@ -22,11 +22,18 @@ void dw_pcie_ep_linkup(struct dw_pcie_ep *ep) void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar) { u32 reg; + u32 val; reg = PCI_BASE_ADDRESS_0 + (4 * bar); + val = dw_pcie_readl_dbi(pci, reg); dw_pcie_dbi_ro_wr_en(pci); dw_pcie_writel_dbi2(pci, reg, 0x0); dw_pcie_writel_dbi(pci, reg, 0x0); + if (!(val & PCI_BASE_ADDRESS_SPACE_IO) && + (val & PCI_BASE_ADDRESS_MEM_TYPE_64)) { + dw_pcie_writel_dbi2(pci, reg + 4, 0x0); + dw_pcie_writel_dbi(pci, reg + 4, 0x0); + } dw_pcie_dbi_ro_wr_dis(pci); } From patchwork Thu Mar 8 13:33:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 883148 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=axis.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zxs1Y2Z8Yz9sfm for ; Fri, 9 Mar 2018 00:34:25 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934320AbeCHNeD (ORCPT ); Thu, 8 Mar 2018 08:34:03 -0500 Received: from bastet.se.axis.com ([195.60.68.11]:60671 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755824AbeCHNeA (ORCPT ); Thu, 8 Mar 2018 08:34:00 -0500 Received: from localhost (localhost [127.0.0.1]) by bastet.se.axis.com (Postfix) with ESMTP id DB63218153; Thu, 8 Mar 2018 14:33:58 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at bastet.se.axis.com Received: from bastet.se.axis.com ([IPv6:::ffff:127.0.0.1]) by localhost (bastet.se.axis.com [::ffff:127.0.0.1]) (amavisd-new, port 10024) with LMTP id 5gTWy8qTexAu; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from boulder03.se.axis.com (boulder03.se.axis.com [10.0.8.17]) by bastet.se.axis.com (Postfix) with ESMTPS id 1E23C18766; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from boulder03.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 098BF1E088; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from boulder03.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F11561E087; Thu, 8 Mar 2018 14:33:56 +0100 (CET) Received: from seth.se.axis.com (unknown [10.0.2.172]) by boulder03.se.axis.com (Postfix) with ESMTP; Thu, 8 Mar 2018 14:33:56 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by seth.se.axis.com (Postfix) with ESMTP id E35D12A8D; Thu, 8 Mar 2018 14:33:56 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id DF2A7401A5; Thu, 8 Mar 2018 14:33:56 +0100 (CET) From: Niklas Cassel To: kishon@ti.com, Alan Douglas , Bjorn Helgaas , Jingoo Han , Joao Pinto , Lorenzo Pieralisi , Sekhar Nori , Shawn Lin , Niklas Cassel , Cyrille Pitchen Cc: Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 4/5] PCI: endpoint: Make pci_epc_set_bar() return the BAR width that was set-up Date: Thu, 8 Mar 2018 14:33:29 +0100 Message-Id: <20180308133331.19464-5-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180308133331.19464-1-niklas.cassel@axis.com> References: <20180308133331.19464-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org In order to properly handle 64-bit BARs, we need to know what BAR width that was actually set-up by specific pci_epc_set_bar() implementations. This is done so that we can know if we need to skip a BAR, since a 64-bit BAR consists of a BAR pair. It is important to know the BAR width that was actually set-up, since some drivers, like the Cadence EP controller, does not simply look at PCI_BASE_ADDRESS_MEM_TYPE_64, as it configures all BARs larger than 2G as 64-bit. Signed-off-by: Niklas Cassel --- drivers/pci/cadence/pcie-cadence-ep.c | 2 +- drivers/pci/dwc/pcie-designware-ep.c | 4 ++-- drivers/pci/endpoint/functions/pci-epf-test.c | 7 ++++++- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/cadence/pcie-cadence-ep.c b/drivers/pci/cadence/pcie-cadence-ep.c index 3c3a97743453..0e4cc4cca56d 100644 --- a/drivers/pci/cadence/pcie-cadence-ep.c +++ b/drivers/pci/cadence/pcie-cadence-ep.c @@ -135,7 +135,7 @@ static int cdns_pcie_ep_set_bar(struct pci_epc *epc, u8 fn, enum pci_barno bar, CDNS_PCIE_LM_EP_FUNC_BAR_CFG_BAR_CTRL(b, ctrl)); cdns_pcie_writel(pcie, reg, cfg); - return 0; + return is_64bits ? 1 : 0; } static void cdns_pcie_ep_clear_bar(struct pci_epc *epc, u8 fn, diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c index b20b2651caf9..f3c19f8ff8e5 100644 --- a/drivers/pci/dwc/pcie-designware-ep.c +++ b/drivers/pci/dwc/pcie-designware-ep.c @@ -139,7 +139,7 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, as_type = DW_PCIE_AS_IO; ret = dw_pcie_ep_inbound_atu(ep, bar, bar_phys, as_type); - if (ret) + if (ret < 0) return ret; dw_pcie_dbi_ro_wr_en(pci); @@ -154,7 +154,7 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, } dw_pcie_dbi_ro_wr_dis(pci); - return 0; + return (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 1 : 0; } static int dw_pcie_find_index(struct dw_pcie_ep *ep, phys_addr_t addr, diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 7c70433b11a7..09878e011284 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -379,12 +379,17 @@ static int pci_epf_test_set_bar(struct pci_epf *epf) ret = pci_epc_set_bar(epc, epf->func_no, bar, epf_bar->phys_addr, epf_bar->size, bar_flags[bar]); - if (ret) { + if (ret < 0) { pci_epf_free_space(epf, epf_test->reg[bar], bar); dev_err(dev, "failed to set BAR%d\n", bar); if (bar == test_reg_bar) return ret; } + /* + * pci_epc_set_bar() returns 1 if a 64-bit BAR was set-up, + * or 0 if a 32-bit BAR was set-up. + */ + bar += ret; } return 0; From patchwork Thu Mar 8 13:33:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 883149 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=axis.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zxs1h0yWGz9sfm for ; Fri, 9 Mar 2018 00:34:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755602AbeCHNeC (ORCPT ); Thu, 8 Mar 2018 08:34:02 -0500 Received: from bastet.se.axis.com ([195.60.68.11]:60678 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755935AbeCHNeB (ORCPT ); Thu, 8 Mar 2018 08:34:01 -0500 Received: from localhost (localhost [127.0.0.1]) by bastet.se.axis.com (Postfix) with ESMTP id 658B118766; Thu, 8 Mar 2018 14:33:59 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at bastet.se.axis.com Received: from bastet.se.axis.com ([IPv6:::ffff:127.0.0.1]) by localhost (bastet.se.axis.com [::ffff:127.0.0.1]) (amavisd-new, port 10024) with LMTP id R1Wemp6pGgTq; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from boulder02.se.axis.com (boulder02.se.axis.com [10.0.8.16]) by bastet.se.axis.com (Postfix) with ESMTPS id 4F27D1876B; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3D9651A082; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 32A611A066; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from seth.se.axis.com (unknown [10.0.2.172]) by boulder02.se.axis.com (Postfix) with ESMTP; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by seth.se.axis.com (Postfix) with ESMTP id 267322A71; Thu, 8 Mar 2018 14:33:57 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id 217FB401A5; Thu, 8 Mar 2018 14:33:57 +0100 (CET) From: Niklas Cassel To: kishon@ti.com, Lorenzo Pieralisi , Arnd Bergmann , Greg Kroah-Hartman Cc: Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 5/5] misc: pci_endpoint_test: Handle 64-bit BARs properly Date: Thu, 8 Mar 2018 14:33:30 +0100 Message-Id: <20180308133331.19464-6-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180308133331.19464-1-niklas.cassel@axis.com> References: <20180308133331.19464-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org A 64-bit BAR consists of a BAR pair, where the second BAR has the upper bits, so we cannot simply call pci_ioremap_bar() on every single BAR index. The second BAR in a BAR pair will not have the IORESOURCE_MEM resource flag set. Only call ioremap on BARs that have the IORESOURCE_MEM resource flag set. pci 0000:01:00.0: BAR 4: assigned [mem 0xc0300000-0xc031ffff 64bit] pci 0000:01:00.0: BAR 2: assigned [mem 0xc0320000-0xc03203ff 64bit] pci 0000:01:00.0: BAR 0: assigned [mem 0xc0320400-0xc03204ff 64bit] pci-endpoint-test 0000:01:00.0: can't ioremap BAR 1: [??? 0x00000000 flags 0x0] pci-endpoint-test 0000:01:00.0: failed to read BAR1 pci-endpoint-test 0000:01:00.0: can't ioremap BAR 3: [??? 0x00000000 flags 0x0] pci-endpoint-test 0000:01:00.0: failed to read BAR3 pci-endpoint-test 0000:01:00.0: can't ioremap BAR 5: [??? 0x00000000 flags 0x0] pci-endpoint-test 0000:01:00.0: failed to read BAR5 Signed-off-by: Niklas Cassel Acked-by: Kishon Vijay Abraham I --- drivers/misc/pci_endpoint_test.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index 320276f42653..fe8897e64635 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -534,12 +534,14 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev, } for (bar = BAR_0; bar <= BAR_5; bar++) { - base = pci_ioremap_bar(pdev, bar); - if (!base) { - dev_err(dev, "failed to read BAR%d\n", bar); - WARN_ON(bar == test_reg_bar); + if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) { + base = pci_ioremap_bar(pdev, bar); + if (!base) { + dev_err(dev, "failed to read BAR%d\n", bar); + WARN_ON(bar == test_reg_bar); + } + test->bar[bar] = base; } - test->bar[bar] = base; } test->base = test->bar[test_reg_bar];