From patchwork Mon Oct 10 05:33:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 1687915 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=LnLtBwFn; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Mm6zq3bG4z23jr for ; Mon, 10 Oct 2022 16:34:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231167AbiJJFeY (ORCPT ); Mon, 10 Oct 2022 01:34:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231173AbiJJFeT (ORCPT ); Mon, 10 Oct 2022 01:34:19 -0400 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A813250183; Sun, 9 Oct 2022 22:34:18 -0700 (PDT) Received: by mail-pf1-x432.google.com with SMTP id y1so2730388pfr.3; Sun, 09 Oct 2022 22:34:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=dLRkucuIoxKRmUZI1QpIC5BAZr/CZYrUSORj06J1xo0=; b=LnLtBwFn1AfUR5CjQaPpakzN9gmMyktwgCC/JGR4VEy5KreudPA6qNKlkHAU6/muvI GEzbnnRN7w5APO7XihJ3iGGO4/00J5tQpLHNxWZUcivaZyoTV4xdcwcBGeGUPXw/GS6u 0eShi7j769WZlvCdWftf1KebaGLBUb/F19G+WVmmWWtCpeycLmoPp4TdJF0t4DgzcKCS xHMNkz6Cod/R80Hy9HeEdGmYLbo1HLzlrTcBW0GG25Niy4+G1povi0iFOeCAlwoO9g+I ZCXjRRgVns5FnCVwrnbc2vJiD2IbrhuyBascSe9rmUNJecX+xQAvLz4iVs7EO/Wbi7uN OUHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=dLRkucuIoxKRmUZI1QpIC5BAZr/CZYrUSORj06J1xo0=; b=DvMT/Q8XYgE89vxP8JRrp5TdDWaP1b1MioVqOn1RdnePF/tp8YDqISNeL9u3EEElH0 xTUPCKayNA8ZXjDmq+epWRLKzihywgAQwPcTINmJqJdtD0W3gszhQEdgHw998TZdpKx4 LfV28hiyyb28S+dTOu6yAcUcsu7Q+71hnr7MPrcAuasxenSxlqtsbTD2xF0ckGzOvhWj PETLSO99bxv45PFs1gRIudXt3SKXzk9trzX1oFkiHPAoYj7qNAwlfYaQZXjmQoYp5VZ2 25Pdt0FyfYPvyaw/f4F7v4H3BShk1CUIukZF86c70zx+FsYwSJ/X+3+/m0bTtvSywUJt zzcQ== X-Gm-Message-State: ACrzQf049WV/ZyiRnuXuiySrfO3hjqx2CvneZKVMymGx08tgx29NjAvM Fg/L2rYB3UAq26puns72lug= X-Google-Smtp-Source: AMsMyM6mAodFann9MhekFexSYQraTr6IZLEgCm3bYAMoAEqIGCPHBSPlJQnsfKqrmbCMzt3SJQbkhA== X-Received: by 2002:a63:6cca:0:b0:43c:7998:8a78 with SMTP id h193-20020a636cca000000b0043c79988a78mr15075072pgc.600.1665380058146; Sun, 09 Oct 2022 22:34:18 -0700 (PDT) Received: from xm06403pcu.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id 126-20020a620584000000b00562519cad97sm5891920pff.19.2022.10.09.22.34.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Oct 2022 22:34:17 -0700 (PDT) From: Chunyan Zhang To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Baolin Wang , Orson Zhai , Chunyan Zhang , Chunyan Zhang , Cixi Geng , LKML Subject: [PATCH V3 1/3] dt-bindings: gpio: Convert Unisoc GPIO controller binding to yaml Date: Mon, 10 Oct 2022 13:33:36 +0800 Message-Id: <20221010053338.22580-2-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221010053338.22580-1-zhang.lyra@gmail.com> References: <20221010053338.22580-1-zhang.lyra@gmail.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chunyan Zhang Convert the Unisoc gpio controller binding to DT schema format. Signed-off-by: Chunyan Zhang Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/gpio/gpio-sprd.txt | 28 -------- .../devicetree/bindings/gpio/sprd,gpio.yaml | 70 +++++++++++++++++++ 2 files changed, 70 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-sprd.txt create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/gpio-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-sprd.txt deleted file mode 100644 index eca97d45388f..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-sprd.txt +++ /dev/null @@ -1,28 +0,0 @@ -Spreadtrum GPIO controller bindings - -The controller's registers are organized as sets of sixteen 16-bit -registers with each set controlling a bank of up to 16 pins. A single -interrupt is shared for all of the banks handled by the controller. - -Required properties: -- compatible: Should be "sprd,sc9860-gpio". -- reg: Define the base and range of the I/O address space containing -the GPIO controller registers. -- gpio-controller: Marks the device node as a GPIO controller. -- #gpio-cells: Should be <2>. The first cell is the gpio number and -the second cell is used to specify optional parameters. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells: Should be <2>. Specifies the number of cells needed -to encode interrupt source. -- interrupts: Should be the port interrupt shared by all the gpios. - -Example: - ap_gpio: gpio@40280000 { - compatible = "sprd,sc9860-gpio"; - reg = <0 0x40280000 0 0x1000>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = ; - }; diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml new file mode 100644 index 000000000000..40924123d184 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2022 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc GPIO controller + +maintainers: + - Orson Zhai + - Baolin Wang + - Chunyan Zhang + +description: | + The controller's registers are organized as sets of sixteen 16-bit + registers with each set controlling a bank of up to 16 pins. A single + interrupt is shared for all of the banks handled by the controller. + +properties: + compatible: + const: sprd,sc9860-gpio + + reg: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + description: The interrupt shared by all GPIO lines for this controller. + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + ap_gpio: gpio@40280000 { + compatible = "sprd,sc9860-gpio"; + reg = <0 0x40280000 0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + }; +... From patchwork Mon Oct 10 05:33:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 1687919 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=BcmTe9ZO; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Mm6zs35Y9z23jn for ; Mon, 10 Oct 2022 16:34:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230230AbiJJFe1 (ORCPT ); Mon, 10 Oct 2022 01:34:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231211AbiJJFe0 (ORCPT ); Mon, 10 Oct 2022 01:34:26 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11C134F6B7; Sun, 9 Oct 2022 22:34:24 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id d24so9453939pls.4; Sun, 09 Oct 2022 22:34:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=0D8oUaZmT4I0yy6RsHfeXtojWjxAHAVwrgD0XhAhavM=; b=BcmTe9ZOMJS02cLjncHBrX3ixmotFUfq0Iqp29boUI1dNmRoCcN1HCDJnQ4jOBTCT3 TwBMh4Z/I5C44/qD3gIuDgEi6BjvMDLqDSCZZUW/Z/JLSxP03cauir1RtliHtdxhPMui SRaJj3hCy4HcO+2pO80b2+H87hlN7yrdSOG07p+vRzS1xfptIir51BT/mftzid9mfhUV daeozj0FcxiGoVdmJJxIkEnYXCmdv2IMDqHLGi0rEWLbVUE+Jf/T4vMNWqZsdI9/A4Gk ZAdQ7oTYiGYeLlh+Edw4nV3RsU5ybRtpq+OoEcHrIh1qTwhcSGJsThWfdiFTS/L3MiDT EYXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=0D8oUaZmT4I0yy6RsHfeXtojWjxAHAVwrgD0XhAhavM=; b=Xl369Hs/GCPoi22gsY9CG6StHjd8hxKW9LcNHe6j9RVIbgmHnX7ryO69opXwEnewSB tE4lj6LT3zPJtau3AR17cGVZMKOaNiWDfScZSjTsmGqovDSz7UhLVIKl3hnh+Uvwusyc xITlZSkoOeYeDp03PSEqmpxeReZyCR8JUXpqbGA3XhAcA9sz/eUXzET3v5xdC4kzPbxa f/l7cU4n0xFKMxJXWm4IDjXeT1Ld+HDagcHZd/wYZmsj6VePMzQAF95JpxbvMBEAoBT/ qlf7O+FrvA6IBn6Meu5hRtIMqw6srSrQ1AAHZRFV5+4BOCnYQgmfIVYEz9dfUHBoJc3y 90EA== X-Gm-Message-State: ACrzQf3FFjya/NqHQIKkHNnalrYoaAVUG6CaVYBkE5gxlfvaid7GiLwr M260bRC+DO7EUqT0KougdRQ= X-Google-Smtp-Source: AMsMyM7SvEs1BG6kD8J8xpLVGDgI5heyoyS3dMDqLyVDwngQ66wESe0nZnRFH0LKPXSvWLRpiYO/NA== X-Received: by 2002:a17:902:d2cc:b0:182:d901:5d28 with SMTP id n12-20020a170902d2cc00b00182d9015d28mr1399214plc.142.1665380063136; Sun, 09 Oct 2022 22:34:23 -0700 (PDT) Received: from xm06403pcu.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id 126-20020a620584000000b00562519cad97sm5891920pff.19.2022.10.09.22.34.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Oct 2022 22:34:22 -0700 (PDT) From: Chunyan Zhang To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Baolin Wang , Orson Zhai , Chunyan Zhang , Chunyan Zhang , Cixi Geng , LKML Subject: [PATCH V3 2/3] dt-bindings: gpio: Convert Unisoc EIC controller binding to yaml Date: Mon, 10 Oct 2022 13:33:37 +0800 Message-Id: <20221010053338.22580-3-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221010053338.22580-1-zhang.lyra@gmail.com> References: <20221010053338.22580-1-zhang.lyra@gmail.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chunyan Zhang Convert the Unisoc EIC controller binding to DT schema format. Update the maxItems of 'reg' property, since the current gpio-eic-sprd driver supports 3 reg items. Also removed a few similar examples. Signed-off-by: Chunyan Zhang Reviewed-by: Rob Herring --- .../bindings/gpio/gpio-eic-sprd.txt | 97 ----------------- .../bindings/gpio/sprd,gpio-eic.yaml | 103 ++++++++++++++++++ 2 files changed, 103 insertions(+), 97 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt deleted file mode 100644 index 54040a2bfe3a..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt +++ /dev/null @@ -1,97 +0,0 @@ -Spreadtrum EIC controller bindings - -The EIC is the abbreviation of external interrupt controller, which can -be used only in input mode. The Spreadtrum platform has 2 EIC controllers, -one is in digital chip, and another one is in PMIC. The digital chip EIC -controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and -EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- -module. - -The EIC-debounce sub-module provides up to 8 source input signal -connections. A debounce mechanism is used to capture the input signals' -stable status (millisecond resolution) and a single-trigger mechanism -is introduced into this sub-module to enhance the input event detection -reliability. In addition, this sub-module's clock can be shut off -automatically to reduce power dissipation. Moreover the debounce range -is from 1ms to 4s with a step size of 1ms. The input signal will be -ignored if it is asserted for less than 1 ms. - -The EIC-latch sub-module is used to latch some special power down signals -and generate interrupts, since the EIC-latch does not depend on the APB -clock to capture signals. - -The EIC-async sub-module uses a 32kHz clock to capture the short signals -(microsecond resolution) to generate interrupts by level or edge trigger. - -The EIC-sync is similar with GPIO's input function, which is a synchronized -signal input register. It can generate interrupts by level or edge trigger -when detecting input signals. - -Required properties: -- compatible: Should be one of the following: - "sprd,sc9860-eic-debounce", - "sprd,sc9860-eic-latch", - "sprd,sc9860-eic-async", - "sprd,sc9860-eic-sync", - "sprd,sc2731-eic". -- reg: Define the base and range of the I/O address space containing - the GPIO controller registers. -- gpio-controller: Marks the device node as a GPIO controller. -- #gpio-cells: Should be <2>. The first cell is the gpio number and - the second cell is used to specify optional parameters. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells: Should be <2>. Specifies the number of cells needed - to encode interrupt source. -- interrupts: Should be the port interrupt shared by all the gpios. - -Example: - eic_debounce: gpio@40210000 { - compatible = "sprd,sc9860-eic-debounce"; - reg = <0 0x40210000 0 0x80>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = ; - }; - - eic_latch: gpio@40210080 { - compatible = "sprd,sc9860-eic-latch"; - reg = <0 0x40210080 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = ; - }; - - eic_async: gpio@402100a0 { - compatible = "sprd,sc9860-eic-async"; - reg = <0 0x402100a0 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = ; - }; - - eic_sync: gpio@402100c0 { - compatible = "sprd,sc9860-eic-sync"; - reg = <0 0x402100c0 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = ; - }; - - pmic_eic: gpio@300 { - compatible = "sprd,sc2731-eic"; - reg = <0x300>; - interrupt-parent = <&sc2731_pmic>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml new file mode 100644 index 000000000000..a21350bd0f2c --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2022 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc EIC controller + +maintainers: + - Orson Zhai + - Baolin Wang + - Chunyan Zhang + +description: | + The EIC is the abbreviation of external interrupt controller, which can + be used only in input mode. The Spreadtrum platform has 2 EIC controllers, + one is in digital chip, and another one is in PMIC. The digital chip EIC + controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and + EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- + module. + + The EIC-debounce sub-module provides up to 8 source input signal + connections. A debounce mechanism is used to capture the input signals' + stable status (millisecond resolution) and a single-trigger mechanism + is introduced into this sub-module to enhance the input event detection + reliability. In addition, this sub-module's clock can be shut off + automatically to reduce power dissipation. Moreover the debounce range + is from 1ms to 4s with a step size of 1ms. The input signal will be + ignored if it is asserted for less than 1 ms. + + The EIC-latch sub-module is used to latch some special power down signals + and generate interrupts, since the EIC-latch does not depend on the APB + clock to capture signals. + + The EIC-async sub-module uses a 32kHz clock to capture the short signals + (microsecond resolution) to generate interrupts by level or edge trigger. + + The EIC-sync is similar with GPIO's input function, which is a synchronized + signal input register. It can generate interrupts by level or edge trigger + when detecting input signals. + +properties: + compatible: + enum: + - sprd,sc9860-eic-debounce + - sprd,sc9860-eic-latch + - sprd,sc9860-eic-async + - sprd,sc9860-eic-sync + - sprd,sc2731-eic + + reg: + minItems: 1 + maxItems: 3 + description: + EIC controller can support maximum 3 banks which has its own + address base. + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + description: + The interrupt shared by all GPIO lines for this controller. + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + eic_debounce: gpio@40210000 { + compatible = "sprd,sc9860-eic-debounce"; + reg = <0 0x40210000 0 0x80>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + }; +... From patchwork Mon Oct 10 05:33:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 1687921 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=RmjJoHRY; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Mm7085vX9z23jn for ; Mon, 10 Oct 2022 16:34:48 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231235AbiJJFeq (ORCPT ); Mon, 10 Oct 2022 01:34:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46412 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231270AbiJJFec (ORCPT ); Mon, 10 Oct 2022 01:34:32 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1D4A50FAA; Sun, 9 Oct 2022 22:34:29 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id f140so9901839pfa.1; Sun, 09 Oct 2022 22:34:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from:from:to :cc:subject:date:message-id:reply-to; bh=VhtwD/Hk+4MmxWjIA7ioMhD4KoMl+0rYDVzSC0gMCyo=; b=RmjJoHRY0sT+7aPKDElNCqDaPnPxEpgrpU3JZTWY6f+f9D+LGqjUCR+yjOjO0YrabX uT+OKOJNlI2FLR4cTDTehEv4wvjbEcbjFtrSOa/E1bRnMTzbOCicaUi0SPwH8cWHwLmU ufr7YTl+OhrncTg6TD84HiRwOwVea8Ag0GYLdPJC1LdaLSLb4Y5D2EdXq/M2ZTVR638N 4waPlF1JNiWjECmL4z60RHzc7rTBkozr5QHmg9YM6yvGkl4z3lgP4THcn+dFiqQQR5ix DpOZcrj+MGlzMrEwZJJDS2ADseD8hkPZLwfEVEvIZYvaflRkj2ILvWmsPkL+zx3GLreV Bd6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=VhtwD/Hk+4MmxWjIA7ioMhD4KoMl+0rYDVzSC0gMCyo=; b=s0HmdXlAsKZQFBpj5PaPJl+1MLeaeQkGD+bTBKkRD0jDlDO7vhZmAi3qXDkcefGj1N KOTUhv6QmsFcGFV7UDWlx76uv6NsElv6zL52oXLUuExfnwzWeZuhJlNr3eNUOHUqLCyE t5avUpFu+PhEml+E7qmoB0IV99iXkc/Nerg87LHIRrgfpXCNRAkRD94hoeOyu5YqqbP/ sEso6TLCJagGMv+oO5bfodzL8Hsv43+TW87d3pO4BDBl6qaHt0cylu5NWUxC2H5Mx7RV Ste6mAMLzwFfisJVvFGMAGKQ3YgCIWp3ghbE9RvVG5mP0zywa90ELf6kEp3K/GW+hJ2T /dtw== X-Gm-Message-State: ACrzQf20WQ61nJ41vJkVQRW7rEoewH7a/m4KGXr96VYxi3XB35eHC2AD hPeBuZzvlqLwtSak/NIHjCYbip/6dFw= X-Google-Smtp-Source: AMsMyM70wYHt4G5bUNXTnIFDsYYiQX6qWlQoyTI0no4LU55Mcvt1m1GjIYkVxKzPRznXafnSOWSKnw== X-Received: by 2002:aa7:9af5:0:b0:562:a65f:ec81 with SMTP id y21-20020aa79af5000000b00562a65fec81mr18327527pfp.16.1665380068287; Sun, 09 Oct 2022 22:34:28 -0700 (PDT) Received: from xm06403pcu.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id 126-20020a620584000000b00562519cad97sm5891920pff.19.2022.10.09.22.34.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Oct 2022 22:34:27 -0700 (PDT) From: Chunyan Zhang To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Baolin Wang , Orson Zhai , Chunyan Zhang , Chunyan Zhang , Cixi Geng , LKML Subject: [PATCH V3 3/3] dt-bindings: gpio: Add compatible string for Unisoc UMS512 Date: Mon, 10 Oct 2022 13:33:38 +0800 Message-Id: <20221010053338.22580-4-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221010053338.22580-1-zhang.lyra@gmail.com> References: <20221010053338.22580-1-zhang.lyra@gmail.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chunyan Zhang UMS512 use the same GPIO and EIC controller with SC9860. Signed-off-by: Chunyan Zhang Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij --- .../bindings/gpio/sprd,gpio-eic.yaml | 33 +++++++++++++++---- .../devicetree/bindings/gpio/sprd,gpio.yaml | 7 +++- 2 files changed, 33 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml index a21350bd0f2c..99fcf970773a 100644 --- a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml @@ -42,12 +42,33 @@ description: | properties: compatible: - enum: - - sprd,sc9860-eic-debounce - - sprd,sc9860-eic-latch - - sprd,sc9860-eic-async - - sprd,sc9860-eic-sync - - sprd,sc2731-eic + oneOf: + - enum: + - sprd,sc9860-eic-debounce + - sprd,sc9860-eic-latch + - sprd,sc9860-eic-async + - sprd,sc9860-eic-sync + - sprd,sc2731-eic + - items: + - enum: + - sprd,ums512-eic-debounce + - const: sprd,sc9860-eic-debounce + - items: + - enum: + - sprd,ums512-eic-latch + - const: sprd,sc9860-eic-latch + - items: + - enum: + - sprd,ums512-eic-async + - const: sprd,sc9860-eic-async + - items: + - enum: + - sprd,ums512-eic-sync + - const: sprd,sc9860-eic-sync + - items: + - enum: + - sprd,sc2730-eic + - const: sprd,sc2731-eic reg: minItems: 1 diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml index 40924123d184..483168838128 100644 --- a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml @@ -19,7 +19,12 @@ description: | properties: compatible: - const: sprd,sc9860-gpio + oneOf: + - const: sprd,sc9860-gpio + - items: + - enum: + - sprd,ums512-gpio + - const: sprd,sc9860-gpio reg: maxItems: 1