From patchwork Fri Sep 15 05:40:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 814061 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xtkm86RDMz9sPr for ; Fri, 15 Sep 2017 15:41:28 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MJRCz6j3"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xtkm85Bj7zDrXs for ; Fri, 15 Sep 2017 15:41:28 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MJRCz6j3"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c00::244; helo=mail-pf0-x244.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MJRCz6j3"; dkim-atps=neutral Received: from mail-pf0-x244.google.com (mail-pf0-x244.google.com [IPv6:2607:f8b0:400e:c00::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xtkly6nlmzDrXS for ; Fri, 15 Sep 2017 15:41:18 +1000 (AEST) Received: by mail-pf0-x244.google.com with SMTP id h4so770485pfk.0 for ; Thu, 14 Sep 2017 22:41:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=SEY7dHK+fazKtb+DOfi3Es8NrcESwBJs0ah4F6i7K1A=; b=MJRCz6j3SFuS8nVLSkgTPBHYNS7dFOT2Fiih0fgYRpsFap2z84XFv93Mb1gGIcd1vb r2uOaLdJuOU7B5cNGstpjDTdP8i5JsXU+84OZ74cVUQMONqQeqJR97+yl+r/pPVilXYc FKc1FVm5pfnrGZG3Qg2HPGhoOWccGszPXPXLKMFPSUvTLCisvVtzPxRacwM5qW9UvbxI Mk3M01O5vMifmNGS1pqVUuX8LtDOegSJyXP6X5oYK3IyCfrlh2KThp+Uxq4+himrZtvb NLw4Ov3oTrFnMdFnCV9wF/X1oLDSQpDh/QxlSCAzPs/ddFdOlQvjt7LsV7gPNqqRLMEy 87pQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=SEY7dHK+fazKtb+DOfi3Es8NrcESwBJs0ah4F6i7K1A=; b=ZfxzVnELE6vuR99KaTBdfnKo235SrRdyzlo97VOmr/rpMndV4Mx2ITJ4vu2WOgQWJq 2gKV8SQikLXL4ERMPYiyuEVRKLSasomY4Iuxtrjlkos2bOYT1jyoWKKztMWNyZe1nJ64 LMae+FwEnlOCXqTMSYaKV8Z1E/IVTyloZLLFAVf/O+xQZVGeh3jF6ps2bYOhXOhbfBTO F4HXZDrWycxFPwhlz72eT+iqjAy5HGhV+3KVx+D4Ty1YTU1E04V5Ws0Mi2VIruNa1R/R 7ZYSO1y05ZHmZLEUp8wypKPVsOQu30w8ODil5jEfemC8vmGfB1ArBdJfBcl4BJ6Ff8v0 Jc6g== X-Gm-Message-State: AHPjjUgK1Puwnz2YEzyKtIPrA1I55Duw5/RUDGOxUyK3L3XFCTvXYv06 MdYTnHdr8UACaZSg X-Google-Smtp-Source: ADKCNb6pJYwKSVupj1ozHoIYYm/qiQ0eQSN2eUEIdxN3Zf0+l/u8IwHlufajZxcFaHt5rWs3E774+w== X-Received: by 10.84.133.99 with SMTP id 90mr19229692plf.148.1505454076306; Thu, 14 Sep 2017 22:41:16 -0700 (PDT) Received: from flat-canetoad.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id z8sm280581pgc.93.2017.09.14.22.41.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Sep 2017 22:41:15 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Fri, 15 Sep 2017 15:40:46 +1000 Message-Id: <20170915054059.32109-1-oohall@gmail.com> X-Mailer: git-send-email 2.9.5 Subject: [Skiboot] [PATCH 01/14] core/pci-dt-slot: Represent PCIe slots in the devicetree X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" In P9 we get information about the physical PCIe slot topology through the HDAT. As a rule we never directly consume the HDAT inside of Skiboot and we always parse and incorporate the data from HDAT into the Skiboot device tree. Signed-off-by: Oliver O'Halloran --- core/Makefile.inc | 1 + core/pci-dt-slot.c | 214 +++++++++++++++++++++++++++++++++++++++++++++++++++++ include/pci-slot.h | 7 ++ 3 files changed, 222 insertions(+) create mode 100644 core/pci-dt-slot.c diff --git a/core/Makefile.inc b/core/Makefile.inc index f2de2f646ea1..e32c0a0ac4ee 100644 --- a/core/Makefile.inc +++ b/core/Makefile.inc @@ -9,6 +9,7 @@ CORE_OBJS += vpd.o hostservices.o platform.o nvram.o nvram-format.o hmi.o CORE_OBJS += console-log.o ipmi.o time-utils.o pel.o pool.o errorlog.o CORE_OBJS += timer.o i2c.o rtc.o flash.o sensor.o ipmi-opal.o CORE_OBJS += flash-subpartition.o bitmap.o buddy.o pci-quirk.o powercap.o psr.o +CORE_OBJS += pci-dt-slot.o ifeq ($(SKIBOOT_GCOV),1) CORE_OBJS += gcov-profiling.o diff --git a/core/pci-dt-slot.c b/core/pci-dt-slot.c new file mode 100644 index 000000000000..bae7a41abc53 --- /dev/null +++ b/core/pci-dt-slot.c @@ -0,0 +1,214 @@ +#include +#include +#include + +#include +#include + +#include +#include +#include +#include + +#undef pr_fmt +#define pr_fmt(fmt) "DT-SLOT: " fmt + +#define PCIDBG(_p, _bdfn, fmt, a...) \ + prlog(PR_DEBUG, "PHB#%04x:%02x:%02x.%x " fmt, \ + (_p)->opal_id, \ + ((_bdfn) >> 8) & 0xff, \ + ((_bdfn) >> 3) & 0x1f, (_bdfn) & 0x7, ## a) + +struct dt_node *dt_slots; + +static struct dt_node *map_phb_to_slot(struct phb *phb) +{ + uint32_t chip_id = dt_get_chip_id(phb->dt_node); + uint32_t phb_idx = dt_prop_get_u32_def(phb->dt_node, + "ibm,phb-index", 0); + struct dt_node *slot_node; + + if (!dt_slots) + dt_slots = dt_find_by_path(dt_root, "/ibm,pcie-slots"); + + dt_for_each_child(dt_slots, slot_node) { + u32 reg[2]; + + if (!dt_node_is_compatible(slot_node, "ibm,pcie-root-port")) + continue; + + reg[0] = dt_prop_get_cell(slot_node, "reg", 0); + reg[1] = dt_prop_get_cell(slot_node, "reg", 1); + + if (reg[0] == chip_id && reg[1] == phb_idx) + return slot_node; + } + + return NULL; +} + +static struct dt_node *map_downport_to_slot(struct phb *phb, + struct pci_device *pd) +{ + struct dt_node *bus_node, *child; + struct pci_device *cursor; + uint32_t port_dev_id; + + /* + * Downports are a little bit special since we need to figure + * out which PCI device corresponds to which down port in the + * slot map. + * + * XXX: I'm assuming the ordering of port IDs and probed + * PCIe switch downstream devices is the same. We should + * check what we actually get in the HDAT. + */ + + list_for_each(&pd->parent->children, cursor, link) + if (cursor == pd) + break; + + /* the child should always be on the parent's child list */ + assert(cursor); + port_dev_id = (cursor->bdfn >> 3) & 0x1f; + + bus_node = map_pci_dev_to_slot(phb, pd->parent); + if (!bus_node) + return NULL; + + dt_for_each_child(bus_node, child) + if (dt_prop_get_u32(child, "reg") == port_dev_id) + return child; + + /* unused downport */ + return NULL; +} + +static struct dt_node *__map_pci_dev_to_slot(struct phb *phb, + struct pci_device *pd) +{ + struct dt_node *child, *bus_node, *wildcard= NULL; + + if (!pd || !pd->parent || pd->dev_type == PCIE_TYPE_ROOT_PORT) + return map_phb_to_slot(phb); + + if (pd->dev_type == PCIE_TYPE_SWITCH_DNPORT) + return map_downport_to_slot(phb, pd); + + /* + * For matching against devices always use the 0th function. + * This is necessary since some functions may have a different + * VDID to the base device. e.g. The DMA engines in PLX switches + */ + if (pd->bdfn & 0x7) { + struct pci_device *cursor; + + PCIDBG(phb, pd->bdfn, "mapping fn %x to 0th fn (%x)\n", + pd->bdfn, pd->bdfn & (~0x7)); + + list_for_each(&pd->parent->children, cursor, link) + if ((pd->bdfn & ~0x7) == cursor->bdfn) + return map_pci_dev_to_slot(phb, cursor); + + return NULL; + } + + /* No slot information for this device. Might be a firmware bug */ + bus_node = map_pci_dev_to_slot(phb, pd->parent); + if (!bus_node) + return NULL; + + /* + * If this PCI device is mounted on a card the parent "bus" + * may actually be a slot or builtin. + */ + if (list_empty(&bus_node->children)) + return bus_node; + + /* find the device in the parent bus node */ + dt_for_each_child(bus_node, child) { + u32 vdid; + + /* "pluggable" and "builtin" without unit addrs are wildcards */ + if (!dt_has_node_property(child, "reg", NULL)) { + if (wildcard) { + prerror("Duplicate wildcard entry! Already have %s, found %s", + wildcard->name, child->name); + assert(0); + } + + wildcard = child; + continue; + } + + /* NB: the pci_device vdid is did,vid rather than vid,did */ + vdid = dt_prop_get_cell(child, "reg", 1) << 16 | + dt_prop_get_cell(child, "reg", 0); + + if (vdid == pd->vdid) + return child; + } + + if (!wildcard) + PCIDBG(phb, pd->bdfn, + "Unable to find a slot for device %.4x:%.4x\n", + (pd->vdid & 0xffff0000) >> 16, pd->vdid & 0xffff); + + return wildcard; +} + +struct dt_node *map_pci_dev_to_slot(struct phb *phb, struct pci_device *pd) +{ + uint32_t bdfn = pd ? pd->bdfn : 0; + struct dt_node *n; + char *path; + + if (pd && pd->slot && pd->slot->data) + return pd->slot->data; + + PCIDBG(phb, bdfn, "Finding slot\n"); + + n = __map_pci_dev_to_slot(phb, pd); + if (!n) { + PCIDBG(phb, bdfn, "No slot found!\n"); + } else { + path = dt_get_path(n); + PCIDBG(phb, bdfn, "Slot found %s\n", path); + free(path); + } + + return n; +} + +int __print_slot(struct phb *phb, struct pci_device *pd, void *userdata); +int __print_slot(struct phb *phb, struct pci_device *pd, + void __unused *userdata) +{ + struct dt_node *node; + struct dt_node *pnode; + char *c = NULL; + u32 phandle = 0; + + if (!pd) + return 0; + + node = map_pci_dev_to_slot(phb, pd); + + /* at this point all node associations should be done */ + if (pd->dn && dt_has_node_property(pd->dn, "ibm,pcie-slot", NULL)) { + phandle = dt_prop_get_u32(pd->dn, "ibm,pcie-slot"); + pnode = dt_find_by_phandle(dt_root, phandle); + + assert(node == pnode); + } + + if (node) + c = dt_get_path(node); + + PCIDBG(phb, pd->bdfn, "Mapped to slot %s (%x)\n", + c ? c : "", phandle); + + free(c); + + return 0; +} diff --git a/include/pci-slot.h b/include/pci-slot.h index 479bc08cc09e..51e64d7b2cad 100644 --- a/include/pci-slot.h +++ b/include/pci-slot.h @@ -255,4 +255,11 @@ extern struct pci_slot *pcie_slot_create(struct phb *phb, extern void pci_slot_add_dt_properties(struct pci_slot *slot, struct dt_node *np); extern struct pci_slot *pci_slot_find(uint64_t id); + +/* DT based slot map */ + +extern struct dt_node *dt_slots; +extern struct dt_node *map_pci_dev_to_slot(struct phb *phb, + struct pci_device *pd); + #endif /* __PCI_SLOT_H */ From patchwork Fri Sep 15 05:40:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 814062 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xtkmg5DSKz9sPr for ; Fri, 15 Sep 2017 15:41:55 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="EGDRj2Ye"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xtkmg45VCzDrYD for ; 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Thu, 14 Sep 2017 22:41:18 -0700 (PDT) Received: from flat-canetoad.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id z8sm280581pgc.93.2017.09.14.22.41.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Sep 2017 22:41:17 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Fri, 15 Sep 2017 15:40:47 +1000 Message-Id: <20170915054059.32109-2-oohall@gmail.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170915054059.32109-1-oohall@gmail.com> References: <20170915054059.32109-1-oohall@gmail.com> Subject: [Skiboot] [PATCH 02/14] core/pcie-slots: Make dynamic slot creation generic X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" astbmc has some code to handle devices that are behind a "slot" on a riser card that can't be added to the static slot tables for a system. We probably want to use this code outside the slot table handling so move it somewhere generic and rework it so slot table specifics aren't buried inside it. Signed-off-by: Oliver O'Halloran --- core/pcie-slot.c | 51 +++++++++++++++++++++++++++++++++ include/pci-slot.h | 3 ++ platforms/astbmc/slots.c | 74 ++++++++---------------------------------------- 3 files changed, 66 insertions(+), 62 deletions(-) diff --git a/core/pcie-slot.c b/core/pcie-slot.c index 1b7e24cbfc67..77e356c8a702 100644 --- a/core/pcie-slot.c +++ b/core/pcie-slot.c @@ -528,5 +528,56 @@ struct pci_slot *pcie_slot_create(struct phb *phb, struct pci_device *pd) slot->ops.hreset = pcie_slot_sm_hreset; slot->ops.freset = pcie_slot_sm_freset; + slot->wired_lanes = PCI_SLOT_WIRED_LANES_UNKNOWN; + slot->connector_type = PCI_SLOT_CONNECTOR_PCIE_NS; + slot->card_desc = PCI_SLOT_DESC_NON_STANDARD; + slot->card_mech = PCI_SLOT_MECH_NONE; + slot->power_led_ctl = PCI_SLOT_PWR_LED_CTL_NONE; + slot->attn_led_ctl = PCI_SLOT_ATTN_LED_CTL_NONE; + + return slot; +} + +/* FIXME: this is kind of insane */ +struct pci_slot *pcie_slot_create_dynamic(struct phb *phb, + struct pci_device *pd) +{ + uint32_t ecap, val; + struct pci_slot *slot; + + if (!phb || !pd || pd->slot) + return NULL; + + /* Try to create slot whose details aren't provided by platform. + * We only care the downstream ports of PCIe switch that connects + * to root port. + */ + if (pd->dev_type != PCIE_TYPE_SWITCH_DNPORT || + !pd->parent || !pd->parent->parent || + pd->parent->parent->parent) + return NULL; + + ecap = pci_cap(pd, PCI_CFG_CAP_ID_EXP, false); + pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_SLOTCAP, &val); + if (!(val & PCICAP_EXP_SLOTCAP_HPLUG_CAP)) + return NULL; + + slot = pcie_slot_create(phb, pd); + + /* On superMicro's "p8dnu" platform, we create dynamic PCI slots + * for all downstream ports of PEX9733 that is connected to PHB + * direct slot. The power supply to the PCI slot is lost after + * PCI adapter is removed from it. The power supply can't be + * turned on when the slot is in empty state. The power supply + * isn't turned on automatically when inserting PCI adapter to + * the slot at later point. We set a flag to the slot here, to + * turn on the power supply in (suprise or managed) hot-add path. + * + * We have same issue with PEX8718 as above on "p8dnu" platform. + */ + if (dt_node_is_compatible(dt_root, "supermicro,p8dnu") && slot->pd && + (slot->pd->vdid == 0x973310b5 || slot->pd->vdid == 0x871810b5)) + pci_slot_add_flags(slot, PCI_SLOT_FLAG_FORCE_POWERON); + return slot; } diff --git a/include/pci-slot.h b/include/pci-slot.h index 51e64d7b2cad..0524652b3142 100644 --- a/include/pci-slot.h +++ b/include/pci-slot.h @@ -252,6 +252,9 @@ extern struct pci_slot *pci_slot_alloc(struct phb *phb, struct pci_device *pd); extern struct pci_slot *pcie_slot_create(struct phb *phb, struct pci_device *pd); +extern struct pci_slot *pcie_slot_create_dynamic(struct phb *phb, + struct pci_device *pd); + extern void pci_slot_add_dt_properties(struct pci_slot *slot, struct dt_node *np); extern struct pci_slot *pci_slot_find(uint64_t id); diff --git a/platforms/astbmc/slots.c b/platforms/astbmc/slots.c index a2bec8797b37..92d52f7b5587 100644 --- a/platforms/astbmc/slots.c +++ b/platforms/astbmc/slots.c @@ -85,7 +85,7 @@ static const struct slot_table_entry *match_slot_dev_entry(struct phb *phb, return NULL; } -static void add_slot_properties(struct pci_slot *slot, +static void slot_table_add_properties(struct pci_slot *slot, struct dt_node *np) { struct phb *phb = slot->phb; @@ -126,82 +126,32 @@ static void add_slot_properties(struct pci_slot *slot, loc_code, strlen(loc_code) + 1); } -static void init_slot_info(struct pci_slot *slot, bool pluggable, void *data) -{ - slot->data = data; - slot->ops.add_properties = add_slot_properties; - - slot->pluggable = pluggable; - slot->power_ctl = false; - slot->wired_lanes = PCI_SLOT_WIRED_LANES_UNKNOWN; - slot->connector_type = PCI_SLOT_CONNECTOR_PCIE_NS; - slot->card_desc = PCI_SLOT_DESC_NON_STANDARD; - slot->card_mech = PCI_SLOT_MECH_NONE; - slot->power_led_ctl = PCI_SLOT_PWR_LED_CTL_NONE; - slot->attn_led_ctl = PCI_SLOT_ATTN_LED_CTL_NONE; -} - -static void create_dynamic_slot(struct phb *phb, struct pci_device *pd) -{ - uint32_t ecap, val; - struct pci_slot *slot; - - if (!phb || !pd || pd->slot) - return; - - /* Try to create slot whose details aren't provided by platform. - * We only care the downstream ports of PCIe switch that connects - * to root port. - */ - if (pd->dev_type != PCIE_TYPE_SWITCH_DNPORT || - !pd->parent || !pd->parent->parent || - pd->parent->parent->parent) - return; - - ecap = pci_cap(pd, PCI_CFG_CAP_ID_EXP, false); - pci_cfg_read32(phb, pd->bdfn, ecap + PCICAP_EXP_SLOTCAP, &val); - if (!(val & PCICAP_EXP_SLOTCAP_HPLUG_CAP)) - return; - - slot = pcie_slot_create(phb, pd); - assert(slot); - init_slot_info(slot, true, NULL); - - /* On superMicro's "p8dnu" platform, we create dynamic PCI slots - * for all downstream ports of PEX9733 that is connected to PHB - * direct slot. The power supply to the PCI slot is lost after - * PCI adapter is removed from it. The power supply can't be - * turned on when the slot is in empty state. The power supply - * isn't turned on automatically when inserting PCI adapter to - * the slot at later point. We set a flag to the slot here, to - * turn on the power supply in (suprise or managed) hot-add path. - * - * We have same issue with PEX8718 as above on "p8dnu" platform. - */ - if (dt_node_is_compatible(dt_root, "supermicro,p8dnu") && slot->pd && - (slot->pd->vdid == 0x973310b5 || slot->pd->vdid == 0x871810b5)) - pci_slot_add_flags(slot, PCI_SLOT_FLAG_FORCE_POWERON); -} - void slot_table_get_slot_info(struct phb *phb, struct pci_device *pd) { const struct slot_table_entry *ent; struct pci_slot *slot; - bool pluggable; if (!pd || pd->slot) return; + ent = match_slot_dev_entry(phb, pd); + if (!ent || !ent->name) { - create_dynamic_slot(phb, pd); + slot = pcie_slot_create_dynamic(phb, pd); + if (slot) { + slot->ops.add_properties = slot_table_add_properties; + slot->pluggable = true; + } + return; } slot = pcie_slot_create(phb, pd); assert(slot); - pluggable = !!(ent->etype == st_pluggable_slot); - init_slot_info(slot, pluggable, (void *)ent); + slot->pluggable = !!(ent->etype == st_pluggable_slot); + slot->ops.add_properties = slot_table_add_properties; + slot->data = (void *)ent; } static int __pci_find_dev_by_location(struct phb *phb, From patchwork Fri Sep 15 05:40:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 814063 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xtkn41CmHz9sPr for ; Fri, 15 Sep 2017 15:42:16 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZrHBC7FW"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xtkn404qYzDrYs for ; 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Thu, 14 Sep 2017 22:41:20 -0700 (PDT) Received: from flat-canetoad.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id z8sm280581pgc.93.2017.09.14.22.41.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Sep 2017 22:41:20 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Fri, 15 Sep 2017 15:40:48 +1000 Message-Id: <20170915054059.32109-3-oohall@gmail.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20170915054059.32109-1-oohall@gmail.com> References: <20170915054059.32109-1-oohall@gmail.com> Subject: [Skiboot] [PATCH 03/14] core/pci-slots: Move slot-label construction to a helper X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Move this out of the astbmc specific part into a generic helper. This allows us to use it more commonly. Signed-off-by: Oliver O'Halloran --- core/pci-slot.c | 30 ++++++++++++++++++++++++++++++ include/pci-slot.h | 3 +++ platforms/astbmc/slots.c | 34 ++-------------------------------- 3 files changed, 35 insertions(+), 32 deletions(-) diff --git a/core/pci-slot.c b/core/pci-slot.c index 69bdb86abaeb..6d3ed6cb9cb7 100644 --- a/core/pci-slot.c +++ b/core/pci-slot.c @@ -212,3 +212,33 @@ struct pci_slot *pci_slot_find(uint64_t id) slot = pd ? pd->slot : NULL; return slot; } + +void pci_slot_add_loc(struct pci_slot *slot, + struct dt_node *np, const char *label) +{ + char tmp[8], loc_code[LOC_CODE_SIZE]; + struct pci_device *pd = slot->pd; + struct phb *phb = slot->phb; + + if (!np) + return; + + /* didn't get a real slot label? generate one! */ + if (!label) { + snprintf(tmp, sizeof(tmp), "S%04x%02x", phb->opal_id, + pd->secondary_bus); + label = tmp; + } + + /* Make a -