From patchwork Fri Sep 2 16:58:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sieu Mun Tang X-Patchwork-Id: 1673660 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=ek6GSMD/; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MK3yn1FSXz1yhK for ; Sat, 3 Sep 2022 02:58:39 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EAF9584180; Fri, 2 Sep 2022 18:58:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ek6GSMD/"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id F308D84053; Fri, 2 Sep 2022 18:58:29 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, T_SCC_BODY_TEXT_LINE,T_SPF_PERMERROR autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id ED8AA84180 for ; Fri, 2 Sep 2022 18:58:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom=sieu.mun.tang@intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662137906; x=1693673906; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=eAA8AOgBdrrVifLocbP2kg3HHfKdUJJ8dbBseWu5HRY=; b=ek6GSMD/YaK9g4y0vFoaMKsrBkrfWKbARHMAb/M/l4GrJw2/+kFOStgG bAOzo1/zgyzq2+BgzBIvEPvYCwLW84+gBLg0dAaqGYi9nqcDGnIR+iJtS Qst1FIZWXhdrGPOXr4GbG/s2+2kI2Y1CugQBJza93N23UdDDZVjnRUaZv 1LqZtITIjnbOK3hj6N3B8jsQJwqo9m0fGuhjV3F5VJpbu+8GnlS8R4EU7 MmoKbGYsBMpEfWjm1oYQGGe879cK0PwFPaR2LmmKHXvkbdecpykJOE3xA D9grNTjqNOWl+zT1u8kKVGFVx3nczXfuL20pkWaMuWCKHZ92/kIb2xMTP w==; X-IronPort-AV: E=McAfee;i="6500,9779,10458"; a="296028591" X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="296028591" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2022 09:58:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,283,1654585200"; d="scan'208";a="615768061" Received: from pglc1182.png.intel.com ([172.30.235.29]) by fmsmga007.fm.intel.com with ESMTP; 02 Sep 2022 09:58:19 -0700 From: sieu.mun.tang@intel.com To: u-boot@lists.denx.de Cc: Jagan Teki , Vignesh R , Marek , Simon , Kris , Tien Fong , Kok Kiang , Siew Chin , Sin Hui , Raaj , Dinesh , Boon Khai , Alif , Teik Heng , Hazim , Jit Loon Lim , Sieu Mun Tang Subject: [PATCH] doc: socfpga_arria10_qspi_socdk: Document for running SPL/U-Boot on the kit Date: Sat, 3 Sep 2022 00:58:17 +0800 Message-Id: <20220902165817.24754-1-sieu.mun.tang@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean From: Tien Fong Chee This document would describe the steps for building SPL and U-Boot, and showing the proposed layout for the QSPI flash. Signed-off-by: Tien Fong Chee Signed-off-by: Sieu Mun Tang --- doc/README.socfpga_arria10_qspi_socdk | 56 +++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 doc/README.socfpga_arria10_qspi_socdk diff --git a/doc/README.socfpga_arria10_qspi_socdk b/doc/README.socfpga_arria10_qspi_socdk new file mode 100644 index 0000000000..57ebef2510 --- /dev/null +++ b/doc/README.socfpga_arria10_qspi_socdk @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 + /* + * Copyright (C) 2019 Intel Corporation + * + */ + +---------------------------------------- +SOCFPGA Documentation for U-Boot and SPL +---------------------------------------- +This README is about U-Boot and SPL support for Arria 10 QSPI SoCDK. + +a. Steps for building SPL and U-Boot: +------------------------------------- +1. cd to U-Boot source directory. +2. Build both SPL and U-Boot, runs "export CROSS_COMPILE=arm-altera-eabi-; +make mrproper; make socfpga_arria10_qspi_defconfig; make -8" +3.Runs "mkpimage -hv 1 -o spl/spl_w_dtb-mkpimage.bin + spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin spl/u-boot-spl-dtb.bin + spl/u-boot-spl-dtb.bin" + +b. Steps for building default FIT image for FPGA bitstreams: +------------------------------------------------------------ +1. Copy both ghrd_10as066n2.periph.rbf and ghrd_10as066n2.core.rbf to U-Boot +source root directory. +2. Runs "tools /mkimage -E -f + board/altera/arria10-socdk/fit_spl_fpga.its fit_spl_fpga.itb" + +c. Steps for buiding default FIT image for U-Boot: +-------------------------------------------------- +1. Ensure a. Steps for building SPL and U-Boot are done. +2. Runs "tools/mkimage -E -f board/altera/arria10-socdk/fit_uboot.its + fit_spl_uboot.itb" + +d. Steps for buiding default FIT image for Linux and DTB: +--------------------------------------------------------- +1. Copy uImage & socfpga_arria10_socdk_qspi.dtb to U-Boot source root directory. +2. Runs "tools/mkimage -f + board/altera/arria10-socdk/fit_kernel.its kernel.itb" + +After going through all steps described above, those images/binaries can be +written into QSPI flash as shown in below proposed layout. Ensure no overlapping +for each image. + +Addr 0 -------------------------------------- + | spl_w_dtb-mkpimage.bin | 1MB + -------------------------------------- + | fit_spl_uboot.itb | 1MB + -------------------------------------- + |env(64K) & env_redundant(64k) | 1MB + -------------------------------------- + | fit_spl_fpga.itb | depend on bitstreams size +Addr 0x1200000 -------------------------------------- + | kernel.itb | depend on kernel.itb size +Addr 0x2720000 -------------------------------------- + |console-image-minimal-arria10.jffs2 | -(RFS) + --------------------------------------