From patchwork Mon Aug 29 15:40:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antonio Caggiano X-Patchwork-Id: 1671501 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=kKAZhokL; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MGZSX4tfMz1yg7 for ; Tue, 30 Aug 2022 01:42:18 +1000 (AEST) Received: from localhost ([::1]:58116 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oSgtt-0002dB-OJ for incoming@patchwork.ozlabs.org; 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s=mail; t=1661787669; bh=XIi4qSO0RmH+GIApCIgGlWGW/G2VTXFcHQPJf/yKSiE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kKAZhokLzXe9YwKzDju0E1lc63O0zfmVJ4qCaE0VFOqZMe6oLpdiLfPmncDeQHAPN 6TY5/LYpMdO3Mjm8FtnsGDqecrqrxElFgSMScR7WPKM9LqmKXq/tpq6eGGZzGz4FcK Kop3E9G63WItOQSvtgV/tZ4WAAdelQCc2HUepcdu5eqOODwWYpeEzuy05xges+LBOY PuUPyHcLynb2NpVANQuBth+nr9dDg5uorOJKUZvvOjuNVpqKIkCvJcy1nr5j8yaWeE Ol0YT4yWgDPHOlgHEWRsizDH+Hm+OF8ej3Z2hobHmMSNkRszF1fnlcGt5CGZYdQxPp D9mrFHWKh22oQ== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, Richard Henderson Subject: [PATCH 1/5] Update version for v7.1.0-rc4 release Date: Mon, 29 Aug 2022 17:40:54 +0200 Message-Id: <20220829154058.524413-2-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829154058.524413-1-antonio.caggiano@collabora.com> References: <20220829154058.524413-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; 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spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=YI1vRHeS; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MGZT137VXz1yg7 for ; Tue, 30 Aug 2022 01:42:45 +1000 (AEST) Received: from localhost ([::1]:58120 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oSguR-0002g9-BP for incoming@patchwork.ozlabs.org; Mon, 29 Aug 2022 11:42:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41308) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oSgt1-0002d7-Og for qemu-devel@nongnu.org; Mon, 29 Aug 2022 11:41:15 -0400 Received: from madras.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e5ab]:52576) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oSgsy-0004dn-Li for qemu-devel@nongnu.org; Mon, 29 Aug 2022 11:41:15 -0400 Received: from dellino.fritz.box (host-95-235-60-93.retail.telecomitalia.it [95.235.60.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: fahien) by madras.collabora.co.uk (Postfix) with ESMTPSA id C837F6601EFC; Mon, 29 Aug 2022 16:41:09 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1661787670; bh=lWh9WyS/F7ucYZTr2NF8e4IrmOwvvuFhoG0/A01n8rU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YI1vRHeSRoh0QAzS8ih1uFGQl6uIa0+OE4/u72bwEwMOOiZ2A1d2VGr25pQYIAp1S mwAWUZ/3KYEhdnHIBqxsGv37wTvkFRA7ah4djQAnS/wQKVFzrDXPaQGzG1AbQ6GJOD fOdXZ6iyHz4FwzcqKqUhC1QjLGqfcluV26mGQXVuy6d80mu69JAETKvNUTBqmuSFBx HtmQzcaZ8ZwSCEJIV4LrtzpvA434Wi3sacFnaeECSb4LNFjtV6OOG7pDhHiCPXJq9O F8Rz+VmTqqxbZZNv07rDcmWd11nIqNPmTyWzb5gelf8rQcMuwvbkSHtcshAFEg0CuW Smdh9YMxy5zYQ== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, "Dr. David Alan Gilbert" , "Michael S. Tsirkin" Subject: [PATCH 2/5] virtio: Add shared memory capability Date: Mon, 29 Aug 2022 17:40:55 +0200 Message-Id: <20220829154058.524413-3-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829154058.524413-1-antonio.caggiano@collabora.com> References: <20220829154058.524413-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' and the data structure 'virtio_pci_shm_cap' to go with it. They allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. v2: Remove virtio_pci_shm_cap as virtio_pci_cap64 is used instead. v3: No need for mask32 as cpu_to_le32 truncates the value. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano --- hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index a50c5a57d7..377bb06fec 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1169,6 +1169,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, return offset; } +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap = { + .cap.cap_len = sizeof cap, + .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar = bar; + cap.cap.length = cpu_to_le32(length); + cap.length_hi = cpu_to_le32(length >> 32); + cap.cap.offset = cpu_to_le32(offset); + cap.offset_hi = cpu_to_le32(offset >> 32); + cap.cap.id = id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 2446dcd9ae..5e5c4a4c6d 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -252,4 +252,8 @@ void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t); */ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id); + #endif From patchwork Mon Aug 29 15:40:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antonio Caggiano X-Patchwork-Id: 1671502 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=dSXHjxU3; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MGZSx3vp7z1yg7 for ; Tue, 30 Aug 2022 01:42:41 +1000 (AEST) Received: from localhost ([::1]:58118 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oSguM-0002fU-Uj for incoming@patchwork.ozlabs.org; Mon, 29 Aug 2022 11:42:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45734) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oSgt1-0002dL-V6 for qemu-devel@nongnu.org; Mon, 29 Aug 2022 11:41:15 -0400 Received: from madras.collabora.co.uk ([46.235.227.172]:46652) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oSgsy-0004dv-NM for qemu-devel@nongnu.org; Mon, 29 Aug 2022 11:41:15 -0400 Received: from dellino.fritz.box (host-95-235-60-93.retail.telecomitalia.it [95.235.60.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: fahien) by madras.collabora.co.uk (Postfix) with ESMTPSA id 86D866601EFD; Mon, 29 Aug 2022 16:41:10 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1661787670; bh=zgAkwkHHaTxMrqMCkE07evkOHPeHMLjjiTu5oGKA7Lc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dSXHjxU3guQ0bHk6u6udDJGDdb64nt5NCf0pDTyOlr0WpQQUqL3QmNe6+xNguPYh2 yAkUq7NOn0Gb0ZhgTs8qd/6fhyqCjAU0axfGPb7fEWPfVqRyawCin+6sLlS+UJcY/B IoXEY4tDSyn8WMviEJgCWsK26C9Ildb/oz20PhDT+r9BMNNeosV0tSAq5z4oZfDDbq VRDwJn/rb2ogbRy7R8VdYKnIqk03sOLeEl9awfu2eq0fkfJUtUzKmoSi8bwADAj3UX bRstasl2pIqiuXrbD6+3E1e6yYO2jRD5jwvOLeg5NRgFXR1IOX2vdbH+jNIkPIFzRt QmdKQbCyBujbQ== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, Gerd Hoffmann , "Michael S . Tsirkin" Subject: [PATCH 3/5] virtio-gpu: hostmem Date: Mon, 29 Aug 2022 17:40:56 +0200 Message-Id: <20220829154058.524413-4-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829154058.524413-1-antonio.caggiano@collabora.com> References: <20220829154058.524413-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Received-SPF: pass client-ip=46.235.227.172; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Gerd Hoffmann Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. v2: Formatting fixes Signed-off-by: Antonio Caggiano Acked-by: Michael S. Tsirkin --- hw/display/virtio-gpu-pci.c | 15 +++++++++++++++ hw/display/virtio-gpu.c | 1 + hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- include/hw/virtio/virtio-gpu.h | 5 +++++ 4 files changed, 45 insertions(+), 9 deletions(-) diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 93f214ff58..2cbbacd7fe 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,21 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) DeviceState *vdev = DEVICE(g); int i; + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + + qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp); virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 20cc703dcc..506b3b8eef 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1424,6 +1424,7 @@ static Property virtio_gpu_properties[] = { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index 4dcb34c4a7..aa8d1ab993 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx = 2; - vpci_dev->msix_bar_idx = 4; vpci_dev->modern_io_bar_idx = 5; + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvga. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx = 2; + vpci_dev->msix_bar_idx = 4; + } else { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* * with page-per-vq=off there is no padding space we can use diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 2e28507efe..eafce75b04 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -102,12 +102,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED)) #define virtio_gpu_blob_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; struct virtio_gpu_ctrl_command { @@ -131,6 +134,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; int enabled_output_bitmask; From patchwork Mon Aug 29 15:40:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antonio Caggiano X-Patchwork-Id: 1671504 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=oR6H2SZc; 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Mon, 29 Aug 2022 16:41:11 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1661787671; bh=RoDiFBoQUz5lNT+j6b4lbs6jAxmz0nSw5a7c5INLB4c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oR6H2SZco64G1TLkH8UNyNyOwgluK3mz2I5ecpY/+ba43YvJpqLrCNN97+JeXszDJ wanhdUIlg/S7GBPpY5NgCUMwNPTfslnGUOPZQjY+r6EtzkzpmBkB/1iDLcdZVF7WY0 o9JyQ8tMopbbIO8uz8L0ysyhC4TIBzff7PyXSQXRAJ+WZlS1Dzn/F4HTw0hOBzVqNQ ZvKJkqqFQbqUPi6fx6B0XYHieCTLdkvPq0kCd1+iueDOTmmjBMvuxPJ+89PO0q/kuG RtEkkA62Pe2REG93WtdC766oyTJ7FtqeO/GItIXmL/Ww5cFCNHZgGBcthhy/42NsI8 0lJ2wFIbPMWWQ== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, Gerd Hoffmann , "Michael S. Tsirkin" Subject: [PATCH 4/5] virtio-gpu: Handle resource blob commands Date: Mon, 29 Aug 2022 17:40:57 +0200 Message-Id: <20220829154058.524413-5-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829154058.524413-1-antonio.caggiano@collabora.com> References: <20220829154058.524413-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Received-SPF: pass client-ip=46.235.227.172; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Support BLOB resources creation by calling virgl_renderer_resource_create_blob. Signed-off-by: Antonio Caggiano Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-virgl.c | 169 +++++++++++++++++++++++++++ hw/display/virtio-gpu.c | 8 +- include/hw/virtio/virtio-gpu-bswap.h | 18 +++ include/hw/virtio/virtio-gpu.h | 6 + meson.build | 5 + 5 files changed, 202 insertions(+), 4 deletions(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index 73cb92c8d5..c4c2c31d76 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -16,6 +16,8 @@ #include "trace.h" #include "hw/virtio/virtio.h" #include "hw/virtio/virtio-gpu.h" +#include "hw/virtio/virtio-gpu-bswap.h" +#include "hw/virtio/virtio-iommu.h" #include @@ -398,6 +400,162 @@ static void virgl_cmd_get_capset(VirtIOGPU *g, g_free(resp); } +#ifdef HAVE_VIRGL_RESOURCE_BLOB + +static void virgl_cmd_resource_create_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_create_blob cblob; + int ret; + + VIRTIO_GPU_FILL_CMD(cblob); + virtio_gpu_create_blob_bswap(&cblob); + trace_virtio_gpu_cmd_res_create_blob(cblob.resource_id, cblob.size); + + if (cblob.resource_id == 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", + __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = virtio_gpu_find_resource(g, cblob.resource_id); + if (res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n", + __func__, cblob.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = g_new0(struct virtio_gpu_simple_resource, 1); + res->resource_id = cblob.resource_id; + res->blob_size = cblob.size; + + if (res->iov) { + cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; + return; + } + + if (cblob.blob_mem != VIRTIO_GPU_BLOB_MEM_HOST3D) { + ret = virtio_gpu_create_mapping_iov(g, cblob.nr_entries, sizeof(cblob), + cmd, &res->addrs, &res->iov, + &res->iov_cnt); + if (ret != 0) { + cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; + return; + } + } + + if (cblob.blob_mem == VIRTIO_GPU_BLOB_MEM_GUEST) { + virtio_gpu_init_udmabuf(res); + } + QTAILQ_INSERT_HEAD(&g->reslist, res, next); + + const struct virgl_renderer_resource_create_blob_args virgl_args = { + .res_handle = cblob.resource_id, + .ctx_id = cblob.hdr.ctx_id, + .blob_mem = cblob.blob_mem, + .blob_id = cblob.blob_id, + .blob_flags = cblob.blob_flags, + .size = cblob.size, + .iovecs = res->iov, + .num_iovs = res->iov_cnt, + }; + ret = virgl_renderer_resource_create_blob(&virgl_args); + if (ret) { + g_print("Virgl blob create error: %s\n", strerror(-ret)); + } +} + +static void virgl_cmd_resource_map_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_map_blob mblob; + int ret; + void *data; + uint64_t size; + struct virtio_gpu_resp_map_info resp; + + VIRTIO_GPU_FILL_CMD(mblob); + virtio_gpu_map_blob_bswap(&mblob); + + if (mblob.resource_id == 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", + __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = virtio_gpu_find_resource(g, mblob.resource_id); + if (!res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource does not exist %d\n", + __func__, mblob.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + ret = virgl_renderer_resource_map(res->resource_id, &data, &size); + if (ret) { + g_print("Virgl blob resource map error: %s\n", strerror(-ret)); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + memory_region_init_ram_device_ptr(&res->region, OBJECT(g), NULL, size, data); + memory_region_add_subregion(&g->parent_obj.hostmem, mblob.offset, &res->region); + memory_region_set_enabled(&res->region, true); + + memset(&resp, 0, sizeof(resp)); + resp.hdr.type = VIRTIO_GPU_RESP_OK_MAP_INFO; + virgl_renderer_resource_get_map_info(mblob.resource_id, &resp.map_info); + virtio_gpu_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); + + res->mapped = true; +} + +static void virgl_cmd_resource_unmap_blob(VirtIOGPU *g, + struct virtio_gpu_ctrl_command *cmd) +{ + struct virtio_gpu_simple_resource *res; + struct virtio_gpu_resource_unmap_blob ublob; + VIRTIO_GPU_FILL_CMD(ublob); + virtio_gpu_unmap_blob_bswap(&ublob); + + if (ublob.resource_id == 0) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", + __func__); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + res = virtio_gpu_find_resource(g, ublob.resource_id); + if (!res) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource does not exist %d\n", + __func__, ublob.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + if (!res->mapped) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already unmapped %d\n", + __func__, ublob.resource_id); + cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; + return; + } + + memory_region_set_enabled(&res->region, false); + memory_region_del_subregion(&g->parent_obj.hostmem, &res->region); + object_unparent(OBJECT(&res->region)); + + virgl_renderer_resource_unmap(ublob.resource_id); + + res->mapped = false; +} + +#endif /* HAVE_VIRGL_RESOURCE_BLOB */ + void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { @@ -464,6 +622,17 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, case VIRTIO_GPU_CMD_GET_EDID: virtio_gpu_get_edid(g, cmd); break; +#ifdef HAVE_VIRGL_RESOURCE_BLOB + case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB: + virgl_cmd_resource_create_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB: + virgl_cmd_resource_map_blob(g, cmd); + break; + case VIRTIO_GPU_CMD_RESOURCE_UNMAP_BLOB: + virgl_cmd_resource_unmap_blob(g, cmd); + break; +#endif /* HAVE_VIRGL_RESOURCE_BLOB */ default: cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; break; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 506b3b8eef..527c0aeede 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -33,8 +33,6 @@ #define VIRTIO_GPU_VM_VERSION 1 -static struct virtio_gpu_simple_resource* -virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); static struct virtio_gpu_simple_resource * virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, bool require_backing, @@ -115,7 +113,7 @@ static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) cursor->resource_id ? 1 : 0); } -static struct virtio_gpu_simple_resource * +struct virtio_gpu_simple_resource * virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) { struct virtio_gpu_simple_resource *res; @@ -1323,10 +1321,12 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) return; } +#ifndef HAVE_VIRGL_RESOURCE_BLOB if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) { - error_setg(errp, "blobs and virgl are not compatible (yet)"); + error_setg(errp, "Linked virglrenderer does not support blob resources"); return; } +#endif } if (!virtio_gpu_base_device_realize(qdev, diff --git a/include/hw/virtio/virtio-gpu-bswap.h b/include/hw/virtio/virtio-gpu-bswap.h index 9124108485..dd1975e2d4 100644 --- a/include/hw/virtio/virtio-gpu-bswap.h +++ b/include/hw/virtio/virtio-gpu-bswap.h @@ -63,10 +63,28 @@ virtio_gpu_create_blob_bswap(struct virtio_gpu_resource_create_blob *cblob) { virtio_gpu_ctrl_hdr_bswap(&cblob->hdr); le32_to_cpus(&cblob->resource_id); + le32_to_cpus(&cblob->blob_mem); le32_to_cpus(&cblob->blob_flags); + le32_to_cpus(&cblob->nr_entries); + le64_to_cpus(&cblob->blob_id); le64_to_cpus(&cblob->size); } +static inline void +virtio_gpu_map_blob_bswap(struct virtio_gpu_resource_map_blob *mblob) +{ + virtio_gpu_ctrl_hdr_bswap(&mblob->hdr); + le32_to_cpus(&mblob->resource_id); + le64_to_cpus(&mblob->offset); +} + +static inline void +virtio_gpu_unmap_blob_bswap(struct virtio_gpu_resource_unmap_blob *ublob) +{ + virtio_gpu_ctrl_hdr_bswap(&ublob->hdr); + le32_to_cpus(&ublob->resource_id); +} + static inline void virtio_gpu_scanout_blob_bswap(struct virtio_gpu_set_scanout_blob *ssb) { diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index eafce75b04..4f4cabf3b3 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -55,6 +55,9 @@ struct virtio_gpu_simple_resource { int dmabuf_fd; uint8_t *remapped; + MemoryRegion region; + bool mapped; + QTAILQ_ENTRY(virtio_gpu_simple_resource) next; }; @@ -245,6 +248,9 @@ void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, struct virtio_gpu_resp_display_info *dpy_info); /* virtio-gpu.c */ +struct virtio_gpu_simple_resource * +virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); + void virtio_gpu_ctrl_response(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd, struct virtio_gpu_ctrl_hdr *resp, diff --git a/meson.build b/meson.build index 20fddbd707..058fe03fd7 100644 --- a/meson.build +++ b/meson.build @@ -718,6 +718,11 @@ if not get_option('virglrenderer').auto() or have_system or have_vhost_user_gpu method: 'pkg-config', required: get_option('virglrenderer'), kwargs: static_kwargs) + + config_host_data.set('HAVE_VIRGL_RESOURCE_BLOB', + cc.has_function('virgl_renderer_resource_create_blob', + prefix: '#include ', + dependencies: virgl)) endif curl = not_found if not get_option('curl').auto() or have_block From patchwork Mon Aug 29 15:40:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antonio Caggiano X-Patchwork-Id: 1671512 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=RhR7Eks3; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MGZdS5p2lz1yg7 for ; Tue, 30 Aug 2022 01:50:03 +1000 (AEST) Received: from localhost ([::1]:33370 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oSh1T-0003Oq-9L for incoming@patchwork.ozlabs.org; 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s=mail; t=1661787672; bh=KxoeqoJ6zubFp2W98OC86FWdZAes+wgr0LzT03bOdN8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RhR7Eks3OtY0lBFdfm2qZ5e6EqniKEvRTt/g03oDltsklLPnSot620SNQgozSxvmH KMObLfK6zcQhKqqQDoHIj+LmjQSDPC35VKBzDO1lgJ2fL1LDBdouWOHhYftW5Q11zK pDWRRiWRsi4jDzwBtW7gcD8Nieu/whFb45e79NpF5PuKTA0bzjE3hqq+IncgGKsvM3 jnb7b4O3DNyf5hEyBqnNtDUR/2116CDcolcfTaHVLNcGd5H0dIlVReH6D4Qy1lz4ep 12wKe5RvNQJ0Y2Cap8Q6SmaViGUizDOfWiAlEfxCJc0OA/lXxjh/vzfwcMRC0Hac50 /u+Jzo6JG22Kg== From: Antonio Caggiano To: qemu-devel@nongnu.org Cc: gert.wollny@collabora.com, dmitry.osipenko@collabora.com, Gerd Hoffmann , "Michael S. Tsirkin" Subject: [PATCH 5/5] virtio-gpu: Don't require udmabuf when blob support is enabled Date: Mon, 29 Aug 2022 17:40:58 +0200 Message-Id: <20220829154058.524413-6-antonio.caggiano@collabora.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220829154058.524413-1-antonio.caggiano@collabora.com> References: <20220829154058.524413-1-antonio.caggiano@collabora.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1098:0:82:1000:25:2eeb:e5ab; envelope-from=antonio.caggiano@collabora.com; helo=madras.collabora.co.uk X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Dmitry Osipenko Host blobs don't need udmabuf, it's only needed by guest blobs. The host blobs are utilized by the Mesa virgl driver when persistent memory mapping is needed by a GL buffer, otherwise virgl driver doesn't use blobs. Persistent mapping support bumps GL version from 4.3 to 4.5 in guest. Relax the udmabuf requirement. Signed-off-by: Dmitry Osipenko Reviewed-by: Antonio Caggiano --- hw/display/virtio-gpu.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 527c0aeede..4c2a9b7ea7 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -367,7 +367,9 @@ static void virtio_gpu_resource_create_blob(VirtIOGPU *g, return; } - virtio_gpu_init_udmabuf(res); + if (cblob.blob_mem == VIRTIO_GPU_BLOB_MEM_GUEST) { + virtio_gpu_init_udmabuf(res); + } QTAILQ_INSERT_HEAD(&g->reslist, res, next); } @@ -1315,19 +1317,13 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) VirtIODevice *vdev = VIRTIO_DEVICE(qdev); VirtIOGPU *g = VIRTIO_GPU(qdev); - if (virtio_gpu_blob_enabled(g->parent_obj.conf)) { - if (!virtio_gpu_have_udmabuf()) { - error_setg(errp, "cannot enable blob resources without udmabuf"); - return; - } - #ifndef HAVE_VIRGL_RESOURCE_BLOB - if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) { - error_setg(errp, "Linked virglrenderer does not support blob resources"); - return; - } -#endif + if (virtio_gpu_blob_enabled(g->parent_obj.conf) && + virtio_gpu_virgl_enabled(g->parent_obj.conf)) { + error_setg(errp, "Linked virglrenderer does not support blob resources"); + return; } +#endif if (!virtio_gpu_base_device_realize(qdev, virtio_gpu_handle_ctrl_cb,