From patchwork Mon Aug 1 14:49:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 1662637 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LxLcq5f5fz9sGP for ; Tue, 2 Aug 2022 00:49:47 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LxLcq3pxBz3bgQ for ; Tue, 2 Aug 2022 00:49:47 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=softfail (domain owner discourages use of this host) smtp.mailfrom=nuvoton.com (client-ip=212.199.177.27; helo=herzl.nuvoton.co.il; envelope-from=tomer.maimon@nuvoton.com; receiver=) Received: from herzl.nuvoton.co.il (unknown [212.199.177.27]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LxLcZ10HKz2y2D for ; Tue, 2 Aug 2022 00:49:29 +1000 (AEST) Received: from NTILML01.nuvoton.com (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id 271EnLGs024208 for ; Mon, 1 Aug 2022 17:49:22 +0300 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTILML01.nuvoton.com (10.190.1.56) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.14; Mon, 1 Aug 2022 17:49:21 +0300 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCCAS04.nuvoton.com (10.1.8.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Mon, 1 Aug 2022 22:49:19 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 1 Aug 2022 22:49:19 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 6385F600B2; Mon, 1 Aug 2022 17:49:18 +0300 (IDT) From: Tomer Maimon To: Subject: [PATCH linux dev-5.15 v1 1/7] dt-bindings: iio: adc: npcm: Add npcm845 compatible string Date: Mon, 1 Aug 2022 17:49:08 +0300 Message-ID: <20220801144914.126075-2-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220801144914.126075-1-tmaimon77@gmail.com> References: <20220801144914.126075-1-tmaimon77@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, joel@jms.id.au, Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add a compatible string for Nuvoton BMC NPCM845 ADC. Signed-off-by: Tomer Maimon --- .../devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml index 001cf263b7d5..fede2aa64092 100644 --- a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml @@ -10,11 +10,14 @@ maintainers: - Tomer Maimon description: - The NPCM ADC is a 10-bit converter for eight channel inputs. + The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter, + both have eight channel inputs. properties: compatible: - const: nuvoton,npcm750-adc + enum: + - nuvoton,npcm750-adc + - nuvoton,npcm845-adc reg: maxItems: 1 From patchwork Mon Aug 1 14:49:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 1662639 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LxLdG0mFCz9sGP for ; Tue, 2 Aug 2022 00:50:10 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LxLdF6kPnz3054 for ; Tue, 2 Aug 2022 00:50:09 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=softfail (domain owner discourages use of this host) smtp.mailfrom=nuvoton.com (client-ip=212.199.177.27; helo=herzl.nuvoton.co.il; envelope-from=tomer.maimon@nuvoton.com; receiver=) Received: from herzl.nuvoton.co.il (unknown [212.199.177.27]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LxLcZ16bTz2yZc for ; Tue, 2 Aug 2022 00:49:32 +1000 (AEST) Received: from NTILML01.nuvoton.com (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id 271EnLGv024208 for ; Mon, 1 Aug 2022 17:49:22 +0300 Received: from NTHCML01B.nuvoton.com (10.1.8.178) by NTILML01.nuvoton.com (10.190.1.46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 1 Aug 2022 17:49:21 +0300 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCML01B.nuvoton.com (10.1.8.178) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Mon, 1 Aug 2022 22:49:19 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 1 Aug 2022 22:49:19 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 68CBA62EFF; Mon, 1 Aug 2022 17:49:18 +0300 (IDT) From: Tomer Maimon To: Subject: [PATCH linux dev-5.15 v1 2/7] iio: adc: npcm: Add NPCM8XX support Date: Mon, 1 Aug 2022 17:49:09 +0300 Message-ID: <20220801144914.126075-3-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220801144914.126075-1-tmaimon77@gmail.com> References: <20220801144914.126075-1-tmaimon77@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, joel@jms.id.au, Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Adding ADC NPCM8XX support to NPCM ADC driver. ADC NPCM8XX uses a different resolution and voltage reference. As part of adding NPCM8XX support: - Add NPCM8XX specific compatible string. - Add data to handle architecture-specific ADC parameters. Signed-off-by: Tomer Maimon --- drivers/iio/adc/npcm_adc.c | 147 ++++++++++++++++++++++--------------- 1 file changed, 87 insertions(+), 60 deletions(-) diff --git a/drivers/iio/adc/npcm_adc.c b/drivers/iio/adc/npcm_adc.c index 62c1ef40b519..d1828e6f630c 100644 --- a/drivers/iio/adc/npcm_adc.c +++ b/drivers/iio/adc/npcm_adc.c @@ -16,6 +16,16 @@ #include #include +struct npcm_adc_info { + u32 data_mask; + u32 internal_vref; + u32 res_bits; + u32 min_val; + u32 max_val; + u32 const_r1; + u32 const_r2; +}; + struct npcm_adc { u32 R05; u32 R15; @@ -36,6 +46,7 @@ struct npcm_adc { * has finished. */ struct mutex lock; + const struct npcm_adc_info *data; }; /* ADC registers */ @@ -54,49 +65,59 @@ struct npcm_adc { #define NPCM_ADCCON_CH(x) ((x) << 24) #define NPCM_ADCCON_DIV_SHIFT 1 #define NPCM_ADCCON_DIV_MASK GENMASK(8, 1) -#define NPCM_ADC_DATA_MASK(x) ((x) & GENMASK(9, 0)) #define NPCM_ADC_ENABLE (NPCM_ADCCON_ADC_EN | NPCM_ADCCON_ADC_INT_EN) -/* ADC General Definition */ -#define NPCM_RESOLUTION_BITS 10 -#define NPCM_INT_VREF_MV 2000 - /* FUSE registers */ -#define NPCM7XX_FST 0x00 -#define NPCM7XX_FADDR 0x04 -#define NPCM7XX_FDATA 0x08 -#define NPCM7XX_FCFG 0x0C -#define NPCM7XX_FCTL 0x14 +#define NPCM_FUSE_FST 0x00 +#define NPCM_FUSE_FADDR 0x04 +#define NPCM_FUSE_FDATA 0x08 +#define NPCM_FUSE_FCFG 0x0C +#define NPCM_FUSE_FCTL 0x14 /* FST Register Bits */ -#define NPCM7XX_FST_RDY BIT(0) -#define NPCM7XX_FST_RDST BIT(1) +#define NPCM_FUSE_FST_RDY BIT(0) +#define NPCM_FUSE_FST_RDST BIT(1) /* FADDR Register Bits */ -#define NPCM7XX_FADDR_BYTEADDR BIT(0) -#define NPCM7XX_FADDR_BYTEADDR_MASK GENMASK(9, 0) +#define NPCM_FUSE_FADDR_BYTEADDR BIT(0) +#define NPCM_FUSE_FADDR_BYTEADDR_MASK GENMASK(9, 0) /* FADDR Register Bits */ -#define NPCM7XX_FDATA_DATA BIT(0) -#define NPCM7XX_FDATA_CLEAN_VALUE BIT(1) -#define NPCM7XX_FDATA_DATA_MASK GENMASK(7, 0) +#define NPCM_FUSE_FDATA_DATA BIT(0) +#define NPCM_FUSE_FDATA_CLEAN_VALUE BIT(1) +#define NPCM_FUSE_FDATA_DATA_MASK GENMASK(7, 0) /* FCTL Register Bits */ -#define NPCM7XX_FCTL_RDST BIT(1) +#define NPCM_FUSE_FCTL_RDST BIT(1) /* ADC Calibration Definition */ -#define NPCM_INT_1500MV 768 -#define NPCM_INT_1000MV 512 -#define NPCM_ADC_MIN_VAL 0 -#define NPCM_ADC_MAX_VAL 1023 - #define FUSE_CALIB_ADDR 24 #define FUSE_CALIB_SIZE 8 #define DATA_CALIB_SIZE 4 #define FUSE_READ_SLEEP 500 #define FUSE_READ_TIMEOUT 1000000 +static const struct npcm_adc_info npxm7xx_adc_info = { + .data_mask = GENMASK(9, 0), + .internal_vref = 2048, + .res_bits = 10, + .min_val = 0, + .max_val = 1023, + .const_r1 = 512, + .const_r2 = 768 +}; + +static const struct npcm_adc_info npxm8xx_adc_info = { + .data_mask = GENMASK(11, 0), + .internal_vref = 1229, + .res_bits = 12, + .min_val = 0, + .max_val = 4095, + .const_r1 = 1024, + .const_r2 = 3072 +}; + #define NPCM_ADC_CHAN(ch) { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ @@ -117,36 +138,36 @@ static const struct iio_chan_spec npcm_adc_iio_channels[] = { NPCM_ADC_CHAN(7), }; -static void npcm750_fuse_read(struct regmap *fuse_regmap, u32 addr, u8 *data) +static void npcm_fuse_read(struct regmap *fuse_regmap, u32 addr, u8 *data) { u32 val; u32 fstreg; - regmap_read_poll_timeout(fuse_regmap, NPCM7XX_FST, fstreg, - fstreg & NPCM7XX_FST_RDY, FUSE_READ_SLEEP, + regmap_read_poll_timeout(fuse_regmap, NPCM_FUSE_FST, fstreg, + fstreg & NPCM_FUSE_FST_RDY, FUSE_READ_SLEEP, FUSE_READ_TIMEOUT); - regmap_write_bits(fuse_regmap, NPCM7XX_FST, - NPCM7XX_FST_RDST, NPCM7XX_FST_RDST); + regmap_write_bits(fuse_regmap, NPCM_FUSE_FST, + NPCM_FUSE_FST_RDST, NPCM_FUSE_FST_RDST); - regmap_write_bits(fuse_regmap, NPCM7XX_FADDR, - NPCM7XX_FADDR_BYTEADDR_MASK, addr); - regmap_read(fuse_regmap, NPCM7XX_FADDR, &val); - regmap_write(fuse_regmap, NPCM7XX_FCTL, NPCM7XX_FCTL_RDST); + regmap_write_bits(fuse_regmap, NPCM_FUSE_FADDR, + NPCM_FUSE_FADDR_BYTEADDR_MASK, addr); + regmap_read(fuse_regmap, NPCM_FUSE_FADDR, &val); + regmap_write(fuse_regmap, NPCM_FUSE_FCTL, NPCM_FUSE_FCTL_RDST); - regmap_read_poll_timeout(fuse_regmap, NPCM7XX_FST, fstreg, - fstreg & NPCM7XX_FST_RDY, FUSE_READ_SLEEP, + regmap_read_poll_timeout(fuse_regmap, NPCM_FUSE_FST, fstreg, + fstreg & NPCM_FUSE_FST_RDY, FUSE_READ_SLEEP, FUSE_READ_TIMEOUT); - regmap_write_bits(fuse_regmap, NPCM7XX_FST, - NPCM7XX_FST_RDST, NPCM7XX_FST_RDST); + regmap_write_bits(fuse_regmap, NPCM_FUSE_FST, + NPCM_FUSE_FST_RDST, NPCM_FUSE_FST_RDST); - regmap_read(fuse_regmap, NPCM7XX_FDATA, &val); + regmap_read(fuse_regmap, NPCM_FUSE_FDATA, &val); *data = (u8)val; - regmap_write_bits(fuse_regmap, NPCM7XX_FDATA, NPCM7XX_FDATA_DATA_MASK, - NPCM7XX_FDATA_CLEAN_VALUE); + regmap_write_bits(fuse_regmap, NPCM_FUSE_FDATA, NPCM_FUSE_FDATA_DATA_MASK, + NPCM_FUSE_FDATA_CLEAN_VALUE); } -static int npcm750_ECC_to_nibble(u8 ECC, u8 nibble) +static int npcm_ECC_to_nibble(u8 ECC, u8 nibble) { u8 nibble_b0 = (nibble >> 0) & BIT(0); u8 nibble_b1 = (nibble >> 1) & BIT(0); @@ -163,7 +184,7 @@ static int npcm750_ECC_to_nibble(u8 ECC, u8 nibble) return 0; } -static int npcm750_ECC_to_byte(u16 ECC, u8 *Byte) +static int npcm_ECC_to_byte(u16 ECC, u8 *Byte) { u8 nibble_L, nibble_H; u8 ECC_L, ECC_H; @@ -173,8 +194,8 @@ static int npcm750_ECC_to_byte(u16 ECC, u8 *Byte) ECC_L = ECC >> 0; nibble_L = ECC_L & 0x0F; - if (npcm750_ECC_to_nibble(ECC_H, nibble_H) != 0 || - npcm750_ECC_to_nibble(ECC_L, nibble_L) != 0) + if (npcm_ECC_to_nibble(ECC_H, nibble_H) != 0 || + npcm_ECC_to_nibble(ECC_L, nibble_L) != 0) return -EINVAL; *Byte = nibble_H << 4 | nibble_L << 0; @@ -182,21 +203,21 @@ static int npcm750_ECC_to_byte(u16 ECC, u8 *Byte) return 0; } -static int npcm750_read_nibble_parity(u8 *block_ECC, u8 *ADC_calib) +static int npcm_read_nibble_parity(u8 *block_ECC, u8 *ADC_calib) { int i; u16 ECC; for (i = 0; i < DATA_CALIB_SIZE; i++) { memcpy(&ECC, block_ECC + (i * 2), 2); - if (npcm750_ECC_to_byte(ECC, &ADC_calib[i]) != 0) + if (npcm_ECC_to_byte(ECC, &ADC_calib[i]) != 0) return -EINVAL; } return 0; } -static int npcm750_fuse_calibration_read(struct platform_device *pdev, +static int npcm_fuse_calibration_read(struct platform_device *pdev, struct npcm_adc *info) { struct device_node *np = pdev->dev.of_node; @@ -213,13 +234,13 @@ static int npcm750_fuse_calibration_read(struct platform_device *pdev, } while (bytes_read < FUSE_CALIB_SIZE) { - npcm750_fuse_read(fuse_regmap, addr, + npcm_fuse_read(fuse_regmap, addr, &read_buf[bytes_read]); bytes_read++; addr++; } - if (npcm750_read_nibble_parity(read_buf, (u8 *)&ADC_calib)) { + if (npcm_read_nibble_parity(read_buf, (u8 *)&ADC_calib)) { dev_warn(info->dev, "FUSE Calibration read failed\n"); return -EINVAL; } @@ -279,7 +300,8 @@ static int npcm_adc_read(struct npcm_adc *info, int *val, u8 channel) if (ret < 0) return ret; - *val = NPCM_ADC_DATA_MASK(ioread32(info->regs + NPCM_ADCDATA)); + *val = ioread32(info->regs + NPCM_ADCDATA); + *val &= info->data->data_mask; return 0; } @@ -289,22 +311,22 @@ static void npcm_adc_calibration(int *val, struct npcm_adc *info) int mul_val; int offset_val; - mul_val = NPCM_INT_1000MV * (*val - info->R15); + mul_val = info->data->const_r1 * (*val - info->R15); if (mul_val < 0) { mul_val = mul_val * -1; offset_val = DIV_ROUND_CLOSEST(mul_val, (info->R15 - info->R05)); - *val = NPCM_INT_1500MV - offset_val; + *val = info->data->const_r2 - offset_val; } else { offset_val = DIV_ROUND_CLOSEST(mul_val, (info->R15 - info->R05)); - *val = NPCM_INT_1500MV + offset_val; + *val = info->data->const_r2 + offset_val; } - if (*val < NPCM_ADC_MIN_VAL) - *val = NPCM_ADC_MIN_VAL; - if (*val > NPCM_ADC_MAX_VAL) - *val = NPCM_ADC_MAX_VAL; + if (*val < info->data->min_val) + *val = info->data->min_val; + if (*val > info->data->max_val) + *val = info->data->max_val; } static int npcm_adc_read_raw(struct iio_dev *indio_dev, @@ -334,9 +356,9 @@ static int npcm_adc_read_raw(struct iio_dev *indio_dev, vref_uv = regulator_get_voltage(info->vref); *val = vref_uv / 1000; } else { - *val = NPCM_INT_VREF_MV; + *val = info->data->internal_vref; } - *val2 = NPCM_RESOLUTION_BITS; + *val2 = info->data->res_bits; return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_SAMP_FREQ: *val = info->adc_sample_hz; @@ -353,7 +375,8 @@ static const struct iio_info npcm_adc_iio_info = { }; static const struct of_device_id npcm_adc_match[] = { - { .compatible = "nuvoton,npcm750-adc", }, + { .compatible = "nuvoton,npcm750-adc", .data = &npxm7xx_adc_info}, + { .compatible = "nuvoton,npcm845-adc", .data = &npxm8xx_adc_info}, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, npcm_adc_match); @@ -373,6 +396,10 @@ static int npcm_adc_probe(struct platform_device *pdev) return -ENOMEM; info = iio_priv(indio_dev); + info->data = device_get_match_data(dev); + if (!info->data) + return -EINVAL; + mutex_init(&info->lock); info->dev = &pdev->dev; @@ -436,7 +463,7 @@ static int npcm_adc_probe(struct platform_device *pdev) info->regs + NPCM_ADCCON); } - npcm750_fuse_calibration_read(pdev, info); + npcm_fuse_calibration_read(pdev, info); init_waitqueue_head(&info->wq); reg_con = ioread32(info->regs + NPCM_ADCCON); From patchwork Mon Aug 1 14:49:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 1662643 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LxLg30JgLz9sGP for ; Tue, 2 Aug 2022 00:51:43 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LxLg266hwz3cdB for ; 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Mon, 1 Aug 2022 22:49:19 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 1 Aug 2022 22:49:19 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 73B8363A0A; Mon, 1 Aug 2022 17:49:18 +0300 (IDT) From: Tomer Maimon To: Subject: [PATCH linux dev-5.15 v1 3/7] dt-bindings: ipmi: Add npcm845 compatible Date: Mon, 1 Aug 2022 17:49:10 +0300 Message-ID: <20220801144914.126075-4-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220801144914.126075-1-tmaimon77@gmail.com> References: <20220801144914.126075-1-tmaimon77@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, joel@jms.id.au, Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add a compatible string for Nuvoton BMC NPCM845 KCS and modify NPCM KCS description to support all NPCM BMC SoC. Signed-off-by: Tomer Maimon --- Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt b/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt index 352f5e9c759b..cbc10a68ddef 100644 --- a/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt +++ b/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt @@ -1,12 +1,13 @@ -* Nuvoton NPCM7xx KCS (Keyboard Controller Style) IPMI interface +* Nuvoton NPCM KCS (Keyboard Controller Style) IPMI interface -The Nuvoton SOCs (NPCM7xx) are commonly used as BMCs +The Nuvoton SOCs (NPCM) are commonly used as BMCs (Baseboard Management Controllers) and the KCS interface can be used to perform in-band IPMI communication with their host. Required properties: - compatible : should be one of "nuvoton,npcm750-kcs-bmc" + "nuvoton,npcm845-kcs-bmc" - interrupts : interrupt generated by the controller - kcs_chan : The KCS channel number in the controller From patchwork Mon Aug 1 14:49:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 1662641 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LxLf81c3Gz9sGP for ; Tue, 2 Aug 2022 00:50:56 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LxLf80l1Kz3bd5 for ; Tue, 2 Aug 2022 00:50:56 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=softfail (domain owner discourages use of this host) smtp.mailfrom=nuvoton.com (client-ip=212.199.177.27; helo=herzl.nuvoton.co.il; envelope-from=tomer.maimon@nuvoton.com; receiver=) Received: from herzl.nuvoton.co.il (unknown [212.199.177.27]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LxLcc1CFlz2yn5 for ; Tue, 2 Aug 2022 00:49:35 +1000 (AEST) Received: from NTILML01.nuvoton.com (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id 271EnLGu024208 for ; Mon, 1 Aug 2022 17:49:22 +0300 Received: from NTHCCAS01.nuvoton.com (10.1.8.28) by NTILML01.nuvoton.com (10.190.1.46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 1 Aug 2022 17:49:21 +0300 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCCAS01.nuvoton.com (10.1.8.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.7; Mon, 1 Aug 2022 22:49:19 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 1 Aug 2022 22:49:19 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 7FEA363A20; Mon, 1 Aug 2022 17:49:18 +0300 (IDT) From: Tomer Maimon To: Subject: [PATCH linux dev-5.15 v1 4/7] char: ipmi: modify NPCM KCS configuration Date: Mon, 1 Aug 2022 17:49:11 +0300 Message-ID: <20220801144914.126075-5-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220801144914.126075-1-tmaimon77@gmail.com> References: <20220801144914.126075-1-tmaimon77@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, joel@jms.id.au, Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Modify NPCM IPMI KCS configuration to support all NPCM BMC SoC. Signed-off-by: Tomer Maimon --- drivers/char/ipmi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/char/ipmi/Kconfig b/drivers/char/ipmi/Kconfig index 19f1efc0bc3d..644240d83809 100644 --- a/drivers/char/ipmi/Kconfig +++ b/drivers/char/ipmi/Kconfig @@ -110,7 +110,7 @@ config ASPEED_KCS_IPMI_BMC provides the access of KCS IO space for BMC side. config NPCM7XX_KCS_IPMI_BMC - depends on ARCH_NPCM7XX || COMPILE_TEST + depends on ARCH_NPCM || COMPILE_TEST select IPMI_KCS_BMC select REGMAP_MMIO tristate "NPCM7xx KCS IPMI BMC driver" From patchwork Mon Aug 1 14:49:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 1662644 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LxLgv29wtz9sGP for ; Tue, 2 Aug 2022 00:52:27 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LxLgv10Bgz3cMr for ; Tue, 2 Aug 2022 00:52:27 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=softfail (domain owner discourages use of this host) smtp.mailfrom=nuvoton.com (client-ip=212.199.177.27; helo=herzl.nuvoton.co.il; envelope-from=tomer.maimon@nuvoton.com; receiver=) Received: from herzl.nuvoton.co.il (unknown [212.199.177.27]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LxLck6ffdz305W for ; Tue, 2 Aug 2022 00:49:42 +1000 (AEST) Received: from NTILML01.nuvoton.com (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id 271EnYOw024226 for ; Mon, 1 Aug 2022 17:49:34 +0300 Received: from NTHCCAS02.nuvoton.com (10.1.9.121) by NTILML01.nuvoton.com (10.190.1.46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 1 Aug 2022 17:49:34 +0300 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCCAS02.nuvoton.com (10.1.9.121) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Mon, 1 Aug 2022 22:49:20 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 1 Aug 2022 22:49:20 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 8AC8663A21; Mon, 1 Aug 2022 17:49:18 +0300 (IDT) From: Tomer Maimon To: Subject: [PATCH linux dev-5.15 v1 5/7] spi: npcm-fiu: Modify direct read dummy configuration Date: Mon, 1 Aug 2022 17:49:12 +0300 Message-ID: <20220801144914.126075-6-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220801144914.126075-1-tmaimon77@gmail.com> References: <20220801144914.126075-1-tmaimon77@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, joel@jms.id.au, Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Modify NPCM BMC FIU direct read dummy configuration that according spi-mem direct read function. Signed-off-by: Tomer Maimon --- drivers/spi/spi-npcm-fiu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/spi/spi-npcm-fiu.c b/drivers/spi/spi-npcm-fiu.c index b62471ab6d7f..f17932e3e816 100644 --- a/drivers/spi/spi-npcm-fiu.c +++ b/drivers/spi/spi-npcm-fiu.c @@ -252,8 +252,7 @@ static void npcm_fiu_set_drd(struct npcm_fiu_spi *fiu, fiu->drd_op.addr.buswidth = op->addr.buswidth; regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, NPCM_FIU_DRD_CFG_DBW, - ((op->dummy.nbytes * ilog2(op->addr.buswidth)) / BITS_PER_BYTE) - << NPCM_FIU_DRD_DBW_SHIFT); + op->dummy.nbytes << NPCM_FIU_DRD_DBW_SHIFT); fiu->drd_op.dummy.nbytes = op->dummy.nbytes; regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, NPCM_FIU_DRD_CFG_RDCMD, op->cmd.opcode); From patchwork Mon Aug 1 14:49:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 1662640 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LxLdj2G4nz9sGP for ; Tue, 2 Aug 2022 00:50:33 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LxLdj1Qxrz3blb for ; Tue, 2 Aug 2022 00:50:33 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=softfail (domain owner discourages use of this host) smtp.mailfrom=nuvoton.com (client-ip=212.199.177.27; helo=herzl.nuvoton.co.il; envelope-from=tomer.maimon@nuvoton.com; receiver=) Received: from herzl.nuvoton.co.il (unknown [212.199.177.27]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LxLcZ19MRz2yjC for ; Tue, 2 Aug 2022 00:49:32 +1000 (AEST) Received: from NTILML01.nuvoton.com (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id 271EnM0e024220 for ; Mon, 1 Aug 2022 17:49:22 +0300 Received: from NTHCCAS03.nuvoton.com (10.1.20.28) by NTILML01.nuvoton.com (10.190.1.56) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 1 Aug 2022 17:49:22 +0300 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCCAS03.nuvoton.com (10.1.20.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.1847.3; Mon, 1 Aug 2022 22:49:20 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 1 Aug 2022 22:49:20 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 9657863A22; Mon, 1 Aug 2022 17:49:18 +0300 (IDT) From: Tomer Maimon To: Subject: [PATCH linux dev-5.15 v1 6/7] dt-binding: spi: Add npcm845 compatible to npcm-fiu document Date: Mon, 1 Aug 2022 17:49:13 +0300 Message-ID: <20220801144914.126075-7-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220801144914.126075-1-tmaimon77@gmail.com> References: <20220801144914.126075-1-tmaimon77@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, joel@jms.id.au, Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add a compatible string and description for Nuvoton BMC NPCM845 FIU. Signed-off-by: Tomer Maimon --- .../devicetree/bindings/spi/nuvoton,npcm-fiu.txt | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt index a388005842ad..c63ce4cc0a80 100644 --- a/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt +++ b/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt @@ -6,8 +6,13 @@ The NPCM7XX supports three FIU modules, FIU0 and FIUx supports two chip selects, FIU3 support four chip select. +The NPCM8XX supports four FIU modules, +FIU0 and FIUx supports two chip selects, +FIU1 and FIU3 supports four chip selects. + Required properties: - - compatible : "nuvoton,npcm750-fiu" for the NPCM7XX BMC + - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC + "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC - #address-cells : should be 1. - #size-cells : should be 0. - reg : the first contains the register location and length, @@ -30,6 +35,12 @@ Aliases: fiu1 represent fiu 3 controller fiu2 represent fiu x controller + In the NPCM8XX BMC: + fiu0 represent fiu 0 controller + fiu1 represent fiu 1 controller + fiu2 represent fiu 3 controller + fiu3 represent fiu x controller + Example: fiu3: spi@c00000000 { compatible = "nuvoton,npcm750-fiu"; From patchwork Mon Aug 1 14:49:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 1662642 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LxLfb4myLz9sGP for ; Tue, 2 Aug 2022 00:51:19 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LxLfb3fy1z30DP for ; Tue, 2 Aug 2022 00:51:19 +1000 (AEST) X-Original-To: openbmc@lists.ozlabs.org Delivered-To: openbmc@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=softfail (domain owner discourages use of this host) smtp.mailfrom=nuvoton.com (client-ip=212.199.177.27; helo=herzl.nuvoton.co.il; envelope-from=tomer.maimon@nuvoton.com; receiver=) Received: from herzl.nuvoton.co.il (unknown [212.199.177.27]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4LxLcZ0qjLz2xG5 for ; Tue, 2 Aug 2022 00:49:32 +1000 (AEST) Received: from NTILML01.nuvoton.com (ntil-fw [212.199.177.25]) by herzl.nuvoton.co.il (8.13.8/8.13.8) with ESMTP id 271EnM0d024220 for ; Mon, 1 Aug 2022 17:49:22 +0300 Received: from NTHCML01B.nuvoton.com (10.1.8.178) by NTILML01.nuvoton.com (10.190.1.46) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Mon, 1 Aug 2022 17:49:22 +0300 Received: from NTHCCAS04.nuvoton.com (10.1.8.29) by NTHCML01B.nuvoton.com (10.1.8.178) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Mon, 1 Aug 2022 22:49:20 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS04.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2176.2 via Frontend Transport; Mon, 1 Aug 2022 22:49:20 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id A0CDE63A24; Mon, 1 Aug 2022 17:49:18 +0300 (IDT) From: Tomer Maimon To: Subject: [PATCH linux dev-5.15 v1 7/7] spi: npcm-fiu: Add NPCM8XX support Date: Mon, 1 Aug 2022 17:49:14 +0300 Message-ID: <20220801144914.126075-8-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220801144914.126075-1-tmaimon77@gmail.com> References: <20220801144914.126075-1-tmaimon77@gmail.com> MIME-Version: 1.0 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, joel@jms.id.au, Tomer Maimon Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Adding FIU NPCM8XX support to NPCM FIU driver. NPCM8XX FIU supports four controllers. As part of adding NPCM8XX support: - Add NPCM8XX specific compatible string. - Using an internal burst configuration register instead of a GCR register. - Support FIU1 controller. Signed-off-by: Tomer Maimon --- drivers/spi/spi-npcm-fiu.c | 33 +++++++++++++++++++++++++++++---- 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-npcm-fiu.c b/drivers/spi/spi-npcm-fiu.c index f17932e3e816..cd11b4632f2f 100644 --- a/drivers/spi/spi-npcm-fiu.c +++ b/drivers/spi/spi-npcm-fiu.c @@ -36,6 +36,7 @@ #define NPCM_FIU_UMA_DR1 0x34 #define NPCM_FIU_UMA_DR2 0x38 #define NPCM_FIU_UMA_DR3 0x3C +#define NPCM_FIU_CFG 0x78 #define NPCM_FIU_MAX_REG_LIMIT 0x80 /* FIU Direct Read Configuration Register */ @@ -151,6 +152,9 @@ #define NPCM_FIU_UMA_DR3_RB13 GENMASK(15, 8) #define NPCM_FIU_UMA_DR3_RB12 GENMASK(7, 0) +/* FIU Configuration Register */ +#define NPCM_FIU_CFG_FIU_FIX BIT(31) + /* FIU Read Mode */ enum { DRD_SINGLE_WIRE_MODE = 0, @@ -187,6 +191,7 @@ enum { FIU0 = 0, FIU3, FIUX, + FIU1, }; struct npcm_fiu_info { @@ -201,7 +206,7 @@ struct fiu_data { int fiu_max; }; -static const struct npcm_fiu_info npxm7xx_fiu_info[] = { +static const struct npcm_fiu_info npcm7xx_fiu_info[] = { {.name = "FIU0", .fiu_id = FIU0, .max_map_size = MAP_SIZE_128MB, .max_cs = 2}, {.name = "FIU3", .fiu_id = FIU3, @@ -209,11 +214,26 @@ static const struct npcm_fiu_info npxm7xx_fiu_info[] = { {.name = "FIUX", .fiu_id = FIUX, .max_map_size = MAP_SIZE_16MB, .max_cs = 2} }; -static const struct fiu_data npxm7xx_fiu_data = { - .npcm_fiu_data_info = npxm7xx_fiu_info, +static const struct fiu_data npcm7xx_fiu_data = { + .npcm_fiu_data_info = npcm7xx_fiu_info, .fiu_max = 3, }; +static const struct npcm_fiu_info npxm8xx_fiu_info[] = { + {.name = "FIU0", .fiu_id = FIU0, + .max_map_size = MAP_SIZE_128MB, .max_cs = 2}, + {.name = "FIU3", .fiu_id = FIU3, + .max_map_size = MAP_SIZE_128MB, .max_cs = 4}, + {.name = "FIUX", .fiu_id = FIUX, + .max_map_size = MAP_SIZE_16MB, .max_cs = 2}, + {.name = "FIU1", .fiu_id = FIU1, + .max_map_size = MAP_SIZE_16MB, .max_cs = 4} }; + +static const struct fiu_data npxm8xx_fiu_data = { + .npcm_fiu_data_info = npxm8xx_fiu_info, + .fiu_max = 4, +}; + struct npcm_fiu_spi; struct npcm_fiu_chip { @@ -624,6 +644,10 @@ static int npcm_fiu_dirmap_create(struct spi_mem_dirmap_desc *desc) regmap_update_bits(gcr_regmap, NPCM7XX_INTCR3_OFFSET, NPCM7XX_INTCR3_FIU_FIX, NPCM7XX_INTCR3_FIU_FIX); + } else { + regmap_update_bits(fiu->regmap, NPCM_FIU_CFG, + NPCM_FIU_CFG_FIU_FIX, + NPCM_FIU_CFG_FIU_FIX); } if (desc->info.op_tmpl.data.dir == SPI_MEM_DATA_IN) { @@ -663,7 +687,8 @@ static const struct spi_controller_mem_ops npcm_fiu_mem_ops = { }; static const struct of_device_id npcm_fiu_dt_ids[] = { - { .compatible = "nuvoton,npcm750-fiu", .data = &npxm7xx_fiu_data }, + { .compatible = "nuvoton,npcm750-fiu", .data = &npcm7xx_fiu_data }, + { .compatible = "nuvoton,npcm845-fiu", .data = &npxm8xx_fiu_data }, { /* sentinel */ } };