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Tue, 19 Jul 2022 13:59:09 -0700 Received: from maru.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Tue, 19 Jul 2022 13:59:08 -0700 From: Jae Hyun Yoo To: Joel Stanley Subject: [PATCH u-boot v2019.04-aspeed-openbmc] mtd: spi-nor-ids: add winbond w25q512nw family support Date: Tue, 19 Jul 2022 13:58:56 -0700 Message-ID: <20220719205856.2232070-1-quic_jaehyoo@quicinc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: openbmc@lists.ozlabs.org, Graeme Gregory , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jae Hyun Yoo , Jamie Iles Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add Winbond w25q512nwq/n and w25q512nwm support. datasheet: https://www.winbond.com/resource-files/W25Q512NW%20RevB%2007192021.pdf Signed-off-by: Jae Hyun Yoo Reviewed-by: Cédric Le Goater Reviewed-by: Jagan Teki --- This is backport of 47ed8b22fd561b65e8541919becc76ab3d86f7a3 from the u-boot upstream. drivers/mtd/spi/spi-nor-ids.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 5882eab2e3fc..53e352d8656e 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -334,6 +334,16 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q512nwq", 0xef6020, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, + { + INFO("w25q512nwm", 0xef8020, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25q01jv", 0xef4021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |