From patchwork Thu Sep 14 07:17:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 813719 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nifty.com header.i=@nifty.com header.b="Tnq426NN"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xt9876PZRz9t1G for ; Thu, 14 Sep 2017 17:26:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751165AbdINH0p (ORCPT ); Thu, 14 Sep 2017 03:26:45 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:62723 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751085AbdINH0p (ORCPT ); Thu, 14 Sep 2017 03:26:45 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id v8E7I1sb020296; Thu, 14 Sep 2017 16:18:01 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com v8E7I1sb020296 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1505373482; bh=KBWfzoTWfGP7IWNZ0GJz6184N8cFoOiPUZRXD99USEg=; h=From:To:Cc:Subject:Date:From; b=Tnq426NNRa6k/h/mmKEc9C6cm/UbMx/vMEQNLaCxJz/jxEKd8Bc5NVdpgn+UVTUVg 7wDlcZwQUGzSGNuPKT444WJmjCQbcJK2mRQMkwgtvPiDJhnMJmerx/MbGbXNVqVT+Z aebAA6O8WB/djbakW9S5x+z0ayNJ4DUIMtCYNE+QyLQcdQq+VUHpAcumManNyX3JXP WEqptTtiwtI4kjCecDJz8xIohps4+rFP617fscQtuoNDMF/fWugVXz54C28Q4gBKBl dTBkVkmwNTM7/gZOK8XtrcAjoPsfXwvh2nZIqQWw7KM5YYkv9fKIADQKFvpsGHS+GS paubjiQ/4lx4A== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org Cc: Oleksij Rempel , Dinh Nguyen , Masahiro Yamada , Cyrille Pitchen , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Boris Brezillon , Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse , Rob Herring , Mark Rutland Subject: [PATCH] dt-bindings: nand: denali: reduce the register space in the example Date: Thu, 14 Sep 2017 16:17:36 +0900 Message-Id: <1505373456-24047-1-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This example allocates too much for register regions. Especially, there are only two registers in the "nand_data" interface of this hardware (ADDR: 0x00, DATA: 0x10). Signed-off-by: Masahiro Yamada Acked-by: Rob Herring --- Documentation/devicetree/bindings/mtd/denali-nand.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/denali-nand.txt b/Documentation/devicetree/bindings/mtd/denali-nand.txt index 504291d..0ee8edb 100644 --- a/Documentation/devicetree/bindings/mtd/denali-nand.txt +++ b/Documentation/devicetree/bindings/mtd/denali-nand.txt @@ -29,7 +29,7 @@ nand: nand@ff900000 { #address-cells = <1>; #size-cells = <1>; compatible = "altr,socfpga-denali-nand"; - reg = <0xff900000 0x100000>, <0xffb80000 0x10000>; + reg = <0xff900000 0x20>, <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; interrupts = <0 144 4>; };