From patchwork Thu Feb 22 18:31:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 876797 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3znNKG4FsYz9sW9 for ; Fri, 23 Feb 2018 05:33:37 +1100 (AEDT) Received: from localhost ([::1]:40368 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eovgU-0004fB-T5 for incoming@patchwork.ozlabs.org; Thu, 22 Feb 2018 13:33:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49299) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eovfW-0004eO-RN for qemu-devel@nongnu.org; Thu, 22 Feb 2018 13:32:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eovfU-0005up-IW for qemu-devel@nongnu.org; Thu, 22 Feb 2018 13:32:34 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:36826 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eovfU-0005sp-9q for qemu-devel@nongnu.org; Thu, 22 Feb 2018 13:32:32 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id DAD851A226E; Thu, 22 Feb 2018 19:32:06 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id B50D11A22A1; Thu, 22 Feb 2018 19:32:06 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Thu, 22 Feb 2018 19:31:43 +0100 Message-Id: <1519324303-5674-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519324303-5674-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1519324303-5674-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v2 6/6] target/mips: introduce MTTCG-enabled builds X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Petar Jovanovic , Fam Zheng , Aleksandar Markovic , Raghu Gandham , Yongbok Kim , Riku Voipio , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Gerd Hoffmann , Goran Ferenc , Paolo Bonzini , Miodrag Dinic , =?utf-8?q?Alex_Benn=C3=A9e?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Aleksandar Markovic Introduce MTTCG-enabled QEMU builds for mips32, mipsn32, and mips64. Signed-off-by: Miodrag Dinic Signed-off-by: Aleksandar Markovic Reviewed-by: Alex Bennée --- configure | 3 +++ target/mips/cpu.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configure b/configure index ed45a3c..9b338dd 100755 --- a/configure +++ b/configure @@ -6735,16 +6735,19 @@ case "$target_name" in bflt="yes" ;; mips|mipsel) + mttcg="yes" TARGET_ARCH=mips echo "TARGET_ABI_MIPSO32=y" >> $config_target_mak ;; mipsn32|mipsn32el) + mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips echo "TARGET_ABI_MIPSN32=y" >> $config_target_mak echo "TARGET_ABI32=y" >> $config_target_mak ;; mips64|mips64el) + mttcg="yes" TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips echo "TARGET_ABI_MIPSN64=y" >> $config_target_mak diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 3fa85b0..8f41952 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -11,6 +11,8 @@ #include "exec/cpu-defs.h" #include "fpu/softfloat.h" +#define TCG_GUEST_DEFAULT_MO (0) + struct CPUMIPSState; typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;