From patchwork Tue Apr 5 21:55:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 1613594 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=nextmovesoftware.com header.i=@nextmovesoftware.com header.a=rsa-sha256 header.s=default header.b=Wm2HHDsV; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KY1gK0lrTz9sBy for ; Wed, 6 Apr 2022 07:56:11 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B1BC93857018 for ; Tue, 5 Apr 2022 21:56:07 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id 7DC063858D37 for ; Tue, 5 Apr 2022 21:55:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7DC063858D37 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=31W2zQk+FgEgM+WmJhKutjEHZJTb1h6u0csSEnsxd/k=; b=Wm2HHDsV4ZFGHHxZsUwLDMFHA1 Ykh4mnAAC0V3SRNv45Ph252BMjmjo+3e4whtkeUxXmntswfleEEpnzLHFxqxb8axqycBslplUAbNe /mr/vz7tzpO6zw43CamJ5ea6nLhSRZB+DMXHkpBC39F+HtS1iTsv0jpP35bWYJKur+1WYX6BfHmTu NX+kdyVofq/su/oYmbJautLx5RJP5zCIhnWeuqb2q2X0kCZ0IHv6Adiu549S6+xE0zMsoza0zYvME MicbFpiXKVsjjURETHkkkHUkUsSVczwCcPoqUW6zrLDgEPpL2x95HJpB6yWgp25mCzIwhCm4n4tAh hWc8JbfQ==; Received: from host109-151-117-89.range109-151.btcentralplus.com ([109.151.117.89]:62977 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nbr9X-0000C4-0W; Tue, 05 Apr 2022 17:55:55 -0400 From: "Roger Sayle" To: Subject: [x86_64 PATCH] Support pandn for V1TI mode (i.e. *andnotv1ti3). Date: Tue, 5 Apr 2022 22:55:53 +0100 Message-ID: <009301d84937$ecde2500$c69a6f00$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdhJNerWQ0PeFWSjTcyJXZq3xpW9dw== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, HTML_MESSAGE, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-Content-Filtered-By: Mailman/MimeDel 2.1.29 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" This simple patch allows the i386 backend to generate pandn instructions for V1TI mode. Currently, the testcase: typedef unsigned __int128 v1ti __attribute__ ((__vector_size__ (16))); v1ti andnot1(v1ti x, v1ti y) { return ~x & y; } generates with -O2 pcmpeqd %xmm2, %xmm2 pxor %xmm2, %xmm0 pand %xmm1, %xmm0 ret with this patch, we now generate: pandn %xmm1, %xmm0 ret It turns out that there are currently three (near) duplicates of the logic for andn/pandn/vandn/vpandn in i386/sse.md: one for floating point vectors (MODEF), one for integer vectors (VI) and a third for TFmode. Rather than introduce a fourth copy, this patch introduces a new mode iterator to share/reuse the TFmode define_insn to also handle V1TI. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check with no new failures. Ok for mainline? 2022-04-05 Roger Sayle gcc/ChangeLog * config/i386/sse.md (ANDNOT_MODE): New mode iterator for TF and V1TI. (*andnottf3): Replace with... (*andnot3): New define_insn using ANDNOT_MODE. gcc/testsuite/ChangeLog * gcc.target/i386/sse2-v1ti-andnot.c: New test case. Thanks in advance, Roger diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 1f9c496..a852c16 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4923,11 +4923,14 @@ ] (const_string "")))]) -(define_insn "*andnottf3" - [(set (match_operand:TF 0 "register_operand" "=x,x,v,v") - (and:TF - (not:TF (match_operand:TF 1 "register_operand" "0,x,v,v")) - (match_operand:TF 2 "vector_operand" "xBm,xm,vm,v")))] +;; Modes for andnot3 not covered by VI and MODEF. +(define_mode_iterator ANDNOT_MODE [TF V1TI]) + +(define_insn "*andnot3" + [(set (match_operand:ANDNOT_MODE 0 "register_operand" "=x,x,v,v") + (and:ANDNOT_MODE + (not:ANDNOT_MODE (match_operand:ANDNOT_MODE 1 "register_operand" "0,x,v,v")) + (match_operand:ANDNOT_MODE 2 "vector_operand" "xBm,xm,vm,v")))] "TARGET_SSE" { char buf[128]; diff --git a/gcc/testsuite/gcc.target/i386/sse2-v1ti-andnot.c b/gcc/testsuite/gcc.target/i386/sse2-v1ti-andnot.c new file mode 100644 index 0000000..ae4cb02 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/sse2-v1ti-andnot.c @@ -0,0 +1,11 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -msse2" } */ + +typedef __int128 v1ti __attribute__ ((__vector_size__ (16))); + +v1ti andnot1(v1ti x, v1ti y) { return ~x & y; } +v1ti andnot2(v1ti x, v1ti y) { return x & ~y; } + +/* { dg-final { scan-assembler-times "pandn" 2 } } */ +/* { dg-final { scan-assembler-not "pcmpeqd" } } */ +/* { dg-final { scan-assembler-not "pxor" } } */