From patchwork Tue Mar 8 01:53:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602683 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=s4EPNfou; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJWB4M6Kz9sGC for ; Tue, 8 Mar 2022 13:02:46 +1100 (AEDT) Received: from localhost ([::1]:57556 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPBU-00031u-DF for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:02:44 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54500) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP37-0005yl-RB for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:05 -0500 Received: from [2607:f8b0:4864:20::1033] (port=35665 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP35-0007sB-Vi for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:05 -0500 Received: by mail-pj1-x1033.google.com with SMTP id mg21-20020a17090b371500b001bef9e4657cso934687pjb.0 for ; Mon, 07 Mar 2022 17:54:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KtJ1WVyADzX2ANKzcizHx7LgtBfPM0zU79D8VSBbj0k=; b=s4EPNfou54vFyO0+1hChsqhf8BJmA5RXbVlNQfU+zYejEU9If0DlvRMpLcVZmb+TY8 6RlHIoz+a4rSOE17jz3rX9vA54a5bRvbLWzyDEwRXbak+au2sKuxuEIAMWnyGmX2F7Y/ otDneaWUV7ygcMp7a1pOWXFCrOyOVxM+r1Zk6nGd56P1QZz31PzrB6bU/YG303Ys9+0M RggnHr8UfqSXR1HF6PsLhq8krd2YBT/dQhjMksRVwA7Eh6QQD1NX2kKUy3BHAZge+euL PCaBkc2iAyu/11VAho4Ydtp+dpSG2SDg8oAqUKo1390IPMx2K3FCbZmbCR/O3Z2KhqJr 60sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KtJ1WVyADzX2ANKzcizHx7LgtBfPM0zU79D8VSBbj0k=; b=I12ztX5AojfTRA8BPZbQEJ19ICd3ReSSkWRSB2M2/DavSKaykqiLE7MR9KAHUjKvzk HAvCqFOA+cCyTrEnkna12B5g1JkSvMwodZxkz5oD2q4WjiwOjOintRF4LiSropHlk7is YSXjQD395K12ZYRVDPWKAWXEYrL6ky7T3jSuR1h8ZbtYr3fv8Kqw4LuuIbyCaYHBYQNO 0WzRYeaT322RuzGhP/EbS702IN/wmnnb/81KuGp64U6Xis1KdgJIrVeMsiN3YdKBhs47 pNzgBumBBUd3OHOVV+EAa1054gfcTmkOmH/AFKuE84OrJjKl4NuwzXDpGdIbf8qNHYBe 32PQ== X-Gm-Message-State: AOAM530g6M6VJjaVYufj4W+NLWXNFoNPcEDEuBIoUKrcLjOP2TkYuiHr 3EO9LquLiD5qtLzbVUkJyqL5tExtgwq7JQ== X-Google-Smtp-Source: ABdhPJxqxyWsdpZ5QqnLQfP/7xqsv6wL/zIWRRV4n5gsJexa26tbZgHlX7FYbhAvwzYfquKCBuaLSg== X-Received: by 2002:a17:902:d2ce:b0:150:19a9:d171 with SMTP id n14-20020a170902d2ce00b0015019a9d171mr15147623plc.155.1646704442660; Mon, 07 Mar 2022 17:54:02 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:02 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/11] tcg: Implement tcg_gen_{h,w}swap_{i32,i64} Date: Mon, 7 Mar 2022 15:53:48 -1000 Message-Id: <20220308015358.188499-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Swap half-words (16-bit) and words (32-bit) within a larger value. Mirrors functions of the same names within include/qemu/bitops.h. Signed-off-by: Richard Henderson Reviewed-by: David Hildenbrand --- include/tcg/tcg-op.h | 6 ++++++ tcg/tcg-op.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/include/tcg/tcg-op.h b/include/tcg/tcg-op.h index caa0a63612..b09b8b4a05 100644 --- a/include/tcg/tcg-op.h +++ b/include/tcg/tcg-op.h @@ -332,6 +332,7 @@ void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int flags); void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg); +void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2); void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2); void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2); @@ -531,6 +532,8 @@ void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg, int flags); void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags); void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg); +void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg); +void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg); void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2); @@ -1077,6 +1080,8 @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t); #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64 #define tcg_gen_bswap_tl tcg_gen_bswap64_i64 +#define tcg_gen_hswap_tl tcg_gen_hswap_i64 +#define tcg_gen_wswap_tl tcg_gen_wswap_i64 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64 #define tcg_gen_andc_tl tcg_gen_andc_i64 @@ -1192,6 +1197,7 @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t); #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32 #define tcg_gen_bswap32_tl(D, S, F) tcg_gen_bswap32_i32(D, S) #define tcg_gen_bswap_tl tcg_gen_bswap32_i32 +#define tcg_gen_hswap_tl tcg_gen_hswap_i32 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32 #define tcg_gen_andc_tl tcg_gen_andc_i32 diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 65e1c94c2d..379adb4b9f 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -1056,6 +1056,12 @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg) } } +void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg) +{ + /* Swapping 2 16-bit elements is a rotate. */ + tcg_gen_rotli_i32(ret, arg, 16); +} + void tcg_gen_smin_i32(TCGv_i32 ret, TCGv_i32 a, TCGv_i32 b) { tcg_gen_movcond_i32(TCG_COND_LT, ret, a, b, a, b); @@ -1792,6 +1798,30 @@ void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg) } } +void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg) +{ + uint64_t m = 0x0000ffff0000ffffull; + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + + /* See include/qemu/bitops.h, hswap64. */ + tcg_gen_rotli_i64(t1, arg, 32); + tcg_gen_andi_i64(t0, t1, m); + tcg_gen_shri_i64(t1, t1, 16); + tcg_gen_shli_i64(t0, t0, 16); + tcg_gen_andi_i64(t1, t1, m); + tcg_gen_or_i64(ret, t0, t1); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); +} + +void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg) +{ + /* Swapping 2 32-bit elements is a rotate. */ + tcg_gen_rotli_i64(ret, arg, 32); +} + void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg) { if (TCG_TARGET_REG_BITS == 32) { From patchwork Tue Mar 8 01:53:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602692 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=iC8NwRV+; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJfm49dhz9sGC for ; Tue, 8 Mar 2022 13:09:20 +1100 (AEDT) Received: from localhost ([::1]:49098 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPHq-0007yM-Kz for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:09:18 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54532) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP39-00064Z-6E for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:07 -0500 Received: from [2607:f8b0:4864:20::631] (port=37642 helo=mail-pl1-x631.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP37-0007sZ-Dh for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:06 -0500 Received: by mail-pl1-x631.google.com with SMTP id n2so6196299plf.4 for ; Mon, 07 Mar 2022 17:54:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=s4dZmbRh2Z7b/qkwNBn40zKvQk9ZYcdX9O2tzQ7T6K4=; b=iC8NwRV+KrprasLje1YnlduBkFtpcDGKHzBOlkmJLRERN/FwRAspw1Evkt3szM0JgO OPMzxzuPKqrcHfJV7jhPsOPLx8OYAltmiI2kMbIV1aZjhFvJD2FMdgjWHQI1l4f5bsU8 zN82HSyZVEp3lvUNXTi4ffqze76KgpE5G53AHsWJeKsem9FtNBjVNZNw1U6TquR4EiBs 7grlHcUMAlJoVXAyid/oCNDhC9dbKXzkrcfXSr5+1XyUEcmnQHSTREeShXumsZNwGRsP tyGppmGQXMyTh0ThFDCOSXG2qNktkIA3eFbm+4C0a53hn2HM0dwLcZNHHpQvGifLyw11 T4Tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=s4dZmbRh2Z7b/qkwNBn40zKvQk9ZYcdX9O2tzQ7T6K4=; b=J4vjACuE/aWRyKOOO5NkyjYvC3t5yh26WLHPDezS7mUeULHD7f8hAoL/7RzAJFn7Hj snkNaJ9gtWTHNMeYPiD6PbvuQwxayekamKVw5Kfye+v2Ax6K8jHlSDq6zKomMP+1hR9z bWFgIB0XDP4vbHAxm2Nu3DsCcvpCOUAOQpe0OHcl1XwjCWq9R834k9kW4aXCwMUXP86/ QbCz9LioX88iKKvZyLn5B1I70RzAOEoVTCNoIeodTW+i6NLhXAL9TVlfAn3SCDc3LcRc +FXklVP39BlemuprJvbVeJQZg9TPBNhjGaVuXIZVK7rF9o3I6KUVBQr/Ox1ygby1xezE 6wew== X-Gm-Message-State: AOAM532xfSUbIFz4nRkRtAEKHgIICrwhha+IwALiLg4f5TwSUNJD4Ryy SWZ52xy9Whek07DilYtggrdBzWJv6t2BXA== X-Google-Smtp-Source: ABdhPJwciqXlGA7MWlfV9AC5YZz3jI+QO6lwpIpVGvEuMCEiG8eqtegrLDVvYW5ZXhXrRZ2f3lMlJA== X-Received: by 2002:a17:902:ccc1:b0:151:fbe6:4982 with SMTP id z1-20020a170902ccc100b00151fbe64982mr2265196ple.124.1646704444099; Mon, 07 Mar 2022 17:54:04 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:03 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 02/11] target/s390x: vxeh2: vector convert short/32b Date: Mon, 7 Mar 2022 15:53:49 -1000 Message-Id: <20220308015358.188499-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::631 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller Signed-off-by: David Miller Reviewed-by: Richard Henderson Message-Id: <20220307020327.3003-2-dmiller423@gmail.com> Signed-off-by: Richard Henderson Reviewed-by: David Hildenbrand --- target/s390x/helper.h | 4 +++ target/s390x/tcg/vec_fpu_helper.c | 31 ++++++++++++++++++++ target/s390x/tcg/translate_vx.c.inc | 44 ++++++++++++++++++++++++++--- 3 files changed, 75 insertions(+), 4 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 69f69cf718..7cbcbd7f0b 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -275,6 +275,10 @@ DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32 DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32) DEF_HELPER_FLAGS_5(gvec_vfche128, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) DEF_HELPER_5(gvec_vfche128_cc, void, ptr, cptr, cptr, env, i32) +DEF_HELPER_FLAGS_4(gvec_vcdg32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) +DEF_HELPER_FLAGS_4(gvec_vcdlg32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) +DEF_HELPER_FLAGS_4(gvec_vcgd32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) +DEF_HELPER_FLAGS_4(gvec_vclgd32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) diff --git a/target/s390x/tcg/vec_fpu_helper.c b/target/s390x/tcg/vec_fpu_helper.c index 1a77993471..6834dbc540 100644 --- a/target/s390x/tcg/vec_fpu_helper.c +++ b/target/s390x/tcg/vec_fpu_helper.c @@ -176,6 +176,30 @@ static void vop128_2(S390Vector *v1, const S390Vector *v2, CPUS390XState *env, *v1 = tmp; } +static float32 vcdg32(float32 a, float_status *s) +{ + return int32_to_float32(a, s); +} + +static float32 vcdlg32(float32 a, float_status *s) +{ + return uint32_to_float32(a, s); +} + +static float32 vcgd32(float32 a, float_status *s) +{ + const float32 tmp = float32_to_int32(a, s); + + return float32_is_any_nan(a) ? INT32_MIN : tmp; +} + +static float32 vclgd32(float32 a, float_status *s) +{ + const float32 tmp = float32_to_uint32(a, s); + + return float32_is_any_nan(a) ? 0 : tmp; +} + static float64 vcdg64(float64 a, float_status *s) { return int64_to_float64(a, s); @@ -211,6 +235,9 @@ void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, CPUS390XState *env, \ vop##BITS##_2(v1, v2, env, se, XxC, erm, FN, GETPC()); \ } +#define DEF_GVEC_VOP2_32(NAME) \ +DEF_GVEC_VOP2_FN(NAME, NAME##32, 32) + #define DEF_GVEC_VOP2_64(NAME) \ DEF_GVEC_VOP2_FN(NAME, NAME##64, 64) @@ -219,6 +246,10 @@ DEF_GVEC_VOP2_FN(NAME, float32_##OP, 32) \ DEF_GVEC_VOP2_FN(NAME, float64_##OP, 64) \ DEF_GVEC_VOP2_FN(NAME, float128_##OP, 128) +DEF_GVEC_VOP2_32(vcdg) +DEF_GVEC_VOP2_32(vcdlg) +DEF_GVEC_VOP2_32(vcgd) +DEF_GVEC_VOP2_32(vclgd) DEF_GVEC_VOP2_64(vcdg) DEF_GVEC_VOP2_64(vcdlg) DEF_GVEC_VOP2_64(vcgd) diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index 98eb7710a4..ea28e40d4f 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -2720,23 +2720,59 @@ static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o) switch (s->fields.op2) { case 0xc3: - if (fpf == FPF_LONG) { + switch (fpf) { + case FPF_LONG: fn = gen_helper_gvec_vcdg64; + break; + case FPF_SHORT: + if (s390_has_feat(S390_FEAT_VECTOR_ENH2)) { + fn = gen_helper_gvec_vcdg32; + } + break; + default: + break; } break; case 0xc1: - if (fpf == FPF_LONG) { + switch (fpf) { + case FPF_LONG: fn = gen_helper_gvec_vcdlg64; + break; + case FPF_SHORT: + if (s390_has_feat(S390_FEAT_VECTOR_ENH2)) { + fn = gen_helper_gvec_vcdlg32; + } + break; + default: + break; } break; case 0xc2: - if (fpf == FPF_LONG) { + switch (fpf) { + case FPF_LONG: fn = gen_helper_gvec_vcgd64; + break; + case FPF_SHORT: + if (s390_has_feat(S390_FEAT_VECTOR_ENH2)) { + fn = gen_helper_gvec_vcgd32; + } + break; + default: + break; } break; case 0xc0: - if (fpf == FPF_LONG) { + switch (fpf) { + case FPF_LONG: fn = gen_helper_gvec_vclgd64; + break; + case FPF_SHORT: + if (s390_has_feat(S390_FEAT_VECTOR_ENH2)) { + fn = gen_helper_gvec_vclgd32; + } + break; + default: + break; } break; case 0xc7: From patchwork Tue Mar 8 01:53:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602694 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=VzhhisMU; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJjG03PLz9sGC for ; Tue, 8 Mar 2022 13:11:29 +1100 (AEDT) Received: from localhost ([::1]:55072 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPJv-0003dl-CH for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:11:27 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54570) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3A-0006B2-PT for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:08 -0500 Received: from [2607:f8b0:4864:20::102d] (port=55158 helo=mail-pj1-x102d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP38-0007sw-QU for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:08 -0500 Received: by mail-pj1-x102d.google.com with SMTP id b8so15748085pjb.4 for ; Mon, 07 Mar 2022 17:54:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QDkABqIBPeYpg9kxXDjVZpJ986dx2Kmaj4E006oxpws=; b=VzhhisMUa4I7mhf6PnkNk1LAGbjSYA2mABFRJHJcrkl7CoN4ME6KUntQyTrhBKAjCb ATneXwx3kJD5SaPS4lN2/mk72QmG5Tr4i1a9GKbBEl65nlAQTrAee6JDJF/igPloMOlw O5OB3LOT4hvs1e476z91R5cc5HhObire/H2KIm3jwTo8Af9KLBoxqfajHo5Gaw+Pnysf PJ7lYhI43W92JgQlRHmFEsofl9xv3XmASuDJqvZw7nDoyklhSykS5nZix9IYOfFcPjHY CmuXaw8tKQ64n+ZYTRWVn8ckXp2bXCpATFv5r6UGZixu3R398C4ZUEocwBmjGDamctQ3 qCKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QDkABqIBPeYpg9kxXDjVZpJ986dx2Kmaj4E006oxpws=; b=52eY89tcjEsnQ3oyjOwZ8XR9rmp3y4Fwg/hn9AjUns1Us4VXlc6UmduIR/fU7aXEEb iCVMAPVyj7QpePQGmrINFUB31+FsxcDXTTB6n2tRzozaWOp9zTZl69DUTL+mm12rCOgz ho3HiMlQ5lhyHa7BWgqazr54mwlGx+citwFcv5H+gYv0woPi3BN6Yocm9FK1MOOL1+lD FwAzeZRIyaWdcAiArnyCtLx+afX5WXcU71DJLPwAyAaVOMxrdYQpyUBAAAljQix2FpA5 8LTqvTsA8CgFztXbKqaECHLOXvhpZd5UuqWYk6y5Mipajpy92DtBqWmGM1shEeehm5NT SrKg== X-Gm-Message-State: AOAM533DdJ/w078uSpMmV8wXWCh9K8tq9YQrcHj63wB5L2l/fvnIo5o8 jo2OpMZOy7rXExPCRN0lwRy8iL/k9UhTfg== X-Google-Smtp-Source: ABdhPJwTgjx0hwxOdXfxDEl8M0+KafxN28LNpMjM9pt1Z0wtsdMmnItKQ1vDMj308pZHMlHSD51J7Q== X-Received: by 2002:a17:90b:3807:b0:1bf:6c8e:f9b7 with SMTP id mq7-20020a17090b380700b001bf6c8ef9b7mr2106123pjb.16.1646704445414; Mon, 07 Mar 2022 17:54:05 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:05 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 03/11] target/s390x: vxeh2: vector string search Date: Mon, 7 Mar 2022 15:53:50 -1000 Message-Id: <20220308015358.188499-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102d (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller Signed-off-by: David Miller Message-Id: <20220307020327.3003-3-dmiller423@gmail.com> [rth: Rewrite helpers; fix validation of m6.] Signed-off-by: Richard Henderson --- The substring search was incorrect, in that it didn't properly restart the search when a match failed. Split the helper into multiple, so that the memory accesses can be optimized. --- target/s390x/helper.h | 6 ++ target/s390x/tcg/translate.c | 3 +- target/s390x/tcg/vec_string_helper.c | 101 +++++++++++++++++++++++++++ target/s390x/tcg/translate_vx.c.inc | 26 +++++++ target/s390x/tcg/insn-data.def | 2 + 5 files changed, 137 insertions(+), 1 deletion(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 7cbcbd7f0b..7412130883 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -246,6 +246,12 @@ DEF_HELPER_6(gvec_vstrc_cc32, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_6(gvec_vstrc_cc_rt8, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_6(gvec_vstrc_cc_rt16, void, ptr, cptr, cptr, cptr, env, i32) DEF_HELPER_6(gvec_vstrc_cc_rt32, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_6(gvec_vstrs_8, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_6(gvec_vstrs_16, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_6(gvec_vstrs_32, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_6(gvec_vstrs_zs8, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_6(gvec_vstrs_zs16, void, ptr, cptr, cptr, cptr, env, i32) +DEF_HELPER_6(gvec_vstrs_zs32, void, ptr, cptr, cptr, cptr, env, i32) /* === Vector Floating-Point Instructions */ DEF_HELPER_FLAGS_5(gvec_vfa32, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 904b51542f..d9ac29573d 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6222,7 +6222,8 @@ enum DisasInsnEnum { #define FAC_PCI S390_FEAT_ZPCI /* z/PCI facility */ #define FAC_AIS S390_FEAT_ADAPTER_INT_SUPPRESSION #define FAC_V S390_FEAT_VECTOR /* vector facility */ -#define FAC_VE S390_FEAT_VECTOR_ENH /* vector enhancements facility 1 */ +#define FAC_VE S390_FEAT_VECTOR_ENH /* vector enhancements facility 1 */ +#define FAC_VE2 S390_FEAT_VECTOR_ENH2 /* vector enhancements facility 2 */ #define FAC_MIE2 S390_FEAT_MISC_INSTRUCTION_EXT2 /* miscellaneous-instruction-extensions facility 2 */ #define FAC_MIE3 S390_FEAT_MISC_INSTRUCTION_EXT3 /* miscellaneous-instruction-extensions facility 3 */ diff --git a/target/s390x/tcg/vec_string_helper.c b/target/s390x/tcg/vec_string_helper.c index ac315eb095..6c0476ecc1 100644 --- a/target/s390x/tcg/vec_string_helper.c +++ b/target/s390x/tcg/vec_string_helper.c @@ -471,3 +471,104 @@ void HELPER(gvec_vstrc_cc_rt##BITS)(void *v1, const void *v2, const void *v3, \ DEF_VSTRC_CC_RT_HELPER(8) DEF_VSTRC_CC_RT_HELPER(16) DEF_VSTRC_CC_RT_HELPER(32) + +static int vstrs(S390Vector *v1, const S390Vector *v2, const S390Vector *v3, + const S390Vector *v4, uint8_t es, bool zs) +{ + int substr_elen, substr_0, str_elen, i, j, k, cc; + int nelem = 16 >> es; + bool eos = false; + + substr_elen = s390_vec_read_element8(v4, 7) >> es; + + /* If ZS, bound substr length by min(nelem, strlen(v3)). */ + if (zs) { + int i; + for (i = 0; i < nelem; i++) { + if (s390_vec_read_element(v3, i, es) == 0) { + break; + } + } + if (i < substr_elen) { + substr_elen = i; + } + } + + if (substr_elen == 0) { + cc = 2; /* full match for degenerate case of empty substr */ + k = 0; + goto done; + } + + /* If ZS, look for eos in the searched string. */ + if (zs) { + for (k = 0; k < nelem; k++) { + if (s390_vec_read_element(v2, k, es) == 0) { + eos = true; + break; + } + } + str_elen = k; + } else { + str_elen = nelem; + } + + substr_0 = s390_vec_read_element(v3, 0, es); + + for (k = 0; ; k++) { + for (; k < str_elen; k++) { + if (s390_vec_read_element(v2, k, es) == substr_0) { + break; + } + } + + /* If we reached the end of the string, no match. */ + if (k == str_elen) { + cc = eos; /* no match (with or without zero char) */ + goto done; + } + + /* If the substring is only one char, match. */ + if (substr_elen == 1) { + cc = 2; /* full match */ + goto done; + } + + /* If the match begins at the last char, we have a partial match. */ + if (k == str_elen - 1) { + cc = 3; /* partial match */ + goto done; + } + + i = MIN(nelem, k + substr_elen); + for (j = k + 1; j < i; j++) { + uint32_t e2 = s390_vec_read_element(v2, j, es); + uint32_t e3 = s390_vec_read_element(v3, j - k, es); + if (e2 != e3) { + break; + } + } + if (j == i) { + /* Matched up until "end". */ + cc = i - k == substr_elen ? 2 : 3; /* full or partial match */ + goto done; + } + } + + done: + s390_vec_write_element64(v1, 0, k << es); + s390_vec_write_element64(v1, 1, 0); + return cc; +} + +#define DEF_VSTRS_HELPER(BITS) \ +void QEMU_FLATTEN HELPER(gvec_vstrs_##BITS)(void *v1, const void *v2, \ + const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) \ + { env->cc_op = vstrs(v1, v2, v3, v4, MO_##BITS, false); } \ +void QEMU_FLATTEN HELPER(gvec_vstrs_zs##BITS)(void *v1, const void *v2, \ + const void *v3, const void *v4, CPUS390XState *env, uint32_t desc) \ + { env->cc_op = vstrs(v1, v2, v3, v4, MO_##BITS, true); } + +DEF_VSTRS_HELPER(8) +DEF_VSTRS_HELPER(16) +DEF_VSTRS_HELPER(32) diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index ea28e40d4f..d514e8b218 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -2497,6 +2497,32 @@ static DisasJumpType op_vstrc(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType op_vstrs(DisasContext *s, DisasOps *o) +{ + typedef void (*helper_vstrs)(TCGv_ptr, TCGv_ptr, TCGv_ptr, + TCGv_ptr, TCGv_ptr, TCGv_i32); + static const helper_vstrs fns[3][2] = { + { gen_helper_gvec_vstrs_8, gen_helper_gvec_vstrs_zs8 }, + { gen_helper_gvec_vstrs_16, gen_helper_gvec_vstrs_zs16 }, + { gen_helper_gvec_vstrs_32, gen_helper_gvec_vstrs_zs32 }, + }; + + const uint8_t m5 = get_field(s, m5); + const uint8_t m6 = get_field(s, m6); + bool zs = m6 & 2; + + if (m5 > ES_32 || m6 & ~2) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + gen_gvec_4_ptr(get_field(s, v1), get_field(s, v2), + get_field(s, v3), get_field(s, v4), + cpu_env, 0, fns[m5][zs]); + set_cc_static(s); + return DISAS_NEXT; +} + static DisasJumpType op_vfa(DisasContext *s, DisasOps *o) { const uint8_t fpf = get_field(s, m4); diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def index 6c8a8b229f..46add91a0e 100644 --- a/target/s390x/tcg/insn-data.def +++ b/target/s390x/tcg/insn-data.def @@ -1246,6 +1246,8 @@ F(0xe75c, VISTR, VRR_a, V, 0, 0, 0, 0, vistr, 0, IF_VEC) /* VECTOR STRING RANGE COMPARE */ F(0xe78a, VSTRC, VRR_d, V, 0, 0, 0, 0, vstrc, 0, IF_VEC) +/* VECTOR STRING SEARCH */ + F(0xe78b, VSTRS, VRR_d, VE2, 0, 0, 0, 0, vstrs, 0, IF_VEC) /* === Vector Floating-Point Instructions */ From patchwork Tue Mar 8 01:53:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602679 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XMtOxnxC; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJPm3gjSz9sGC for ; Tue, 8 Mar 2022 12:58:04 +1100 (AEDT) Received: from localhost ([::1]:48154 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRP6w-000504-B2 for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 20:58:02 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54602) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3C-0006GD-7f for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:10 -0500 Received: from [2607:f8b0:4864:20::1031] (port=37692 helo=mail-pj1-x1031.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3A-0007u7-8N for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:09 -0500 Received: by mail-pj1-x1031.google.com with SMTP id p3-20020a17090a680300b001bbfb9d760eso884843pjj.2 for ; Mon, 07 Mar 2022 17:54:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AIkDrKPjIFQDWf/u9lIIkn47c2ajCrHecdrKXw/wTUs=; b=XMtOxnxCfoAL6ctEmMoUTRHa92xlDq0Tg8ZrK64FoRC/5kUa8JMs/Ml9qXkSKYp9+C uDQkU/cFGq31ClH2Tl6vDsjFFsv8MI86MeVtjdaWEw2qANdhUgUZG1MVhD92X5aMQs9r LGuKrXvI13Pupr5+3kVBE191snMLP90gLgsS88V2Q+Jy8KRnJbxWGf4iH/CmoLvVZaDZ i4LZbKxmV7me3rMsg8FLnkMKyzXWrZ1qr1znSqND7S96rdsm64OeMAFY8gIYRFwscTdz J59gpPLcI0T5sW2DKuhKDXKLDfVKNXJGXF+5Z2NcDb+s5fu+MpM4Ss6reVyvffCfMpVh FBcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AIkDrKPjIFQDWf/u9lIIkn47c2ajCrHecdrKXw/wTUs=; b=S+MXyEkJgXXzp//wfQksm7NzzXnmHsJWSlOxMyHzheOvrhuvzVYly+d3RucXJIujcE QN0N2dXzlnvE9Y+rG/z6rTbtVDsS+HDGc4I8ZBxhxDc5A/dRBFbmvGuOrspHUSxUHMSk VEn44/zVqzhzGVZAdEpYt91SeX77HARbXk0yvx4VximBXj7LaPw3ZRKvKoX3AYAjUYF1 Mkw6pY8EWE87NiW1z6ulFBhWiG4PiFIDExV2VSIopkL5IXYq7KagrfxFKQQYhet8cIns LCAkvXYairUjztesQjLx6C3nC2u3UC3Tl6SBFrpgyo1tg63gfv3QXp02pAALnei8AzJu EaUA== X-Gm-Message-State: AOAM531DnAvyFO5Iuvf70UzciCElnBGXVyXC/SpYyOx+UhK+48T6itT2 6ZVPY6goxJvEHd29mAGK01eKQWNiK25y5g== X-Google-Smtp-Source: ABdhPJy7nN40LFO/tN7tDtBkx7FSXCIHR4iCWqKhLa+PTcULJ1fIC7MrO2GoJg4DAXyQRbyVcJSqyg== X-Received: by 2002:a17:902:8ec7:b0:14a:c442:8ca2 with SMTP id x7-20020a1709028ec700b0014ac4428ca2mr15334745plo.12.1646704446989; Mon, 07 Mar 2022 17:54:06 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:06 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 04/11] target/s390x: vxeh2: Update for changes to vector shifts Date: Mon, 7 Mar 2022 15:53:51 -1000 Message-Id: <20220308015358.188499-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1031 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller Prior to vector enhancements 2, the shift count was supposed to be equal for each byte lest the result be unpredictable, which allowed us to assume that the shift count was the same, and optimize accordingly. With vector enhancements 2, the shift count is allowed to be different for each byte, and we must cope with that. Signed-off-by: David Miller Message-Id: <20220307020327.3003-4-dmiller423@gmail.com> [rth: Split out of larger patch; simplify shift/merge code.] Signed-off-by: Richard Henderson --- target/s390x/helper.h | 3 ++ target/s390x/tcg/vec_int_helper.c | 58 ++++++++++++++++++++++ target/s390x/tcg/translate_vx.c.inc | 77 ++++++++++++----------------- target/s390x/tcg/insn-data.def | 12 ++--- 4 files changed, 99 insertions(+), 51 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 7412130883..bf33d86f74 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -203,8 +203,11 @@ DEF_HELPER_FLAGS_3(gvec_vpopct16, TCG_CALL_NO_RWG, void, ptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_verim8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_verim16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_vsl_ve2, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_vsra, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_vsra_ve2, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_vsrl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) +DEF_HELPER_FLAGS_4(gvec_vsrl_ve2, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_vscbi8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_vscbi16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_4(gvec_vtm, void, ptr, cptr, env, i32) diff --git a/target/s390x/tcg/vec_int_helper.c b/target/s390x/tcg/vec_int_helper.c index 5561b3ed90..a881d5d267 100644 --- a/target/s390x/tcg/vec_int_helper.c +++ b/target/s390x/tcg/vec_int_helper.c @@ -540,18 +540,76 @@ void HELPER(gvec_vsl)(void *v1, const void *v2, uint64_t count, s390_vec_shl(v1, v2, count); } +void HELPER(gvec_vsl_ve2)(void *v1, const void *v2, const void *v3, + uint32_t desc) +{ + S390Vector tmp; + uint32_t sh, e0, e1 = 0; + + for (int i = 15; i >= 0; --i, e1 = e0 << 24) { + e0 = s390_vec_read_element8(v2, i); + sh = s390_vec_read_element8(v3, i) & 7; + + s390_vec_write_element8(&tmp, i, rol32(e0 | e1, sh)); + } + + *(S390Vector *)v1 = tmp; +} + void HELPER(gvec_vsra)(void *v1, const void *v2, uint64_t count, uint32_t desc) { s390_vec_sar(v1, v2, count); } +void HELPER(gvec_vsra_ve2)(void *v1, const void *v2, const void *v3, + uint32_t desc) +{ + S390Vector tmp; + uint32_t sh, e0, e1; + int i = 0; + + e0 = s390_vec_read_element8(v2, 0); + e1 = -(e0 >> 7) << 8; + + for (;;) { + sh = s390_vec_read_element8(v3, i) & 7; + + s390_vec_write_element8(&tmp, i, (e0 | e1) >> sh); + + if (++i >= 16) { + break; + } + + e1 = e0 << 8; + e0 = s390_vec_read_element8(v2, i); + } + + *(S390Vector *)v1 = tmp; +} + void HELPER(gvec_vsrl)(void *v1, const void *v2, uint64_t count, uint32_t desc) { s390_vec_shr(v1, v2, count); } +void HELPER(gvec_vsrl_ve2)(void *v1, const void *v2, const void *v3, + uint32_t desc) +{ + S390Vector tmp; + uint32_t sh, e0, e1 = 0; + + for (int i = 0; i < 16; ++i, e1 = e0 << 8) { + e0 = s390_vec_read_element8(v2, i); + sh = s390_vec_read_element8(v3, i) & 7; + + s390_vec_write_element8(&tmp, i, (e0 | e1) >> sh); + } + + *(S390Vector *)v1 = tmp; +} + #define DEF_VSCBI(BITS) \ void HELPER(gvec_vscbi##BITS)(void *v1, const void *v2, const void *v3, \ uint32_t desc) \ diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index d514e8b218..967f6213d8 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -2018,21 +2018,42 @@ static DisasJumpType op_ves(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType gen_vsh_bit_byte(DisasContext *s, DisasOps *o, + gen_helper_gvec_2i *gen, + gen_helper_gvec_3 *gen_ve2) +{ + bool byte = s->insn->data; + + if (!byte && s390_has_feat(S390_FEAT_VECTOR_ENH2)) { + gen_gvec_3_ool(get_field(s, v1), get_field(s, v2), + get_field(s, v3), 0, gen_ve2); + } else { + TCGv_i64 shift = tcg_temp_new_i64(); + + read_vec_element_i64(shift, get_field(s, v3), 7, ES_8); + tcg_gen_andi_i64(shift, shift, byte ? 0x78 : 7); + gen_gvec_2i_ool(get_field(s, v1), get_field(s, v2), shift, 0, gen); + tcg_temp_free_i64(shift); + } + return DISAS_NEXT; +} + static DisasJumpType op_vsl(DisasContext *s, DisasOps *o) { - TCGv_i64 shift = tcg_temp_new_i64(); + return gen_vsh_bit_byte(s, o, gen_helper_gvec_vsl, + gen_helper_gvec_vsl_ve2); +} - read_vec_element_i64(shift, get_field(s, v3), 7, ES_8); - if (s->fields.op2 == 0x74) { - tcg_gen_andi_i64(shift, shift, 0x7); - } else { - tcg_gen_andi_i64(shift, shift, 0x78); - } +static DisasJumpType op_vsra(DisasContext *s, DisasOps *o) +{ + return gen_vsh_bit_byte(s, o, gen_helper_gvec_vsra, + gen_helper_gvec_vsra_ve2); +} - gen_gvec_2i_ool(get_field(s, v1), get_field(s, v2), - shift, 0, gen_helper_gvec_vsl); - tcg_temp_free_i64(shift); - return DISAS_NEXT; +static DisasJumpType op_vsrl(DisasContext *s, DisasOps *o) +{ + return gen_vsh_bit_byte(s, o, gen_helper_gvec_vsrl, + gen_helper_gvec_vsrl_ve2); } static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) @@ -2064,40 +2085,6 @@ static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) return DISAS_NEXT; } -static DisasJumpType op_vsra(DisasContext *s, DisasOps *o) -{ - TCGv_i64 shift = tcg_temp_new_i64(); - - read_vec_element_i64(shift, get_field(s, v3), 7, ES_8); - if (s->fields.op2 == 0x7e) { - tcg_gen_andi_i64(shift, shift, 0x7); - } else { - tcg_gen_andi_i64(shift, shift, 0x78); - } - - gen_gvec_2i_ool(get_field(s, v1), get_field(s, v2), - shift, 0, gen_helper_gvec_vsra); - tcg_temp_free_i64(shift); - return DISAS_NEXT; -} - -static DisasJumpType op_vsrl(DisasContext *s, DisasOps *o) -{ - TCGv_i64 shift = tcg_temp_new_i64(); - - read_vec_element_i64(shift, get_field(s, v3), 7, ES_8); - if (s->fields.op2 == 0x7c) { - tcg_gen_andi_i64(shift, shift, 0x7); - } else { - tcg_gen_andi_i64(shift, shift, 0x78); - } - - gen_gvec_2i_ool(get_field(s, v1), get_field(s, v2), - shift, 0, gen_helper_gvec_vsrl); - tcg_temp_free_i64(shift); - return DISAS_NEXT; -} - static DisasJumpType op_vs(DisasContext *s, DisasOps *o) { const uint8_t es = get_field(s, m4); diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def index 46add91a0e..f487a64abf 100644 --- a/target/s390x/tcg/insn-data.def +++ b/target/s390x/tcg/insn-data.def @@ -1204,19 +1204,19 @@ F(0xe778, VESRLV, VRR_c, V, 0, 0, 0, 0, vesv, 0, IF_VEC) F(0xe738, VESRL, VRS_a, V, la2, 0, 0, 0, ves, 0, IF_VEC) /* VECTOR SHIFT LEFT */ - F(0xe774, VSL, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) + E(0xe774, VSL, VRR_c, V, 0, 0, 0, 0, vsl, 0, 0, IF_VEC) /* VECTOR SHIFT LEFT BY BYTE */ - F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) + E(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, 1, IF_VEC) /* VECTOR SHIFT LEFT DOUBLE BY BYTE */ F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC */ - F(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) + E(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, 0, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */ - F(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) + E(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, 1, IF_VEC) /* VECTOR SHIFT RIGHT LOGICAL */ - F(0xe77c, VSRL, VRR_c, V, 0, 0, 0, 0, vsrl, 0, IF_VEC) + E(0xe77c, VSRL, VRR_c, V, 0, 0, 0, 0, vsrl, 0, 0, IF_VEC) /* VECTOR SHIFT RIGHT LOGICAL BY BYTE */ - F(0xe77d, VSRLB, VRR_c, V, 0, 0, 0, 0, vsrl, 0, IF_VEC) + E(0xe77d, VSRLB, VRR_c, V, 0, 0, 0, 0, vsrl, 0, 1, IF_VEC) /* VECTOR SUBTRACT */ F(0xe7f7, VS, VRR_c, V, 0, 0, 0, 0, vs, 0, IF_VEC) /* VECTOR SUBTRACT COMPUTE BORROW INDICATION */ From patchwork Tue Mar 8 01:53:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602687 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=fx5yDYVr; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJZG1CmZz9sGC for ; Tue, 8 Mar 2022 13:05:26 +1100 (AEDT) Received: from localhost ([::1]:38050 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPE4-0000Se-5A for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:05:24 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54626) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3D-0006Ks-Bs for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:11 -0500 Received: from [2607:f8b0:4864:20::1033] (port=42760 helo=mail-pj1-x1033.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3B-0007ui-Jr for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:11 -0500 Received: by mail-pj1-x1033.google.com with SMTP id c16-20020a17090aa61000b001befad2bfaaso981685pjq.1 for ; Mon, 07 Mar 2022 17:54:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MCV0xYW3eH4D4MBbJdJ88nG5hPy3ZDKg9ma6dHXWn/o=; b=fx5yDYVrRfCfq3zZQQJANhspkBOyX1eLmHcJzwiPdHoR0vEvvDvkX/5iMd/G6mIEf7 YAGF4+fUIDwgU88Xo25m5c+cYjk5itiUzTyggMcmYDQpkVpQ3omMtsGDX/ny0FCz7NK+ 5ey25W9PM7i6Rkyq/CbM9X5NTJWDooKLxDAQKfkPbNx4Inpav+LLEmuf6m7uPCbPmXnu +GtlAnb9bUeznHYEiLkgNyz03oIIQT8ibPXUZdubFVktyhS01GU8YKpOr/70El86g95/ h1MM7JY1dICW0+7oAju8bA7ifn57MfkwScauFgRfeGyjKSIWaTKo1GaQeVNlDre1lzj+ 1maA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MCV0xYW3eH4D4MBbJdJ88nG5hPy3ZDKg9ma6dHXWn/o=; b=ndEBPPm6WNuxE0iS96y7eNA0jJFlHjrSY2QrP6B4+6Nwklh+atRibc0Mqq69XK4jQL C5e4nrfzE7gf7uf1+32gRnfXmf74/V1FM9Tg9OB7mOtv0GcRqWNmxzk/mxc8eDhiCbX3 g4D5lygO+T0oeZtW46TZ406wrJa2mK8VAxECk90wVs+i20qaadwcJnEc3AbJUhpk1YsL JbONsCjD3202Ds75xcWMuFc0a+KVCRmwmFKIrPMvvvGZqG7ztcRrL+D7IoxwVZWdB+LV edXMm+om0SGOhFTaMlxkdHCBn34qKgXP2vMqfeujI34SMICTz7pKrFmCA4v7Xna+lchy fdzg== X-Gm-Message-State: AOAM5317lz1dFuNptldVnpJmVBy1kUARGAwKHQ5rPZyaBLQq3xX45Vpp USjSXNvCAyRoyFVdKNRaKFzx2LIS5kO79A== X-Google-Smtp-Source: ABdhPJzGCbBQFFZ8wiUWM5ZEFmjkExUwVlm6S1d6bjLl6MQypSOXw2F1EAK3K/2LV6tzLunL0u6IWA== X-Received: by 2002:a17:902:ecd2:b0:151:d4b6:34ed with SMTP id a18-20020a170902ecd200b00151d4b634edmr13168887plh.7.1646704448348; Mon, 07 Mar 2022 17:54:08 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 05/11] target/s390x: vxeh2: vector shift double by bit Date: Mon, 7 Mar 2022 15:53:52 -1000 Message-Id: <20220308015358.188499-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1033 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller Signed-off-by: David Miller Message-Id: <20220307020327.3003-4-dmiller423@gmail.com> [rth: Split out of larger patch.] Signed-off-by: Richard Henderson --- target/s390x/tcg/translate_vx.c.inc | 47 ++++++++++++++++++++++++++--- target/s390x/tcg/insn-data.def | 6 +++- 2 files changed, 48 insertions(+), 5 deletions(-) diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index 967f6213d8..a5283ef2f8 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -2056,11 +2056,19 @@ static DisasJumpType op_vsrl(DisasContext *s, DisasOps *o) gen_helper_gvec_vsrl_ve2); } -static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) +static DisasJumpType op_vsld(DisasContext *s, DisasOps *o) { - const uint8_t i4 = get_field(s, i4) & 0xf; - const int left_shift = (i4 & 7) * 8; - const int right_shift = 64 - left_shift; + const bool byte = s->insn->data; + const uint8_t mask = byte ? 15 : 7; + const uint8_t mul = byte ? 8 : 1; + const uint8_t i4 = get_field(s, i4); + const int right_shift = 64 - (i4 & 7) * mul; + + if (i4 & ~mask) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + TCGv_i64 t0 = tcg_temp_new_i64(); TCGv_i64 t1 = tcg_temp_new_i64(); TCGv_i64 t2 = tcg_temp_new_i64(); @@ -2074,8 +2082,39 @@ static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) read_vec_element_i64(t1, get_field(s, v3), 0, ES_64); read_vec_element_i64(t2, get_field(s, v3), 1, ES_64); } + tcg_gen_extract2_i64(t0, t1, t0, right_shift); tcg_gen_extract2_i64(t1, t2, t1, right_shift); + + write_vec_element_i64(t0, get_field(s, v1), 0, ES_64); + write_vec_element_i64(t1, get_field(s, v1), 1, ES_64); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); + return DISAS_NEXT; +} + +static DisasJumpType op_vsrd(DisasContext *s, DisasOps *o) +{ + const uint8_t i4 = get_field(s, i4); + + if (i4 & ~7) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_temp_new_i64(); + + read_vec_element_i64(t0, get_field(s, v2), 1, ES_64); + read_vec_element_i64(t1, get_field(s, v3), 0, ES_64); + read_vec_element_i64(t2, get_field(s, v3), 1, ES_64); + + tcg_gen_extract2_i64(t0, t1, t0, i4); + tcg_gen_extract2_i64(t1, t2, t1, i4); + write_vec_element_i64(t0, get_field(s, v1), 0, ES_64); write_vec_element_i64(t1, get_field(s, v1), 1, ES_64); diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def index f487a64abf..98a31a557d 100644 --- a/target/s390x/tcg/insn-data.def +++ b/target/s390x/tcg/insn-data.def @@ -1207,12 +1207,16 @@ E(0xe774, VSL, VRR_c, V, 0, 0, 0, 0, vsl, 0, 0, IF_VEC) /* VECTOR SHIFT LEFT BY BYTE */ E(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, 1, IF_VEC) +/* VECTOR SHIFT LEFT DOUBLE BY BIT */ + E(0xe786, VSLD, VRI_d, VE2, 0, 0, 0, 0, vsld, 0, 0, IF_VEC) /* VECTOR SHIFT LEFT DOUBLE BY BYTE */ - F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC) + E(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsld, 0, 1, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC */ E(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, 0, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */ E(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, 1, IF_VEC) +/* VECTOR SHIFT RIGHT DOUBLE BY BIT */ + F(0xe787, VSRD, VRI_d, VE2, 0, 0, 0, 0, vsrd, 0, IF_VEC) /* VECTOR SHIFT RIGHT LOGICAL */ E(0xe77c, VSRL, VRR_c, V, 0, 0, 0, 0, vsrl, 0, 0, IF_VEC) /* VECTOR SHIFT RIGHT LOGICAL BY BYTE */ From patchwork Tue Mar 8 01:53:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602695 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=Eodjgai5; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJmS1KFLz9sGC for ; Tue, 8 Mar 2022 13:14:14 +1100 (AEDT) Received: from localhost ([::1]:58396 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPMZ-0005zE-Ln for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:14:11 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54654) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3F-0006S6-1l for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:13 -0500 Received: from [2607:f8b0:4864:20::102d] (port=46005 helo=mail-pj1-x102d.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3D-0007vt-5N for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:12 -0500 Received: by mail-pj1-x102d.google.com with SMTP id m11-20020a17090a7f8b00b001beef6143a8so966441pjl.4 for ; Mon, 07 Mar 2022 17:54:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RNzI9aMOcfsxb8P+d0xcuiRoCIwW/RkDBsYD1oyUds8=; b=Eodjgai5jR7PQhzDIV6FiCjpz6XqrQ/6U2OyWFl53Y5BEDXiXWk64ObcHJrvn+u+za THaMonAevkr5pUdF+G8FQw3cjsZoY+Tcnw8opXizaQ+SXSYWX2hsc4wZVLdjT4NiYj/8 4FQ/qzCL3PRpQfqfHANtA8KW0j7oWKn4mZh+A1TjOThEF5iTWWUPOo77NCFo2yx+Vl5g 6M1tg12olmQnHEG1XQO+n0p9fOw+ujauqEG+4bKFa4/0deqHZF0fWq0CrbSXj3I+2A8r ada9KwQd3TBOdWntpko2MC0vJRUbDLVCvC66a21hJLkEW+sVbpa4PLzL6SKTLfThqusa u8ww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RNzI9aMOcfsxb8P+d0xcuiRoCIwW/RkDBsYD1oyUds8=; b=bHBtk2WyAPrSgXPypQH0kzDXTTw+2l6aAvbh/NwDvo5pH3K7HgGZnCa3+IH6nB89bc wYMU92O7opScvJn358Fny6bQpjaH81u30pDLFWxwHkjF4AMtpHIeyn0A4aDwaOqNSoys aHsJNFes83E5fZu5ooTew9M61ffjGXoy97S5rO4eJOawnc3RQVWSnccd96KgD9vV2k+z YarwtJagisxyKGr8rfWhIDK1aIv8Iac2NSPUn/F2nVBHnyMbiJTYksBNc6+6LH90wu/L PWpXbKrQL6H4WF0oSZD8rC5F4ljUIr4YovI3qijUAVD2ZH4lrWb5AQCN+I1wteUDJi7T EXfQ== X-Gm-Message-State: AOAM530nAh/DzW3oeFHYlUbsRUtMBogtpknlTEGhsB1zGOune5F+F0dq XoAguKS1zVxozx1n4YGhIpSWcoOjCxZx/Q== X-Google-Smtp-Source: ABdhPJzVwnjHP24O2PFC8oNNExdj9U9W2W0icZLNhaGoCddyoUjU+Mku7iaCwIMhZ0ZEGzMSsEirkg== X-Received: by 2002:a17:90b:33d2:b0:1bf:3b3f:cb60 with SMTP id lk18-20020a17090b33d200b001bf3b3fcb60mr2101544pjb.109.1646704449848; Mon, 07 Mar 2022 17:54:09 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 06/11] target/s390x: vxeh2: vector {load, store} elements reversed Date: Mon, 7 Mar 2022 15:53:53 -1000 Message-Id: <20220308015358.188499-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102d (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::102d; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102d.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller Signed-off-by: David Miller Message-Id: <20220307020327.3003-5-dmiller423@gmail.com> [rth: Use new hswap and wswap tcg expanders.] Signed-off-by: Richard Henderson --- target/s390x/tcg/translate_vx.c.inc | 84 +++++++++++++++++++++++++++++ target/s390x/tcg/insn-data.def | 4 ++ 2 files changed, 88 insertions(+) diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index a5283ef2f8..ac807122a3 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -492,6 +492,46 @@ static DisasJumpType op_vlei(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType op_vler(DisasContext *s, DisasOps *o) +{ + const uint8_t es = get_field(s, m3); + + if (es < ES_16 || es > ES_64) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + + /* Begin with the two doublewords swapped... */ + tcg_gen_qemu_ld_i64(t1, o->addr1, get_mem_index(s), MO_TEUQ); + gen_addi_and_wrap_i64(s, o->addr1, o->addr1, 8); + tcg_gen_qemu_ld_i64(t0, o->addr1, get_mem_index(s), MO_TEUQ); + + /* ... then swap smaller elements within the doublewords as required. */ + switch (es) { + case MO_16: + tcg_gen_hswap_i64(t1, t1); + tcg_gen_hswap_i64(t0, t0); + break; + case MO_32: + tcg_gen_wswap_i64(t1, t1); + tcg_gen_wswap_i64(t0, t0); + break; + case MO_64: + break; + default: + g_assert_not_reached(); + } + + write_vec_element_i64(t0, get_field(s, v1), 0, ES_64); + write_vec_element_i64(t1, get_field(s, v1), 1, ES_64); + tcg_temp_free(t0); + tcg_temp_free(t1); + return DISAS_NEXT; +} + static DisasJumpType op_vlgv(DisasContext *s, DisasOps *o) { const uint8_t es = get_field(s, m4); @@ -976,6 +1016,50 @@ static DisasJumpType op_vste(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType op_vster(DisasContext *s, DisasOps *o) +{ + const uint8_t es = get_field(s, m3); + TCGv_i64 t0, t1; + + if (es < ES_16 || es > ES_64) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + /* Probe write access before actually modifying memory */ + gen_helper_probe_write_access(cpu_env, o->addr1, tcg_constant_i64(16)); + + /* Begin with the two doublewords swapped... */ + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + read_vec_element_i64(t1, get_field(s, v1), 0, ES_64); + read_vec_element_i64(t0, get_field(s, v1), 1, ES_64); + + /* ... then swap smaller elements within the doublewords as required. */ + switch (es) { + case MO_16: + tcg_gen_hswap_i64(t1, t1); + tcg_gen_hswap_i64(t0, t0); + break; + case MO_32: + tcg_gen_wswap_i64(t1, t1); + tcg_gen_wswap_i64(t0, t0); + break; + case MO_64: + break; + default: + g_assert_not_reached(); + } + + tcg_gen_qemu_st_i64(t0, o->addr1, get_mem_index(s), MO_TEUQ); + gen_addi_and_wrap_i64(s, o->addr1, o->addr1, 8); + tcg_gen_qemu_st_i64(t1, o->addr1, get_mem_index(s), MO_TEUQ); + + tcg_temp_free(t0); + tcg_temp_free(t1); + return DISAS_NEXT; +} + static DisasJumpType op_vstm(DisasContext *s, DisasOps *o) { const uint8_t v3 = get_field(s, v3); diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def index 98a31a557d..b524541a7d 100644 --- a/target/s390x/tcg/insn-data.def +++ b/target/s390x/tcg/insn-data.def @@ -1037,6 +1037,8 @@ E(0xe741, VLEIH, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_16, IF_VEC) E(0xe743, VLEIF, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_32, IF_VEC) E(0xe742, VLEIG, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_64, IF_VEC) +/* VECTOR LOAD ELEMENTS REVERSED */ + F(0xe607, VLER, VRX, VE2, la2, 0, 0, 0, vler, 0, IF_VEC) /* VECTOR LOAD GR FROM VR ELEMENT */ F(0xe721, VLGV, VRS_c, V, la2, 0, r1, 0, vlgv, 0, IF_VEC) /* VECTOR LOAD LOGICAL ELEMENT AND ZERO */ @@ -1082,6 +1084,8 @@ E(0xe709, VSTEH, VRX, V, la2, 0, 0, 0, vste, 0, ES_16, IF_VEC) E(0xe70b, VSTEF, VRX, V, la2, 0, 0, 0, vste, 0, ES_32, IF_VEC) E(0xe70a, VSTEG, VRX, V, la2, 0, 0, 0, vste, 0, ES_64, IF_VEC) +/* VECTOR STORE ELEMENTS REVERSED */ + F(0xe60f, VSTER, VRX, VE2, la2, 0, 0, 0, vster, 0, IF_VEC) /* VECTOR STORE MULTIPLE */ F(0xe73e, VSTM, VRS_a, V, la2, 0, 0, 0, vstm, 0, IF_VEC) /* VECTOR STORE WITH LENGTH */ From patchwork Tue Mar 8 01:53:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602696 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XRhLAyAB; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJpY6zxKz9sGC for ; Tue, 8 Mar 2022 13:16:05 +1100 (AEDT) Received: from localhost ([::1]:60638 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPOO-0007ZT-1s for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:16:04 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54700) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3G-0006YP-P0 for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:14 -0500 Received: from [2607:f8b0:4864:20::1032] (port=51034 helo=mail-pj1-x1032.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3E-0007wX-Vn for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:14 -0500 Received: by mail-pj1-x1032.google.com with SMTP id m22so15800916pja.0 for ; Mon, 07 Mar 2022 17:54:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=owkMefn9Rs0Trnlpmao1AdHxZNK3Dx+GWwlPm0/xHZM=; b=XRhLAyAB0YQXZzO90nmdtmDLStL/XBvqdADso/i/ohP+PNbY2rmNLoFpZsIyvLQz04 rS8UYfbg4CWyYFXlz23cNwp3na5sp/odh8pw0Mz09avALnZOqOxfXDhx7rsuz9r93SxH mvgHRCFReq68UF9awLq+h/ZEe9zTKPtRG5qY8VceOPUghAvS68wpqmR2EgIz8KG8MXFU alBYq7sic66YO9RMh+0pCm6KU9VZy7laGF3e+rDdHg13umx6GAOEEfENVTSDpCSk2Ho2 +5a6c8X5vygCQQo80GHRb8g/+Jd+aC189btDsFSpDcbfYFdxGAj2wCfVkpSyrGnsIGuU eAqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=owkMefn9Rs0Trnlpmao1AdHxZNK3Dx+GWwlPm0/xHZM=; b=YQEkA5OlzSu9XBLnrJ8XT30ylTV9HxinrOcqx/YL7uNCauxZJik7G/d9GTyUDngSCj R1Wb9/VzCtUXn8IrdubnpV+aTzOMNIV+EaYLZ4rZJyhvWdMnYC57AJgfn+WWp44ZHan2 qH1NlYOfsysfUEEe3L/TASJP2WrPLZd86ghwM3MCFI0da/UP1hWoRscezaSCtxh7d3Ga UvvtzwjGmgKYQPqx0wDuBkwmUDX8yd6td8pA/wTvgsB24GKtN7fSZr7cU0lUSEK8CA4e eNn1CGx+m015+co6fpCCbfRIdVGvyA1cvMMSoFOqQmN/huhLOXPBGVLbZTT/uuW6qLRW TDvw== X-Gm-Message-State: AOAM531RDHX2M0cUO9qdb8fXbTjuOMFqwZZCDe/z7dWfaPWD5/LSYdY8 eKCfbOIV6ClNaUz60bCKptm6vWgKwsg7Yg== X-Google-Smtp-Source: ABdhPJwYl2OPEsUB0c9Y4LbT02Ra6QhbvzfYUQjstdAURD9TgCSj1+sqJBhcsOJZMT/OXsKUWx8qIw== X-Received: by 2002:a17:902:be0d:b0:151:6b8b:b3a5 with SMTP id r13-20020a170902be0d00b001516b8bb3a5mr15917478pls.27.1646704451419; Mon, 07 Mar 2022 17:54:11 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:11 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 07/11] target/s390x: vxeh2: vector {load, store} byte reversed elements Date: Mon, 7 Mar 2022 15:53:54 -1000 Message-Id: <20220308015358.188499-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::1032 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Richard Henderson , dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller Signed-off-by: David Miller Message-Id: <20220307020327.3003-6-dmiller423@gmail.com> [rth: Split out elements (plural) from element (scalar) Use tcg little-endian memory ops, plus hswap and wswap.] Signed-off-by: Richard Henderson --- target/s390x/tcg/translate_vx.c.inc | 101 ++++++++++++++++++++++++++++ target/s390x/tcg/insn-data.def | 4 ++ 2 files changed, 105 insertions(+) diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index ac807122a3..9a82401d71 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -457,6 +457,56 @@ static DisasJumpType op_vlrep(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType op_vlbr(DisasContext *s, DisasOps *o) +{ + const uint8_t es = get_field(s, m3); + TCGv_i64 t0, t1, tt; + + if (es < ES_16 || es > ES_128) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + + /* Begin with byte reversed doublewords... */ + tcg_gen_qemu_ld_i64(t0, o->addr1, get_mem_index(s), MO_LEUQ); + gen_addi_and_wrap_i64(s, o->addr1, o->addr1, 8); + tcg_gen_qemu_ld_i64(t1, o->addr1, get_mem_index(s), MO_LEUQ); + + /* + * For 16 and 32-bit elements, the doubleword bswap also reversed + * the order of the elements. Perform a larger order swap to put + * them back into place. For the 128-bit "element", finish the + * bswap by swapping the doublewords. + */ + switch (es) { + case ES_16: + tcg_gen_hswap_i64(t0, t0); + tcg_gen_hswap_i64(t1, t1); + break; + case ES_32: + tcg_gen_wswap_i64(t0, t0); + tcg_gen_wswap_i64(t1, t1); + break; + case ES_64: + break; + case ES_128: + tt = t0, t0 = t1, t1 = tt; + break; + default: + g_assert_not_reached(); + } + + write_vec_element_i64(t0, get_field(s, v1), 0, ES_64); + write_vec_element_i64(t1, get_field(s, v1), 1, ES_64); + + tcg_temp_free(t0); + tcg_temp_free(t1); + return DISAS_NEXT; +} + static DisasJumpType op_vle(DisasContext *s, DisasOps *o) { const uint8_t es = s->insn->data; @@ -998,6 +1048,57 @@ static DisasJumpType op_vst(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType op_vstbr(DisasContext *s, DisasOps *o) +{ + const uint8_t es = get_field(s, m3); + TCGv_i64 t0, t1, tt; + + if (es < ES_16 || es > ES_128) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + /* Probe write access before actually modifying memory */ + gen_helper_probe_write_access(cpu_env, o->addr1, tcg_constant_i64(16)); + + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + read_vec_element_i64(t0, get_field(s, v1), 0, ES_64); + read_vec_element_i64(t1, get_field(s, v1), 1, ES_64); + + /* + * For 16 and 32-bit elements, the doubleword bswap below will + * reverse the order of the elements. Perform a larger order + * swap to put them back into place. For the 128-bit "element", + * finish the bswap by swapping the doublewords. + */ + switch (es) { + case MO_16: + tcg_gen_hswap_i64(t0, t0); + tcg_gen_hswap_i64(t1, t1); + break; + case MO_32: + tcg_gen_wswap_i64(t0, t0); + tcg_gen_wswap_i64(t1, t1); + break; + case MO_64: + break; + case MO_128: + tt = t0, t0 = t1, t1 = tt; + break; + default: + g_assert_not_reached(); + } + + tcg_gen_qemu_st_i64(t0, o->addr1, get_mem_index(s), MO_LEUQ); + gen_addi_and_wrap_i64(s, o->addr1, o->addr1, 8); + tcg_gen_qemu_st_i64(t1, o->addr1, get_mem_index(s), MO_LEUQ); + + tcg_temp_free(t0); + tcg_temp_free(t1); + return DISAS_NEXT; +} + static DisasJumpType op_vste(DisasContext *s, DisasOps *o) { const uint8_t es = s->insn->data; diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def index b524541a7d..ee6e1dc9e5 100644 --- a/target/s390x/tcg/insn-data.def +++ b/target/s390x/tcg/insn-data.def @@ -1027,6 +1027,8 @@ F(0xe756, VLR, VRR_a, V, 0, 0, 0, 0, vlr, 0, IF_VEC) /* VECTOR LOAD AND REPLICATE */ F(0xe705, VLREP, VRX, V, la2, 0, 0, 0, vlrep, 0, IF_VEC) +/* VECTOR LOAD BYTE REVERSED ELEMENTS */ + F(0xe606, VLBR, VRX, VE2, la2, 0, 0, 0, vlbr, 0, IF_VEC) /* VECTOR LOAD ELEMENT */ E(0xe700, VLEB, VRX, V, la2, 0, 0, 0, vle, 0, ES_8, IF_VEC) E(0xe701, VLEH, VRX, V, la2, 0, 0, 0, vle, 0, ES_16, IF_VEC) @@ -1079,6 +1081,8 @@ F(0xe75f, VSEG, VRR_a, V, 0, 0, 0, 0, vseg, 0, IF_VEC) /* VECTOR STORE */ F(0xe70e, VST, VRX, V, la2, 0, 0, 0, vst, 0, IF_VEC) +/* VECTOR STORE BYTE REVERSED ELEMENTS */ + F(0xe60e, VSTBR, VRX, VE2, la2, 0, 0, 0, vstbr, 0, IF_VEC) /* VECTOR STORE ELEMENT */ E(0xe708, VSTEB, VRX, V, la2, 0, 0, 0, vste, 0, ES_8, IF_VEC) E(0xe709, VSTEH, VRX, V, la2, 0, 0, 0, vste, 0, ES_16, IF_VEC) From patchwork Tue Mar 8 01:53:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602697 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XaznIxd4; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJrj6tmVz9sGC for ; Tue, 8 Mar 2022 13:17:57 +1100 (AEDT) Received: from localhost ([::1]:34646 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPQB-0000nr-PA for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:17:55 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54740) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3I-0006e8-An for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:16 -0500 Received: from [2607:f8b0:4864:20::42c] (port=45970 helo=mail-pf1-x42c.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3G-0007xZ-5R for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:16 -0500 Received: by mail-pf1-x42c.google.com with SMTP id s8so11942744pfk.12 for ; Mon, 07 Mar 2022 17:54:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g69qvp6bRwk8Stu7y5fbG4X7ZrzDFZHMhiKa8KOLznY=; b=XaznIxd4kwcnUGj3KY6DfBxuxsY7OgF9jnxI3Q/MTmBMMXDrcdSGGYc2GsFUWUYb0j kOT6UNK2Pqr0w8aAoe4onEnktILunarqt5/BHhz0jGMzDYkqhP8+F8nKlg4+CJoyAQdx Mk0iypUCwIlo2puUPgWjXAKeGfcpCvwbpeKQGZHpovS1yZbNR8m3XDFXZ5c0eCOLZSt2 gSIpvE9uu2VdBdHxZUXyp1IAw12c7qq9TOe5eanMy7KFKqbmft4JFBQoYVAaXfggdTHB 2GJpvt0wNP5CZ8jpJ+Q6hUP1soOiqcbXjj4Os/eJ4VCxgOsI37Ma5QMCCOkYnsH1j09A tu9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g69qvp6bRwk8Stu7y5fbG4X7ZrzDFZHMhiKa8KOLznY=; b=bouAz/Cb5HirYzzn1/dJLQIpcR9irJxrnDNX4og3WB+zh8LbWMWJCxt22wgGtCytk4 Vp61Q5NwkVKIWMlKcsXMHeeHFYd5KaqDhugHcxu4dR3vk1re5DdX/N6QWBVTjhEENl2F O+bjddNAWFmsgsS2jOrpQZ/lYt9pdywUeAKmZ4Sozs6j87rvDJwm+tLaIZVyVMRqbkUW MwcP/F8zbgX4pN3ALogH4fg/4YPf3YnXFdmYR0CT/V8o8hkTjyHkisGqGhSL/tLqnJkA zsltwPnl6pA5hk+jdOcpUINzBxoQof8TX3AuuJqKHvDHgYk6KXIL57XSPUbDrISom0c5 7uDA== X-Gm-Message-State: AOAM5303AeV/NkUlswfz05LpogqcQtnounRt+HCuFDl8onauzVflZwic n3yFB3xrAg37iQB+RjMfRYj71r6irgRSLQ== X-Google-Smtp-Source: ABdhPJwFaplXBLYgHlJ5tg2Mu+PP8fxyi4FMp+4Cd8/F3r/YdUaBwT2asoufzrf70Bkmb6IQ5jpd0g== X-Received: by 2002:aa7:9253:0:b0:4e1:53d4:c2c6 with SMTP id 19-20020aa79253000000b004e153d4c2c6mr15951926pfp.62.1646704452813; Mon, 07 Mar 2022 17:54:12 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:12 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 08/11] target/s390x: vxeh2: vector {load, store} byte reversed element Date: Mon, 7 Mar 2022 15:53:55 -1000 Message-Id: <20220308015358.188499-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42c (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller This includes VLEBR* and VSTEBR* (single element); VLBRREP (load single element and replicate); and VLLEBRZ (load single element and zero). Signed-off-by: David Miller Message-Id: <20220307020327.3003-6-dmiller423@gmail.com> [rth: Split out elements (plural) from element (scalar), Use tcg little-endian memory operations.] Signed-off-by: Richard Henderson Reviewed-by: David Hildenbrand --- target/s390x/tcg/translate_vx.c.inc | 85 +++++++++++++++++++++++++++++ target/s390x/tcg/insn-data.def | 12 ++++ 2 files changed, 97 insertions(+) diff --git a/target/s390x/tcg/translate_vx.c.inc b/target/s390x/tcg/translate_vx.c.inc index 9a82401d71..ce77578325 100644 --- a/target/s390x/tcg/translate_vx.c.inc +++ b/target/s390x/tcg/translate_vx.c.inc @@ -457,6 +457,73 @@ static DisasJumpType op_vlrep(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType op_vlebr(DisasContext *s, DisasOps *o) +{ + const uint8_t es = s->insn->data; + const uint8_t enr = get_field(s, m3); + TCGv_i64 tmp; + + if (!valid_vec_element(enr, es)) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + tmp = tcg_temp_new_i64(); + tcg_gen_qemu_ld_i64(tmp, o->addr1, get_mem_index(s), MO_LE | es); + write_vec_element_i64(tmp, get_field(s, v1), enr, es); + tcg_temp_free_i64(tmp); + return DISAS_NEXT; +} + +static DisasJumpType op_vlbrrep(DisasContext *s, DisasOps *o) +{ + const uint8_t es = get_field(s, m3); + TCGv_i64 tmp; + + if (es < ES_16 || es > ES_64) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + tmp = tcg_temp_new_i64(); + tcg_gen_qemu_ld_i64(tmp, o->addr1, get_mem_index(s), MO_LE | es); + gen_gvec_dup_i64(es, get_field(s, v1), tmp); + tcg_temp_free_i64(tmp); + return DISAS_NEXT; +} + +static DisasJumpType op_vllebrz(DisasContext *s, DisasOps *o) +{ + const uint8_t m3 = get_field(s, m3); + TCGv_i64 tmp; + int es, lshift; + + switch (m3) { + case ES_16: + case ES_32: + case ES_64: + es = m3; + lshift = 0; + break; + case 6: + es = ES_32; + lshift = 32; + break; + default: + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + tmp = tcg_temp_new_i64(); + tcg_gen_qemu_ld_i64(tmp, o->addr1, get_mem_index(s), MO_LE | es); + tcg_gen_shli_i64(tmp, tmp, lshift); + + write_vec_element_i64(tmp, get_field(s, v1), 0, ES_64); + write_vec_element_i64(tcg_constant_i64(0), get_field(s, v1), 1, ES_64); + tcg_temp_free_i64(tmp); + return DISAS_NEXT; +} + static DisasJumpType op_vlbr(DisasContext *s, DisasOps *o) { const uint8_t es = get_field(s, m3); @@ -1048,6 +1115,24 @@ static DisasJumpType op_vst(DisasContext *s, DisasOps *o) return DISAS_NEXT; } +static DisasJumpType op_vstebr(DisasContext *s, DisasOps *o) +{ + const uint8_t es = s->insn->data; + const uint8_t enr = get_field(s, m3); + TCGv_i64 tmp; + + if (!valid_vec_element(enr, es)) { + gen_program_exception(s, PGM_SPECIFICATION); + return DISAS_NORETURN; + } + + tmp = tcg_temp_new_i64(); + read_vec_element_i64(tmp, get_field(s, v1), enr, es); + tcg_gen_qemu_st_i64(tmp, o->addr1, get_mem_index(s), MO_LE | es); + tcg_temp_free_i64(tmp); + return DISAS_NEXT; +} + static DisasJumpType op_vstbr(DisasContext *s, DisasOps *o) { const uint8_t es = get_field(s, m3); diff --git a/target/s390x/tcg/insn-data.def b/target/s390x/tcg/insn-data.def index ee6e1dc9e5..b80f989002 100644 --- a/target/s390x/tcg/insn-data.def +++ b/target/s390x/tcg/insn-data.def @@ -1027,6 +1027,14 @@ F(0xe756, VLR, VRR_a, V, 0, 0, 0, 0, vlr, 0, IF_VEC) /* VECTOR LOAD AND REPLICATE */ F(0xe705, VLREP, VRX, V, la2, 0, 0, 0, vlrep, 0, IF_VEC) +/* VECTOR LOAD BYTE REVERSED ELEMENT */ + E(0xe601, VLEBRH, VRX, VE2, la2, 0, 0, 0, vlebr, 0, ES_16, IF_VEC) + E(0xe603, VLEBRF, VRX, VE2, la2, 0, 0, 0, vlebr, 0, ES_32, IF_VEC) + E(0xe602, VLEBRG, VRX, VE2, la2, 0, 0, 0, vlebr, 0, ES_64, IF_VEC) +/* VECTOR LOAD BYTE REVERSED ELEMENT AND REPLOCATE */ + F(0xe605, VLBRREP, VRX, VE2, la2, 0, 0, 0, vlbrrep, 0, IF_VEC) +/* VECTOR LOAD BYTE REVERSED ELEMENT AND ZERO */ + F(0xe604, VLLEBRZ, VRX, VE2, la2, 0, 0, 0, vllebrz, 0, IF_VEC) /* VECTOR LOAD BYTE REVERSED ELEMENTS */ F(0xe606, VLBR, VRX, VE2, la2, 0, 0, 0, vlbr, 0, IF_VEC) /* VECTOR LOAD ELEMENT */ @@ -1081,6 +1089,10 @@ F(0xe75f, VSEG, VRR_a, V, 0, 0, 0, 0, vseg, 0, IF_VEC) /* VECTOR STORE */ F(0xe70e, VST, VRX, V, la2, 0, 0, 0, vst, 0, IF_VEC) +/* VECTOR STORE BYTE REVERSED ELEMENT */ + E(0xe609, VSTEBRH, VRX, VE2, la2, 0, 0, 0, vstebr, 0, ES_16, IF_VEC) + E(0xe60b, VSTEBRF, VRX, VE2, la2, 0, 0, 0, vstebr, 0, ES_32, IF_VEC) + E(0xe60a, VSTEBRG, VRX, VE2, la2, 0, 0, 0, vstebr, 0, ES_64, IF_VEC) /* VECTOR STORE BYTE REVERSED ELEMENTS */ F(0xe60e, VSTBR, VRX, VE2, la2, 0, 0, 0, vstbr, 0, IF_VEC) /* VECTOR STORE ELEMENT */ From patchwork Tue Mar 8 01:53:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602690 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=lFqDIrv9; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJd04DyCz9sGC for ; Tue, 8 Mar 2022 13:07:48 +1100 (AEDT) Received: from localhost ([::1]:44892 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPGM-00058T-Kh for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:07:46 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54754) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3J-0006hF-3a for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:17 -0500 Received: from [2607:f8b0:4864:20::42a] (port=41525 helo=mail-pf1-x42a.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3H-0007y5-Jf for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:16 -0500 Received: by mail-pf1-x42a.google.com with SMTP id p8so16017125pfh.8 for ; Mon, 07 Mar 2022 17:54:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oOqdltjaxLQFa3yHnfQPSfs2OpOZRBf+9EjEgUtdzng=; b=lFqDIrv9m0T4Ny/U60JdHEOvhH3eAJdYB55mQn9IH++rkht2j+Wdy19LR8SWew9VBh oO2Uol9jY3yK0hhOv+fCM1+n3/iHL+RoaKnrfXSm5R2k8iaMYXObgxzSHDcK4IZMjqbM SB2ydKlnyf95/L7bOtnz65Qycb96da5nH+XkEqRVCPGzEmHelwzZwPpi5syTU1U/sdgf mf0DbqCY/rt28BmdoysFSecA44VFhbxrZS7eQvrtW6+qHXwBsLBvyOktF5A2YSpYIudH 97CwrqvSrbuG/vnpHDiYuPaDEt946v82uT/qL4FGACuk5U0f8VnAZrrOJ8nV/KJM7nxT HPRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oOqdltjaxLQFa3yHnfQPSfs2OpOZRBf+9EjEgUtdzng=; b=KVjw7BvavKJx2VbTLdhKZvW8oJKQwzhnRpyYaj+wRca4aASpc0EiKWbECwnHjGFRIZ PDQe6Ujoi0k3D187LWJ84/rEye1Yu34+5CZSvkWfhvNIWOXGH00ZJBpd3qYjjgHlEEkI dmrRk7WsrAUJvvMzCGGNr1+xmtqQibHTxZhld5glialbEBBlYY+qbUEJ5OmLFwl17x8g /gsBIRjaof7qS3DpesUkXtRdWbuOlcc2nB+m3zF7Aw9AvQAcJ7VkBvpi9GBOq3DoPO6G YR5tsZlBnTmbc9VJIO38xDjOWu44zn+0WbXaS3iQyKzfTrrFujQI3jI9kOGhtHtODXnk tYfg== X-Gm-Message-State: AOAM5312116VX/r/9k5z8qh3GmcBEoJ3jwfN+wUD3XwtOMlb/kIKrALr 5SBh/Sbz1MkvXE0nEajcaSuL50LXb63vOA== X-Google-Smtp-Source: ABdhPJzHIt4f4R7DU0hZI8/qV6BW8w9ul5MsL/3zLL9foG7j3KG3S7jI7cJmiTHB76qzVmEXKRMlmQ== X-Received: by 2002:a05:6a00:198a:b0:4f7:2d21:4531 with SMTP id d10-20020a056a00198a00b004f72d214531mr922300pfl.44.1646704454276; Mon, 07 Mar 2022 17:54:14 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:13 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 09/11] target/s390x: add S390_FEAT_VECTOR_ENH2 to cpu max Date: Mon, 7 Mar 2022 15:53:56 -1000 Message-Id: <20220308015358.188499-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42a (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller Signed-off-by: David Miller Message-Id: <20220307020327.3003-7-dmiller423@gmail.com> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/s390x/gen-features.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 22846121c4..499a3b10a8 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -740,7 +740,9 @@ static uint16_t qemu_V6_2[] = { static uint16_t qemu_LATEST[] = { S390_FEAT_MISC_INSTRUCTION_EXT3, + S390_FEAT_VECTOR_ENH2, }; + /* add all new definitions before this point */ static uint16_t qemu_MAX[] = { /* generates a dependency warning, leave it out for now */ From patchwork Tue Mar 8 01:53:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602698 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=PCHbuDJb; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJvY24DFz9sGF for ; Tue, 8 Mar 2022 13:20:23 +1100 (AEDT) Received: from localhost ([::1]:36770 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPSW-0002Ib-75 for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:20:20 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54806) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3L-0006nk-3N for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:19 -0500 Received: from [2607:f8b0:4864:20::42f] (port=40932 helo=mail-pf1-x42f.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3J-0007ys-0c for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:18 -0500 Received: by mail-pf1-x42f.google.com with SMTP id z15so16020201pfe.7 for ; Mon, 07 Mar 2022 17:54:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bGR+vYHwx8EaIk7AwQHozj3cKJSWDU3acQExLQJADiY=; b=PCHbuDJbtJ9N9EMmlyl5SbEoRuKqJdx8Czy3fJ9WTrvh3RcK2xEqPMj9YzWzBH1V0N Eb21JMJ1mT3VwsYpU9X+vDevzn3drPKPK+yMxUQ1tyLXFjnOXFC4PjQjHVeODbuDn4cS wRDuQKJoTYr07fD8/S0RMscWQ/NygifHK3iVJFWZnYCr6txjo6LyVrJADtqqEAKd8m+I Tu8IylODgEQQTC1AtMxpG4Eoxs+f1MdlTHnjz/jvrSsnYXtjYc9K/C9z5jNNkX3tfrBY rBnYbMlUT/wBexDPc6yDWKilBVfLpWNb6l/nI+Yzyv7hV3fzx955h9t4f5b1VsQOAwA7 m+3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bGR+vYHwx8EaIk7AwQHozj3cKJSWDU3acQExLQJADiY=; b=2RTxyxmDqixQj0OAexDb/M+lcYn7g6tvZeMekQDXP6j/tVrzmLMyD4e/3E6BnbfhNw o9A6X4APxVpAvANfrKPesmn3G8QIgX5HQWwEZP17uYmBsdFFxNg2lU+RAY4lXDCVmaRQ 2RwrWfn7gY6aner8M2gjKo1b/bjlHxpZrhqHvpckWsfKVjsuK7ZwajJVpNTHrN31/cNL qEoogUqLOJLqV/IX91xaeHV5mDRylqqFlst/yxMjzjrlGBpvQiiMA/GbUMKQI1dCKJul r9WR7CMj/yY/iHGRAKTnp4iCtHZerC0afBsf5F2WN0yRctZkZV0ptyhmJPQWxMh2q00Z YbMw== X-Gm-Message-State: AOAM5304l9Rg6uUn9XNM/9xAEAESAbP7maPyguYyuUq4WLdxDEdkGx0+ mhsw9rEm2CmbA3rQoj2Tiu9odbBvo3aTkw== X-Google-Smtp-Source: ABdhPJwtnzvtY2Po/JMPr4ykDqchDPJTcXxc/7/eWyfAh/bSwOWM6L3Ur3E6/k9Uc4ng9ubY7asVTw== X-Received: by 2002:a65:63d8:0:b0:380:2be6:806a with SMTP id n24-20020a6563d8000000b003802be6806amr8074880pgv.20.1646704455684; Mon, 07 Mar 2022 17:54:15 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:15 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 10/11] tests/tcg/s390x: Tests for Vector Enhancements Facility 2 Date: Mon, 7 Mar 2022 15:53:57 -1000 Message-Id: <20220308015358.188499-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::42f (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: David Miller * tests/tcg/s390x/vxeh2_vcvt.c : vector convert * tests/tcg/s390x/vxeh2_vs.c : vector shift * tests/tcg/s390x/vxeh2_vlstr.c : vector load/store reversed Signed-off-by: David Miller Message-Id: <20220307020327.3003-8-dmiller423@gmail.com> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- tests/tcg/s390x/vxeh2_vcvt.c | 97 +++++++++++++++++++++ tests/tcg/s390x/vxeh2_vlstr.c | 146 ++++++++++++++++++++++++++++++++ tests/tcg/s390x/vxeh2_vs.c | 91 ++++++++++++++++++++ tests/tcg/s390x/Makefile.target | 8 ++ 4 files changed, 342 insertions(+) create mode 100644 tests/tcg/s390x/vxeh2_vcvt.c create mode 100644 tests/tcg/s390x/vxeh2_vlstr.c create mode 100644 tests/tcg/s390x/vxeh2_vs.c diff --git a/tests/tcg/s390x/vxeh2_vcvt.c b/tests/tcg/s390x/vxeh2_vcvt.c new file mode 100644 index 0000000000..71ecbd77b0 --- /dev/null +++ b/tests/tcg/s390x/vxeh2_vcvt.c @@ -0,0 +1,97 @@ +/* + * vxeh2_vcvt: vector-enhancements facility 2 vector convert * + */ +#include + +typedef union S390Vector { + uint64_t d[2]; /* doubleword */ + uint32_t w[4]; /* word */ + uint16_t h[8]; /* halfword */ + uint8_t b[16]; /* byte */ + float f[4]; + double fd[2]; + __uint128_t v; +} S390Vector; + +#define M_S 8 +#define M4_XxC 4 +#define M4_def M4_XxC + +static inline void vcfps(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vcfps %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +static inline void vcfpl(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vcfpl %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +static inline void vcsfp(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vcsfp %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +static inline void vclfp(S390Vector *v1, S390Vector *v2, + const uint8_t m3, const uint8_t m4, const uint8_t m5) +{ + asm volatile("vclfp %[v1], %[v2], %[m3], %[m4], %[m5]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [m3] "i" (m3) + , [m4] "i" (m4) + , [m5] "i" (m5)); +} + +int main(int argc, char *argv[]) +{ + S390Vector vd; + S390Vector vs_i32 = { .w[0] = 1, .w[1] = 64, .w[2] = 1024, .w[3] = -10 }; + S390Vector vs_u32 = { .w[0] = 2, .w[1] = 32, .w[2] = 4096, .w[3] = 8888 }; + S390Vector vs_f32 = { .f[0] = 3.987, .f[1] = 5.123, + .f[2] = 4.499, .f[3] = 0.512 }; + + vd.d[0] = vd.d[1] = 0; + vcfps(&vd, &vs_i32, 2, M4_def, 0); + if (1 != vd.f[0] || 1024 != vd.f[2] || 64 != vd.f[1] || -10 != vd.f[3]) { + return 1; + } + + vd.d[0] = vd.d[1] = 0; + vcfpl(&vd, &vs_u32, 2, M4_def, 0); + if (2 != vd.f[0] || 4096 != vd.f[2] || 32 != vd.f[1] || 8888 != vd.f[3]) { + return 1; + } + + vd.d[0] = vd.d[1] = 0; + vcsfp(&vd, &vs_f32, 2, M4_def, 0); + if (4 != vd.w[0] || 4 != vd.w[2] || 5 != vd.w[1] || 1 != vd.w[3]) { + return 1; + } + + vd.d[0] = vd.d[1] = 0; + vclfp(&vd, &vs_f32, 2, M4_def, 0); + if (4 != vd.w[0] || 4 != vd.w[2] || 5 != vd.w[1] || 1 != vd.w[3]) { + return 1; + } + + return 0; +} diff --git a/tests/tcg/s390x/vxeh2_vlstr.c b/tests/tcg/s390x/vxeh2_vlstr.c new file mode 100644 index 0000000000..bf2954e86d --- /dev/null +++ b/tests/tcg/s390x/vxeh2_vlstr.c @@ -0,0 +1,146 @@ +/* + * vxeh2_vlstr: vector-enhancements facility 2 vector load/store reversed * + */ +#include + +typedef union S390Vector { + uint64_t d[2]; /* doubleword */ + uint32_t w[4]; /* word */ + uint16_t h[8]; /* halfword */ + uint8_t b[16]; /* byte */ + __uint128_t v; +} S390Vector; + +#define ES8 0 +#define ES16 1 +#define ES32 2 +#define ES64 3 + +#define vtst(v1, v2) \ + if (v1.d[0] != v2.d[0] || v1.d[1] != v2.d[1]) { \ + return 1; \ + } + +static inline void vler(S390Vector *v1, const void *va, uint8_t m3) +{ + asm volatile("vler %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vster(S390Vector *v1, const void *va, uint8_t m3) +{ + asm volatile("vster %[v1], 0(%[va]), %[m3]\n" + : [va] "+d" (va) + : [v1] "v" (v1->v) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vlbr(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vlbr %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vstbr(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vstbr %[v1], 0(%[va]), %[m3]\n" + : [va] "+d" (va) + : [v1] "v" (v1->v) + , [m3] "i" (m3) + : "memory"); +} + + +static inline void vlebrh(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vlebrh %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vstebrh(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vstebrh %[v1], 0(%[va]), %[m3]\n" + : [va] "+d" (va) + : [v1] "v" (v1->v) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vllebrz(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vllebrz %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + +static inline void vlbrrep(S390Vector *v1, void *va, const uint8_t m3) +{ + asm volatile("vlbrrep %[v1], 0(%[va]), %[m3]\n" + : [v1] "+v" (v1->v) + : [va] "d" (va) + , [m3] "i" (m3) + : "memory"); +} + + +int main(int argc, char *argv[]) +{ + S390Vector vd = { .d[0] = 0, .d[1] = 0 }; + S390Vector vs = { .d[0] = 0x8FEEDDCCBBAA9988ull, + .d[1] = 0x7766554433221107ull }; + + const S390Vector vt_v_er16 = { + .h[0] = 0x1107, .h[1] = 0x3322, .h[2] = 0x5544, .h[3] = 0x7766, + .h[4] = 0x9988, .h[5] = 0xBBAA, .h[6] = 0xDDCC, .h[7] = 0x8FEE }; + + const S390Vector vt_v_br16 = { + .h[0] = 0xEE8F, .h[1] = 0xCCDD, .h[2] = 0xAABB, .h[3] = 0x8899, + .h[4] = 0x6677, .h[5] = 0x4455, .h[6] = 0x2233, .h[7] = 0x0711 }; + + int ix; + uint64_t ss64 = 0xFEEDFACE0BADBEEFull, sd64 = 0; + + vler (&vd, &vs, ES16); vtst(vd, vt_v_er16); + vster(&vs, &vd, ES16); vtst(vd, vt_v_er16); + + vlbr (&vd, &vs, ES16); vtst(vd, vt_v_br16); + vstbr(&vs, &vd, ES16); vtst(vd, vt_v_br16); + + vlebrh(&vd, &ss64, 5); + if (0xEDFE != vd.h[5]) { + return 1; + } + + vstebrh(&vs, (uint8_t *)&sd64 + 4, 7); + if (0x0000000007110000ull != sd64) { + return 1; + } + + vllebrz(&vd, (uint8_t *)&ss64 + 3, 2); + for (ix = 0; ix < 4; ix++) { + if (vd.w[ix] != (ix != 1 ? 0 : 0xBEAD0BCE)) { + return 1; + } + } + + vlbrrep(&vd, (uint8_t *)&ss64 + 4, 1); + for (ix = 0; ix < 8; ix++) { + if (0xAD0B != vd.h[ix]) { + return 1; + } + } + + return 0; +} diff --git a/tests/tcg/s390x/vxeh2_vs.c b/tests/tcg/s390x/vxeh2_vs.c new file mode 100644 index 0000000000..04a3d4d7bb --- /dev/null +++ b/tests/tcg/s390x/vxeh2_vs.c @@ -0,0 +1,91 @@ +/* + * vxeh2_vs: vector-enhancements facility 2 vector shift + */ +#include + +typedef union S390Vector { + uint64_t d[2]; /* doubleword */ + uint32_t w[4]; /* word */ + uint16_t h[8]; /* halfword */ + uint8_t b[16]; /* byte */ + __uint128_t v; +} S390Vector; + +#define vtst(v1, v2) \ + if (v1.d[0] != v2.d[0] || v1.d[1] != v2.d[1]) { \ + return 1; \ + } + +static inline void vsl(S390Vector *v1, S390Vector *v2, S390Vector *v3) +{ + asm volatile("vsl %[v1], %[v2], %[v3]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v)); +} + +static inline void vsra(S390Vector *v1, S390Vector *v2, S390Vector *v3) +{ + asm volatile("vsra %[v1], %[v2], %[v3]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v)); +} + +static inline void vsrl(S390Vector *v1, S390Vector *v2, S390Vector *v3) +{ + asm volatile("vsrl %[v1], %[v2], %[v3]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v)); +} + +static inline void vsld(S390Vector *v1, S390Vector *v2, + S390Vector *v3, const uint8_t I) +{ + asm volatile("vsld %[v1], %[v2], %[v3], %[I]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v) + , [I] "i" (I & 7)); +} + +static inline void vsrd(S390Vector *v1, S390Vector *v2, + S390Vector *v3, const uint8_t I) +{ + asm volatile("vsrd %[v1], %[v2], %[v3], %[I]\n" + : [v1] "=v" (v1->v) + : [v2] "v" (v2->v) + , [v3] "v" (v3->v) + , [I] "i" (I & 7)); +} + +int main(int argc, char *argv[]) +{ + const S390Vector vt_vsl = { .d[0] = 0x7FEDBB32D5AA311Dull, + .d[1] = 0xBB65AA10912220C0ull }; + const S390Vector vt_vsra = { .d[0] = 0xF1FE6E7399AA5466ull, + .d[1] = 0x0E762A5188221044ull }; + const S390Vector vt_vsrl = { .d[0] = 0x11FE6E7399AA5466ull, + .d[1] = 0x0E762A5188221044ull }; + const S390Vector vt_vsld = { .d[0] = 0x7F76EE65DD54CC43ull, + .d[1] = 0xBB32AA2199108838ull }; + const S390Vector vt_vsrd = { .d[0] = 0x0E060802040E000Aull, + .d[1] = 0x0C060802040E000Aull }; + S390Vector vs = { .d[0] = 0x8FEEDDCCBBAA9988ull, + .d[1] = 0x7766554433221107ull }; + S390Vector vd = { .d[0] = 0, .d[1] = 0 }; + S390Vector vsi = { .d[0] = 0, .d[1] = 0 }; + + for (int ix = 0; ix < 16; ix++) { + vsi.b[ix] = (1 + (5 ^ ~ix)) & 7; + } + + vsl (&vd, &vs, &vsi); vtst(vd, vt_vsl); + vsra(&vd, &vs, &vsi); vtst(vd, vt_vsra); + vsrl(&vd, &vs, &vsi); vtst(vd, vt_vsrl); + vsld(&vd, &vs, &vsi, 3); vtst(vd, vt_vsld); + vsrd(&vd, &vs, &vsi, 15); vtst(vd, vt_vsrd); + + return 0; +} diff --git a/tests/tcg/s390x/Makefile.target b/tests/tcg/s390x/Makefile.target index 257c568c58..badb7b16fe 100644 --- a/tests/tcg/s390x/Makefile.target +++ b/tests/tcg/s390x/Makefile.target @@ -16,6 +16,14 @@ TESTS+=shift TESTS+=trap TESTS+=signals-s390x +VECTOR_TESTS=vxeh2_vs +VECTOR_TESTS+=vxeh2_vcvt +VECTOR_TESTS+=vxeh2_vlstr + +TESTS+=$(VECTOR_TESTS) + +$(VECTOR_TESTS): CFLAGS+=-march=z15 -O2 + ifneq ($(HAVE_GDB_BIN),) GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py From patchwork Tue Mar 8 01:53:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1602685 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=q+qhzH3a; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KCJWw5Z6pz9sGC for ; Tue, 8 Mar 2022 13:03:24 +1100 (AEDT) Received: from localhost ([::1]:60596 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nRPC6-00055A-Qn for incoming@patchwork.ozlabs.org; Mon, 07 Mar 2022 21:03:22 -0500 Received: from eggs.gnu.org ([209.51.188.92]:54834) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nRP3M-0006s0-5d for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:20 -0500 Received: from [2607:f8b0:4864:20::102e] (port=56190 helo=mail-pj1-x102e.google.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1nRP3K-0007zM-AK for qemu-devel@nongnu.org; Mon, 07 Mar 2022 20:54:19 -0500 Received: by mail-pj1-x102e.google.com with SMTP id k92so6649794pjh.5 for ; Mon, 07 Mar 2022 17:54:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pGFeTXonQy0rWrVtOsYjIVO+LsR7JRQAF9mj6S5D/+U=; b=q+qhzH3a4WZrLlJxxBsELFVMnfCK8i3qw1FHUhgXJKfk8Hez6AAnrS54mzWBZDGO3k DCDiAk/A/e+MI4GAV/tXqBWMaAXzE2y8zIBcVxwiqFiR6xkUrlz/U7JPxO0pRlSPigmB opxjY0KzftyNpO1bMycRemPC0WFs4hEob4PxCJEaCCzg3ptoIQ+KqGuuePQOCHVbo30X NgxIP+IbMibbIhQF+DtobcrXzkLlaMpYqShuCrJ9g/Ao1l5KfgG92P3vblJNGvsSewZx wnwQbtpRNY+bo0OA50zcH2nz/x4/p9i+aG+FV8ElMFOJyq9KhUEm5W2fsieNGI8mVjQ3 Y3XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=pGFeTXonQy0rWrVtOsYjIVO+LsR7JRQAF9mj6S5D/+U=; b=a2H2iVzoqvkZMenrBCDL4wm3DLkaYyiW6cX5Hwlkqlt62r4y9/J/HUPfE5zQmugUXZ ssjwyAShIKgqaiXxU8ieGr10Bp0BJZpuQ4QSvzIn1vzFm8N3lM9cCJ7MxlDurHSgHif3 YRFErA/DDgnxbRTaVfq3+xml3/W/t5Z1yyTLm1K4fOWID3LfrxN+LWzQOh1coNMR8UEw 8gHYZYztZhSrtBx5o6PLm6XgRo/N03DB0qrah4gHk5Sq1I5URbfX3O3Md2CiX8Dkqf9D B6lOat2KPahABNysmnAs/IFPZe4cHaW4RPCJNCyh7YydQVJGZtCdYMn52gbqngQRKR59 G6cA== X-Gm-Message-State: AOAM531AEfqLg+iIzi2vHlmmAfQlz3xrgbEltays5ojMk1JGZh8v1FAR k2fMdTxW4Q4Z7u+PrQO26Z1fN3SbE7JKnw== X-Google-Smtp-Source: ABdhPJz3V6pWfudMGMqbatuvjyZsaIZSsfFmHAk+bNvs93d/pz3OG1ySptIacX0upOcPxl8mj0WPvg== X-Received: by 2002:a17:90a:ab17:b0:1b9:b61a:aadb with SMTP id m23-20020a17090aab1700b001b9b61aaadbmr2070713pjq.77.1646704457002; Mon, 07 Mar 2022 17:54:17 -0800 (PST) Received: from localhost.localdomain (cpe-50-113-46-110.hawaii.res.rr.com. [50.113.46.110]) by smtp.gmail.com with ESMTPSA id bh3-20020a056a02020300b00378b62df320sm12775221pgb.73.2022.03.07.17.54.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Mar 2022 17:54:16 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 11/11] target/s390x: Fix writeback to v1 in helper_vstl Date: Mon, 7 Mar 2022 15:53:58 -1000 Message-Id: <20220308015358.188499-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308015358.188499-1-richard.henderson@linaro.org> References: <20220308015358.188499-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::102e (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PDS_HP_HELO_NORDNS=0.659, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, dmiller423@gmail.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Copy-paste error from vector load length -- do not write zeros back to v1 after storing from v1. Signed-off-by: Richard Henderson Reviewed-by: David Hildenbrand --- target/s390x/tcg/vec_helper.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/s390x/tcg/vec_helper.c b/target/s390x/tcg/vec_helper.c index ededf13cf0..48d86722b2 100644 --- a/target/s390x/tcg/vec_helper.c +++ b/target/s390x/tcg/vec_helper.c @@ -200,7 +200,6 @@ void HELPER(vstl)(CPUS390XState *env, const void *v1, uint64_t addr, addr = wrap_address(env, addr + 8); cpu_stq_data_ra(env, addr, s390_vec_read_element64(v1, 1), GETPC()); } else { - S390Vector tmp = {}; int i; for (i = 0; i < bytes; i++) { @@ -209,6 +208,5 @@ void HELPER(vstl)(CPUS390XState *env, const void *v1, uint64_t addr, cpu_stb_data_ra(env, addr, byte, GETPC()); addr = wrap_address(env, addr + 1); } - *(S390Vector *)v1 = tmp; } }