From patchwork Wed Mar 2 11:47:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599744 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=gVXiw0yF; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4K7sqw1tjTz9sGC for ; Wed, 2 Mar 2022 22:50:20 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E7C4B83CC6; Wed, 2 Mar 2022 12:49:54 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="gVXiw0yF"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id D671C83C8F; Wed, 2 Mar 2022 12:49:44 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id ABBB783C7F for ; Wed, 2 Mar 2022 12:49:35 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id E548AB81F71; Wed, 2 Mar 2022 11:49:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 595D1C340E9; Wed, 2 Mar 2022 11:49:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1646221773; bh=STQYuZY7dmL7apQwec6Ocs4Kne6prSePk7O9AdHrm58=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gVXiw0yFTV8OkqZ+UztstROL141x5VL10UOoiPTBiWpgksL1eX4EGUriVEQjWer70 qGHD/VhvhdQn6Nb1cmRIkEuUbQf/3O9kOGmREdjf9dSEdriZCzVSw0h9dpWPP38fkw LIF1ShuBtUeVjSN7RdKFFjmWCd89OiYYGMiEfPWR6hUETEjC4koU4BITXyMjAyEcQo FJm/eBXvdcx2iZ664S0ct59zblxH6adKVSMdIl5EMngVd/hOxUK0aNdIHpCAMSVHtq BdL+rG8Xt3aiOBD3qZZ6TWBy9Kw/JlPngAj32bYZ5cyN3nTIQFIvb6GCDYehQ8mf8n xBmUPYHAONOug== Received: by pali.im (Postfix) id A7B1195D; Wed, 2 Mar 2022 12:49:30 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 1/8] env: sf: Allow to use env_sf_init_addr() at any stage Date: Wed, 2 Mar 2022 12:47:51 +0100 Message-Id: <20220302114758.21787-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean In some cases it makes sense to use env_sf_init_addr() also in SPL mode. Allow it for boards by providing custom implementation of weak function env_sf_get_env_addr(). When this function returns NULL it signals that address is invalid, like config option CONFIG_ENV_ADDR. There is no change in default behavior or in config options. Signed-off-by: Pali Rohár --- env/sf.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/env/sf.c b/env/sf.c index 6a4bb756f006..d2c07cd71687 100644 --- a/env/sf.c +++ b/env/sf.c @@ -24,10 +24,6 @@ #include #include -#ifndef CONFIG_SPL_BUILD -#define INITENV -#endif - #define OFFSET_INVALID (~(u32)0) #ifdef CONFIG_ENV_OFFSET_REDUND @@ -322,14 +318,15 @@ done: return ret; } -#if CONFIG_ENV_ADDR != 0x0 __weak void *env_sf_get_env_addr(void) { +#ifndef CONFIG_SPL_BUILD return (void *)CONFIG_ENV_ADDR; -} +#else + return NULL; #endif +} -#if defined(INITENV) && (CONFIG_ENV_ADDR != 0x0) /* * check if Environment on CONFIG_ENV_ADDR is valid. */ @@ -337,6 +334,9 @@ static int env_sf_init_addr(void) { env_t *env_ptr = (env_t *)env_sf_get_env_addr(); + if (!env_ptr) + return -ENOENT; + if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) { gd->env_addr = (ulong)&(env_ptr->data); gd->env_valid = ENV_VALID; @@ -346,7 +346,6 @@ static int env_sf_init_addr(void) return 0; } -#endif #if defined(CONFIG_ENV_SPI_EARLY) /* @@ -432,9 +431,10 @@ out: static int env_sf_init(void) { -#if defined(INITENV) && (CONFIG_ENV_ADDR != 0x0) - return env_sf_init_addr(); -#elif defined(CONFIG_ENV_SPI_EARLY) + int ret = env_sf_init_addr(); + if (ret != -ENOENT) + return ret; +#ifdef CONFIG_ENV_SPI_EARLY return env_sf_init_early(); #endif /* From patchwork Wed Mar 2 11:47:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599743 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=J0308jnH; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; 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Wed, 2 Mar 2022 12:49:31 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 2/8] arm: mvebu: turris_omnia: Provide env_sf_get_env_addr() function Date: Wed, 2 Mar 2022 12:47:52 +0100 Message-Id: <20220302114758.21787-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean BootROM maps SPI Flash to fixed address 0xD4000000 and this mapping is active also when BootROM is executing binary kwbimage headers, which includes also U-Boot SPL. Therefore no initialization code is required to access SPI Flags from U-Boot SPL. In proper U-Boot it is remapped to other location. So in mvebu implementation of env_sf_get_env_addr() function returns 0xD4000000 when running in SPL and NULL when in proper U-Boot. This change would allow to use U-Boot ENV in U-Boot SPL. Normally it is not possible to read ENV because it is too big and U-Boot SPL does not have such big malloc() pool to real all ENV variables. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún --- board/CZ.NIC/turris_omnia/turris_omnia.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 33cec6587e19..a93af6c5b877 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -243,6 +243,16 @@ static bool omnia_detect_sata(void) return stsword & MSATA_IND_STSBIT ? true : false; } +void *env_sf_get_env_addr(void) +{ + /* SPI Flash is mapped to address 0xD4000000 only in SPL */ +#ifdef CONFIG_SPL_BUILD + return (void *)0xD4000000 + CONFIG_ENV_OFFSET; +#else + return NULL; +#endif +} + int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) { if (omnia_detect_sata()) { From patchwork Wed Mar 2 11:47:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599746 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Wed, 2 Mar 2022 12:49:32 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 3/8] arm: mvebu: turris_omnia: Enable ENV support in SPL Date: Wed, 2 Mar 2022 12:47:53 +0100 Message-Id: <20220302114758.21787-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Allow to read ENV variables also in SPL on Turris Omnia. Signed-off-by: Pali Rohár --- configs/turris_omnia_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 280dd55f001b..9f633583022c 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -37,6 +37,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y From patchwork Wed Mar 2 11:47:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599745 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=JVEuRxCT; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4K7sr64Z83z9sGC for ; Wed, 2 Mar 2022 22:50:30 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C5FEA83CB4; Wed, 2 Mar 2022 12:49:58 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="JVEuRxCT"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 25B5583C8E; Wed, 2 Mar 2022 12:49:44 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 312EA83C8F for ; Wed, 2 Mar 2022 12:49:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id A837AB81FA3; Wed, 2 Mar 2022 11:49:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 107AEC340F2; Wed, 2 Mar 2022 11:49:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1646221774; bh=qa73eCUwcMNRMjHFXqJQ9E9y3angbqpozPreyXV/0mY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JVEuRxCT16YTYLUP2VMHa0VLJbca00BoMe1QkClYxmCV2+KsKx48WOxTQSw8ZfTYq VSXYGlUijBo9LprvtKQuy7uZxn+hOHFI2FozTFNdtm46D3JVhBlgdMEU70qXQru7lg 1iFj5+zTlVaIxcy0DDmEwmYjrMCNXQAC//XV9vFHL9ap+0QbBBKSstDTVi5i1SXQla wUgqh8zImo5Ym546QRBvNehES1owfLDMxpfhxu97/Otq7uy+bR9/nw0EKjB1MvY0bJ 4FMu7KvVhCSA3WZv7RoomcMwlM/eTo1A/4+oXW7xDuwQmAdgOn1J354M6AKeXznDnE fgYcCrUGjOmMQ== Received: by pali.im (Postfix) id BCCBD677; Wed, 2 Mar 2022 12:49:33 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 4/8] arm: mvebu: turris_omnia: Define only one serdes map variable Date: Wed, 2 Mar 2022 12:47:54 +0100 Message-Id: <20220302114758.21787-5-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean By default use primary serdes map with PCIe function in combined miniPCIe/mSATA slot. When SATA is detected change serdes map variable at runtime. Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 23 ++++++++--------------- 1 file changed, 8 insertions(+), 15 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index a93af6c5b877..d4c41bb1797a 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -93,7 +93,7 @@ enum status_word_bits { #define OMNIA_GPP_POL_LOW 0x0 #define OMNIA_GPP_POL_MID 0x0 -static struct serdes_map board_serdes_map_pex[] = { +static struct serdes_map board_serdes_map[] = { {PEX0, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, @@ -102,15 +102,6 @@ static struct serdes_map board_serdes_map_pex[] = { {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0} }; -static struct serdes_map board_serdes_map_sata[] = { - {SATA0, SERDES_SPEED_6_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {USB3_HOST0, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX1, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {USB3_HOST1, SERDES_SPEED_5_GBPS, SERDES_DEFAULT_MODE, 0, 0}, - {PEX2, SERDES_SPEED_5_GBPS, PEX_ROOT_COMPLEX_X1, 0, 0}, - {SGMII2, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0} -}; - static struct udevice *omnia_get_i2c_chip(const char *name, uint addr, uint offset_len) { @@ -256,13 +247,15 @@ void *env_sf_get_env_addr(void) int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) { if (omnia_detect_sata()) { - *serdes_map_array = board_serdes_map_sata; - *count = ARRAY_SIZE(board_serdes_map_sata); - } else { - *serdes_map_array = board_serdes_map_pex; - *count = ARRAY_SIZE(board_serdes_map_pex); + /* Change SerDes for first mPCIe port (mSATA) from PCIe to SATA */ + board_serdes_map[0].serdes_type = SATA0; + board_serdes_map[0].serdes_speed = SERDES_SPEED_6_GBPS; + board_serdes_map[0].serdes_mode = SERDES_DEFAULT_MODE; } + *serdes_map_array = board_serdes_map; + *count = ARRAY_SIZE(board_serdes_map); + return 0; } From patchwork Wed Mar 2 11:47:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599750 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Wed, 2 Mar 2022 11:49:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 31483C340E9; Wed, 2 Mar 2022 11:49:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1646221775; bh=bBDIKaKO6KJdEcXZcnDuDRRlN+KAq7HuGEelarm7BLY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YkB7nk+oHKbwC/6aUOzXhs8vADgZcSwMAmjkoZ7YSqnWcUIjrJBk6zJwVbZ4TnheG HtoZfOW4lxybxNvhM3gyjeeqHeF7SWY6pOAt5Ew/NDf/4FhB09Nt3msoYFwvLnF9hv Fmk3D0chppCoY/yKMLTPizqepRjSN0I8HGMzizminR5uHhR2aaRrS+vr1ygXcq5FT4 jViY6Ub87zxbspgVStEKwD19G7W1cFtbpX3QemlpHBW/CV0HFBHD9jPYaL/j6ceNpK WEJ60BGVblzwA0EhRbi/Tk7tD9YfArpnJZdNRW6/Dpy0cAPStoLYCMa/r3keVm6NhE vwONLPaeQP/gw== Received: by pali.im (Postfix) id DEF6E677; Wed, 2 Mar 2022 12:49:34 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 5/8] arm: mvebu: turris_omnia: Allow to configure mSATA slot via env variable Date: Wed, 2 Mar 2022 12:47:55 +0100 Message-Id: <20220302114758.21787-6-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Some PCIe-based MiniPCIe cards are broken and they do not ground PIN 43 which is required by PCIe mini CEM specs. Such broken cards are incorrectly detected as mSATA cards because SATA specs requires that PIN 43 on mSATA cards has to be disconnected. PIN 43 on Turris Omnia is used only for MiniPCIe/mSATA card detection by software in U-Boot SPL. Allow to override that U-Boot SPL detection by a new "omnia_msata_slot" env variable (to value "pcie" or "sata") so broken MiniPCIe cards can be used in combo mSATA/MiniPCIe slot too. As configuration of PCIe vs SATA functionality is done in U-Boot SPL, it is required to change env variable in permanent storage and reset the board to take effect. To force PCIe mode for broken MiniPCIe cards, call U-Boot commands: => setenv omnia_msata_slot pcie => saveenv => reset Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 27 ++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index d4c41bb1797a..6a057ea7dd70 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -207,13 +207,25 @@ static bool disable_mcu_watchdog(void) return true; } -static bool omnia_detect_sata(void) +static bool omnia_detect_sata(const char *msata_slot) { int ret; u16 stsword; puts("MiniPCIe/mSATA card detection... "); + if (msata_slot) { + if (strcmp(msata_slot, "pcie") == 0) { + puts("forced to MiniPCIe via env\n"); + return false; + } else if (strcmp(msata_slot, "sata") == 0) { + puts("forced to mSATA via env\n"); + return true; + } else if (strcmp(msata_slot, "auto") != 0) { + printf("unsupported env value '%s', fallback to... ", msata_slot); + } + } + ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword)); if (ret) { printf("omnia_mcu_read failed: %i, defaulting to MiniPCIe card\n", @@ -246,7 +258,18 @@ void *env_sf_get_env_addr(void) int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) { - if (omnia_detect_sata()) { +#ifdef CONFIG_SPL_ENV_SUPPORT + /* Do not use env_load() as malloc() pool is too small at this stage */ + bool has_env = (env_init() == 0); +#endif + const char *env_value = NULL; + +#ifdef CONFIG_SPL_ENV_SUPPORT + /* beware that env_get() returns static allocated memory */ + env_value = has_env ? env_get("omnia_msata_slot") : NULL; +#endif + + if (omnia_detect_sata(env_value)) { /* Change SerDes for first mPCIe port (mSATA) from PCIe to SATA */ board_serdes_map[0].serdes_type = SATA0; board_serdes_map[0].serdes_speed = SERDES_SPEED_6_GBPS; From patchwork Wed Mar 2 11:47:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599747 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 96 +++++++++++++----------- 1 file changed, 52 insertions(+), 44 deletions(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 6a057ea7dd70..57b797db4a8e 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -518,11 +518,54 @@ void spl_board_init(void) #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) || IS_ENABLED(CONFIG_OF_BOARD_SETUP) -static void fixup_serdes_0_nodes(void *blob) +static void disable_sata_node(void *blob) { - bool mode_sata; int node; + fdt_for_each_node_by_compatible(node, blob, -1, "marvell,armada-380-ahci") { + if (!fdtdec_get_is_enabled(blob, node)) + continue; + + if (fdt_status_disabled(blob, node) < 0) + printf("Cannot disable SATA DT node!\n"); + else + debug("Disabled SATA DT node\n"); + + break; + } +} + +static void disable_pcie_node(void *blob, int port) +{ + int node; + + fdt_for_each_node_by_compatible(node, blob, -1, "marvell,armada-370-pcie") { + int port_node; + + if (!fdtdec_get_is_enabled(blob, node)) + continue; + + fdt_for_each_subnode (port_node, blob, node) { + if (!fdtdec_get_is_enabled(blob, port_node)) + continue; + + if (fdtdec_get_int(blob, port_node, "marvell,pcie-port", -1) != port) + continue; + + if (fdt_status_disabled(blob, port_node) < 0) + printf("Cannot disable PCIe port %d DT node!\n", port); + else + debug("Disabled PCIe port %d DT node\n", port); + + return; + } + } +} + +static void fixup_msata_port_nodes(void *blob) +{ + bool mode_sata; + /* * Determine if SerDes 0 is configured to SATA mode. * We do this instead of calling omnia_detect_sata() to avoid another @@ -541,47 +584,12 @@ static void fixup_serdes_0_nodes(void *blob) return; } - /* If mSATA card is not present, disable SATA DT node */ if (!mode_sata) { - fdt_for_each_node_by_compatible(node, blob, -1, - "marvell,armada-380-ahci") { - if (!fdtdec_get_is_enabled(blob, node)) - continue; - - if (fdt_status_disabled(blob, node) < 0) - printf("Cannot disable SATA DT node!\n"); - else - debug("Disabled SATA DT node\n"); - - break; - } - - return; - } - - /* Otherwise disable PCIe port 0 DT node (MiniPCIe / mSATA port) */ - fdt_for_each_node_by_compatible(node, blob, -1, - "marvell,armada-370-pcie") { - int port; - - if (!fdtdec_get_is_enabled(blob, node)) - continue; - - fdt_for_each_subnode (port, blob, node) { - if (!fdtdec_get_is_enabled(blob, port)) - continue; - - if (fdtdec_get_int(blob, port, "marvell,pcie-port", - -1) != 0) - continue; - - if (fdt_status_disabled(blob, port) < 0) - printf("Cannot disable PCIe port 0 DT node!\n"); - else - debug("Disabled PCIe port 0 DT node\n"); - - return; - } + /* If mSATA card is not present, disable SATA DT node */ + disable_sata_node(blob); + } else { + /* Otherwise disable PCIe port 0 DT node (MiniPCIe / mSATA port) */ + disable_pcie_node(blob, 0); } } @@ -590,7 +598,7 @@ static void fixup_serdes_0_nodes(void *blob) #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) int board_fix_fdt(void *blob) { - fixup_serdes_0_nodes(blob); + fixup_msata_port_nodes(blob); return 0; } @@ -828,7 +836,7 @@ fail: int ft_board_setup(void *blob, struct bd_info *bd) { fixup_spi_nor_partitions(blob); - fixup_serdes_0_nodes(blob); + fixup_msata_port_nodes(blob); return 0; } From patchwork Wed Mar 2 11:47:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599752 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=vHGxlkuC; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4K7ss40yrfz9sGC for ; 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Wed, 2 Mar 2022 12:49:36 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 7/8] arm: mvebu: turris_omnia: Signal error when sata/pcie DT mode Date: Wed, 2 Mar 2022 12:47:57 +0100 Message-Id: <20220302114758.21787-8-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Show error message when DT file does not contain sata or pcie node which should be explicitly disabled. This can happen when U-Boot code for finding those nodes is incomplete or when those DT nodes are in different unexpected location. In any case it is needed to know if DT not was not explicitly disabled as it could mean that combo slots where setup incorrectly. Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index 57b797db4a8e..e2f4daa827ed 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -531,8 +531,10 @@ static void disable_sata_node(void *blob) else debug("Disabled SATA DT node\n"); - break; + return; } + + printf("Cannot find SATA DT node!\n"); } static void disable_pcie_node(void *blob, int port) @@ -560,6 +562,8 @@ static void disable_pcie_node(void *blob, int port) return; } } + + printf("Cannot find PCIe port %d DT node!\n", port); } static void fixup_msata_port_nodes(void *blob) From patchwork Wed Mar 2 11:47:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 1599753 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Wed, 2 Mar 2022 12:49:37 +0100 (CET) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Stefan Roese , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: u-boot@lists.denx.de Subject: [PATCH u-boot-marvell 8/8] arm: mvebu: turris_omnia: Add support for USB3.0 mode in WWAN MiniPCIe slot Date: Wed, 2 Mar 2022 12:47:58 +0100 Message-Id: <20220302114758.21787-9-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220302114758.21787-1-pali@kernel.org> References: <20220302114758.21787-1-pali@kernel.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean PCIe Mini CEM 2.1 spec added support for USB3.0 mode on MiniPCIe cards. USB3.0 and PCIe share same pins and only one function can be active at the same time. PCIe Mini CEM 2.1 spec says that determining function is platform specific and spec does not define any dedicated pin which could say if card is USB3.0-based or PCIe-based. Implement this platform specific decision (USB3.0 vs PCIe) for WWAN MiniPCIe slot on Turris Omnia via U-Boot env variable "omnia_wwan_slot", similarly like is implemented forced mode for MiniPCIe/mSATA slot via "omnia_msata_slot" env variable. Value "usb3" for "omnia_wwan_slot" would mean to set USB3.0 mode and value "pcie" original PCIe mode. A385 SoC on Turris Omnia has configurable fifth SerDes line (exported to MiniPCIe WWAN slot with SIM card) either to USB3.0 or PCIe functionality, so implementation of this new PCIe Mini CEM 2.1 feature is simple, by just configuring SerDes to USB 3.0 mode. Other twos MiniPCIe slots on Turris Omnia do not have this new functionality as their SerDes lines cannot be switched to USB3.0 functionality. Note that A385 SoC does not have too many USB3.0 blocks, so activating USB3.0 in MiniPCIe cause that one external USB3.0 USB-A port would loose USB3.0 functionality and would be downgraded just to USB2.0. By default this MiniPCIe WWAN slot is in PCIe mode, like before. To set this MiniPCIe WWAN slot to USB3.0 mode, call U-Boot commands: => setenv omnia_wwan_slot usb3 => saveenv => reset Signed-off-by: Pali Rohár --- board/CZ.NIC/turris_omnia/turris_omnia.c | 57 ++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c index e2f4daa827ed..83cfc80d1930 100644 --- a/board/CZ.NIC/turris_omnia/turris_omnia.c +++ b/board/CZ.NIC/turris_omnia/turris_omnia.c @@ -246,6 +246,22 @@ static bool omnia_detect_sata(const char *msata_slot) return stsword & MSATA_IND_STSBIT ? true : false; } +static bool omnia_detect_wwan_usb3(const char *wwan_slot) +{ + puts("WWAN slot configuration... "); + + if (wwan_slot && strcmp(wwan_slot, "usb3") == 0) { + puts("USB3.0\n"); + return true; + } + + if (wwan_slot && strcmp(wwan_slot, "pcie") != 0) + printf("unsupported env value '%s', fallback to... ", wwan_slot); + + puts("PCIe+USB2.0\n"); + return false; +} + void *env_sf_get_env_addr(void) { /* SPI Flash is mapped to address 0xD4000000 only in SPL */ @@ -276,6 +292,20 @@ int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) board_serdes_map[0].serdes_mode = SERDES_DEFAULT_MODE; } +#ifdef CONFIG_SPL_ENV_SUPPORT + /* beware that env_get() returns static allocated memory */ + env_value = has_env ? env_get("omnia_wwan_slot") : NULL; +#endif + + if (omnia_detect_wwan_usb3(env_value)) { + /* Disable SerDes for USB 3.0 pins on the front USB-A port */ + board_serdes_map[1].serdes_type = DEFAULT_SERDES; + /* Change SerDes for third mPCIe port (WWAN) from PCIe to USB 3.0 */ + board_serdes_map[4].serdes_type = USB3_HOST0; + board_serdes_map[4].serdes_speed = SERDES_SPEED_5_GBPS; + board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE; + } + *serdes_map_array = board_serdes_map; *count = ARRAY_SIZE(board_serdes_map); @@ -597,12 +627,38 @@ static void fixup_msata_port_nodes(void *blob) } } +static void fixup_wwan_port_nodes(void *blob) +{ + bool mode_usb3; + + /* Determine if SerDes 4 is configured to USB3 mode */ + mode_usb3 = ((readl(MVEBU_REGISTER(0x183fc)) & GENMASK(19, 16)) >> 16) == 4; + + /* If SerDes 4 is not configured to USB3 mode then nothing is needed to fixup */ + if (!mode_usb3) + return; + + /* + * We're either adding status = "disabled" property, or changing + * status = "okay" to status = "disabled". In both cases we'll need more + * space. Increase the size a little. + */ + if (fdt_increase_size(blob, 32) < 0) { + printf("Cannot increase FDT size!\n"); + return; + } + + /* Disable PCIe port 2 DT node (WWAN) */ + disable_pcie_node(blob, 2); +} + #endif #if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) int board_fix_fdt(void *blob) { fixup_msata_port_nodes(blob); + fixup_wwan_port_nodes(blob); return 0; } @@ -841,6 +897,7 @@ int ft_board_setup(void *blob, struct bd_info *bd) { fixup_spi_nor_partitions(blob); fixup_msata_port_nodes(blob); + fixup_wwan_port_nodes(blob); return 0; }