From patchwork Wed Feb 14 15:50:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 873387 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ivWT43tH"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zhP4b4VD2z9t2x for ; Thu, 15 Feb 2018 02:50:23 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 5B087C2205F; Wed, 14 Feb 2018 15:50:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 75335C21FF2; Wed, 14 Feb 2018 15:50:17 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 80427C21FF2; Wed, 14 Feb 2018 15:50:15 +0000 (UTC) Received: from mail-pl0-f67.google.com (mail-pl0-f67.google.com [209.85.160.67]) by lists.denx.de (Postfix) with ESMTPS id C81B4C21F4D for ; Wed, 14 Feb 2018 15:50:14 +0000 (UTC) Received: by mail-pl0-f67.google.com with SMTP id p5so8730704plo.12 for ; Wed, 14 Feb 2018 07:50:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=SERP9Ll5jUyj15m1ExcIYLWabqRvHQSqNy+N1yHL8dY=; b=ivWT43tH7BSPOHer1aS+gyPLqrIzn0Ezp3kobBHYSfMjyOgKhy1mrm/1xCEf8VdG1j d7aUsX8WCA0yvcZEqYP1prS1baQTJJ5lpbJNWc8OlQXkrVslUpM418kyVGFeRfJTU3qy JCxp4IvOPrloGffY8/bnOAiHoPiSygRDOpBfETaC79xvzSRg+x2dXUjogMIxLZcS7lG3 KtBXHuDKGbI7gefVltuBndTkpiz3Z42y7zqgLpcAQnAukaCHamrhcN2IyfvQA5ri97C+ +vDho2XeJH1DmqfFTau1gVROxzCXCdTZC5XCTBngVo7Y6C8vVU6YFWSCbpWVXc/7qBjt R2Lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=SERP9Ll5jUyj15m1ExcIYLWabqRvHQSqNy+N1yHL8dY=; b=cxFO/S3cfypmhgWygVTDMNplH1NkkjkO1sTctVF6vb0k1ko+9/3IhtHgjpo9SqpfGO 0Xy6NDDTKsaCYqeI67v3QGKY1iYC5WjdF/Pu0a/4W7hIGKRRYZcwccAr7AChxJmND+hG VuHpU4UmqNLAX6htKZ/9To05mxQ0fozDNMVWii1Xk8yQTPA0xO+2Y0zJI5/AhyY0ZaqH DcvXwt9RjtvuGvxEBs5eBU3O3lj1rsbY15ZIVXHjCVVWJf/TLOHTEpl3omJuu2Yb2zOQ Iap3tysrhFnNPnVYJuN9LDkT1F84T29HGlB0XbbsiN902472BqHHQDq6UGRHHsiJSVO5 e31Q== X-Gm-Message-State: APf1xPDKMOzYosq5KUHus3lPlYY51Bej8dkIktlUDvqOOOH/Clk2UGOj /SVhp1MvKgsowMMGZOJI4OQ= X-Google-Smtp-Source: AH8x22757tzK501t0/XBDST2C2Xfs8FVloFb41z7ADhWdtELwdIyUP+orsoe/uRdsQiwOAX3MCblpw== X-Received: by 2002:a17:902:8a4:: with SMTP id 33-v6mr4796580pll.279.1518623413123; Wed, 14 Feb 2018 07:50:13 -0800 (PST) Received: from localhost.localdomain ([183.82.224.167]) by smtp.gmail.com with ESMTPSA id c1sm10288352pfa.126.2018.02.14.07.50.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Feb 2018 07:50:12 -0800 (PST) From: Jagan Teki X-Google-Original-From: Jagan Teki To: Philipp Tomsich Date: Wed, 14 Feb 2018 21:20:05 +0530 Message-Id: <1518623406-22992-1-git-send-email-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.7.4 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/2] rockchip: rk3288: Add TPL_LDSCRIPT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Due to size limitations in SPL by adding falcon mode, rk3288 support TPL. In order to not overlap SPL_TEXT_BASE add TPL_TEXT_BASE with u-boot-tpl.lds that intern call u-boot-spl.lds with proper TEXT_BASE values. Signed-off-by: Jagan Teki Acked-by: Philipp Tomsich --- arch/arm/mach-rockchip/Kconfig | 7 +++++++ arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds | 10 ++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1e5a7bb..d9218da 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -72,6 +72,13 @@ config ROCKCHIP_RK3288 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. +if ROCKCHIP_RK3288 + +config TPL_LDSCRIPT + default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds" + +endif + config ROCKCHIP_RK3328 bool "Support Rockchip RK3328" select ARM64 diff --git a/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds new file mode 100644 index 0000000..c7a6092 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds @@ -0,0 +1,10 @@ +/* + * Copyright (C) 2018 Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#undef CONFIG_SPL_TEXT_BASE +#define CONFIG_SPL_TEXT_BASE CONFIG_TPL_TEXT_BASE + +#include "../../cpu/u-boot-spl.lds" From patchwork Wed Feb 14 15:50:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 873388 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DBVUy2jX"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zhP5r5Cpxz9t34 for ; Thu, 15 Feb 2018 02:51:28 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 64D8FC21FF2; Wed, 14 Feb 2018 15:50:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 5721CC22060; Wed, 14 Feb 2018 15:50:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7B824C22059; Wed, 14 Feb 2018 15:50:21 +0000 (UTC) Received: from mail-pg0-f67.google.com (mail-pg0-f67.google.com [74.125.83.67]) by lists.denx.de (Postfix) with ESMTPS id B0441C2204C for ; Wed, 14 Feb 2018 15:50:17 +0000 (UTC) Received: by mail-pg0-f67.google.com with SMTP id t4so2070204pgp.8 for ; Wed, 14 Feb 2018 07:50:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7Zf/zMHzWEAM5uk58YUVbM6F0RJV1lEVsuFAValB4q0=; b=DBVUy2jXn5a7Hs24MRnZb9TH3PVaRs7mhIUvYDBCWot8cjLL5RLTYQtUAtu/rYgx9U HMc3vWSD4+7KKiV1UJ+/Ku7Yrl+LXP4TcQapkDlMQxBlgutglsV4s8tQywG5ob5iWE14 AE36Qluv2QKFfSPD08/FZJFdo56AcIStBxsG1dbvPU8YOK6o18pzDE0YdIHHfVPw1qnq TAU3Ac4LiNueUay7jU2G8ZTkwmaUlpElkfvV4AR+vyknvXzZPkr63zGBbF13t20Hl+Xb 3dkfN1IibKvwWsLLtRJc6bBmR6W4EgMWbWghz6Ew0BtwhaeveFZ+rAA4acgDZ9ma29ki zOZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7Zf/zMHzWEAM5uk58YUVbM6F0RJV1lEVsuFAValB4q0=; b=ZZD8ng/3wuG0xw2wvSBuvdD3LQ2uIHhoZstxPHyo/TijJozcpVZhdfekVW5P0kE7IS 32mXlSUciBwwVnqtkRuYOEAxi96Pik/jSi0ElV1vhwa4M4SXWUeFfT8kTcFmQEVGLptb sNtuabnd0ZBLzjcMueep+IYLsrApTbmm3mEoOPeWZySiFpjLq2tTbf70p4CxBF4jx6vt SS1Myxo6+ktqVFrgcJpjWj8o6r+Y8Jy83Ecvmjup8HI+PB3uGCyfBTfjG5EsV+tOdZqY s/nxIH7j75J4HdmsaPFYXs2Fys0V/aTXgrOu8neGSmz3h7Ja1I70LHa16krtVXqWzXr6 1tnw== X-Gm-Message-State: APf1xPAUAXi6WXYH9WGoq99zegyX50GLfFKCUaLzmJHBtZjELQQmfbPc oNo2lyEdqbjFy3GmiyCg31g= X-Google-Smtp-Source: AH8x226xsrGrNtx2bfQWYieFR6LhKwLET8SMWvDcuUz26ZcD/m2KHACoU3YYrL8tQBOL8noInlcPmw== X-Received: by 10.99.96.206 with SMTP id u197mr4123829pgb.261.1518623416050; Wed, 14 Feb 2018 07:50:16 -0800 (PST) Received: from localhost.localdomain ([183.82.224.167]) by smtp.gmail.com with ESMTPSA id c1sm10288352pfa.126.2018.02.14.07.50.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Feb 2018 07:50:15 -0800 (PST) From: Jagan Teki X-Google-Original-From: Jagan Teki To: Philipp Tomsich Date: Wed, 14 Feb 2018 21:20:06 +0530 Message-Id: <1518623406-22992-2-git-send-email-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1518623406-22992-1-git-send-email-jagan@amarulasolutions.com> References: <1518623406-22992-1-git-send-email-jagan@amarulasolutions.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 2/2] rockchip: rk3288: Fix TPL_TEXT_BASE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" rockchip boot0 add 4 bytes data (0xeaffffff) at beginning of executable(0x800) in order to make generic and compatible boot0 for all platforms and the resulting executable will be input to mkimage and the output of mkimage with initial 4 bytes will overwritten by 'spl_hdr' Since the TPL_TEXT_BASE in rk3288 is 0xff704004 which is improper align to branch-to-next-instruction-word, so the resulting 4 bytes are written at ff704020 of executable instead of beginning ff704000 Hexdump with overlaped bytes: ----------------------------- 0000000 0000 0000 0000 0000 0000 0000 0000 0000 0000010 0000 0000 0000 0000 0000 0000 ffff eaff So, fix this improper TEXT_BASE which is wrong even before and update it to 0xff704000 so-that the boot0 will add 4 bytes at beginning. Disassembly: ----------- with 0xff704020 TEXT_BASE: ff704004 <__image_copy_start>: b 1f /* if overwritten, entry-address is at the next word */ ff704020: eaffffff b ff704024 <__image_copy_start+0x20> with 0xff704000 TEXT_BASE: ff704000 <__image_copy_start>: b 1f /* if overwritten, entry-address is at the next word */ ff704000: eaffffff b ff704004 <__image_copy_start+0x4> This patch will also move TPL_TEXT_BASE into kconfig. Signed-off-by: Jagan Teki Acked-by: Philipp Tomsich --- arch/arm/mach-rockchip/Kconfig | 3 +++ configs/vyasa-rk3288_defconfig | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d9218da..0adaed4 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -77,6 +77,9 @@ if ROCKCHIP_RK3288 config TPL_LDSCRIPT default "arch/arm/mach-rockchip/rk3288/u-boot-tpl.lds" +config TPL_TEXT_BASE + default 0xff704000 + endif config ROCKCHIP_RK3328 diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 1a8a9a8..4c76041 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -5,7 +5,6 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y -CONFIG_TPL_TEXT_BASE=0xff704004 CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa"