From patchwork Tue Feb 13 15:28:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 872916 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zgmhS4CmRz9t3F for ; Wed, 14 Feb 2018 02:30:48 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 58A4EC21FD2; Tue, 13 Feb 2018 15:30:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 47BC3C21F69; Tue, 13 Feb 2018 15:30:04 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9EF8AC21DD7; Tue, 13 Feb 2018 15:28:44 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 52BF5C21D65 for ; Tue, 13 Feb 2018 15:28:44 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1DFJPfW016238; Tue, 13 Feb 2018 16:28:43 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2g22rywefb-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 13 Feb 2018 16:28:43 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7B1043A; Tue, 13 Feb 2018 15:28:42 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 686A24F04; Tue, 13 Feb 2018 15:28:42 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Feb 2018 16:28:42 +0100 Received: from localhost (10.201.23.68) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Tue, 13 Feb 2018 16:28:42 +0100 From: yannick fertre To: Yannick Fertre , Benjamin Gaignard , Philippe CORNU , "Patrice CHOTARD" , Anatolij Gustschin Date: Tue, 13 Feb 2018 16:28:27 +0100 Message-ID: <1518535713-787-2-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518535713-787-1-git-send-email-yannick.fertre@st.com> References: <1518535713-787-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-13_08:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Feb 2018 15:30:00 +0000 Cc: Andrzej Hajda , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1 1/7] video: stm32: stm32_ltdc: add reset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add reset of LTDC display controller. Signed-off-by: yannick fertre --- drivers/video/stm32/stm32_ltdc.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index b417ac2..d8784f1 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -302,6 +303,7 @@ static int stm32_ltdc_probe(struct udevice *dev) struct stm32_ltdc_priv *priv = dev_get_priv(dev); struct udevice *panel; struct clk pclk, pxclk; + struct reset_ctl rst; int ret; priv->regs = (void *)dev_read_addr(dev); @@ -316,6 +318,15 @@ static int stm32_ltdc_probe(struct udevice *dev) return ret; } + ret = reset_get_by_index(dev, 0, &rst); + if (ret) { + debug("%s: missing ltdc hardware reset\n", __func__); + return -ENODEV; + } + + /* Reset */ + reset_deassert(&rst); + ret = panel_enable_backlight(panel); if (ret) { debug("%s: panel %s enable backlight error %d\n", From patchwork Tue Feb 13 15:28:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 872921 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zgml80Kmpz9t3F for ; Wed, 14 Feb 2018 02:33:07 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 9BDB3C21F9F; Tue, 13 Feb 2018 15:31:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 781C1C21F98; Tue, 13 Feb 2018 15:30:07 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5BCC3C21DD7; Tue, 13 Feb 2018 15:28:46 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 1A9E2C21D65 for ; Tue, 13 Feb 2018 15:28:46 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1DFJXhB016532; Tue, 13 Feb 2018 16:28:43 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2g22rywefc-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 13 Feb 2018 16:28:43 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6873A34; Tue, 13 Feb 2018 15:28:43 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 59BE74F04; Tue, 13 Feb 2018 15:28:43 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Feb 2018 16:28:43 +0100 Received: from localhost (10.201.23.68) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Tue, 13 Feb 2018 16:28:43 +0100 From: yannick fertre To: Yannick Fertre , Benjamin Gaignard , Philippe CORNU , "Patrice CHOTARD" , Anatolij Gustschin Date: Tue, 13 Feb 2018 16:28:28 +0100 Message-ID: <1518535713-787-3-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518535713-787-1-git-send-email-yannick.fertre@st.com> References: <1518535713-787-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-13_08:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Feb 2018 15:30:00 +0000 Cc: Andrzej Hajda , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1 2/7] video: stm32: stm32_ltdc: update file header & footer X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Modified copyright & driver name. Signed-off-by: yannick fertre --- drivers/video/stm32/stm32_ltdc.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index d8784f1..8d89b58 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -1,8 +1,7 @@ /* - * Copyright (C) STMicroelectronics SA 2017 - * - * Authors: Philippe Cornu - * Yannick Fertre + * Copyright (C) 2017-2018 STMicroelectronics - All Rights Reserved + * Author(s): Philippe Cornu for STMicroelectronics. + * Yannick Fertre for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -408,10 +407,10 @@ static const struct udevice_id stm32_ltdc_ids[] = { }; U_BOOT_DRIVER(stm32_ltdc) = { - .name = "stm32_ltdc", - .id = UCLASS_VIDEO, - .of_match = stm32_ltdc_ids, - .probe = stm32_ltdc_probe, - .bind = stm32_ltdc_bind, + .name = "stm32_display", + .id = UCLASS_VIDEO, + .of_match = stm32_ltdc_ids, + .probe = stm32_ltdc_probe, + .bind = stm32_ltdc_bind, .priv_auto_alloc_size = sizeof(struct stm32_ltdc_priv), }; From patchwork Tue Feb 13 15:28:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 872920 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zgmkp5qxhz9t3F for ; Wed, 14 Feb 2018 02:32:50 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 638D4C21F07; Tue, 13 Feb 2018 15:30:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3A261C21F8C; Tue, 13 Feb 2018 15:30:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 12966C21F07; Tue, 13 Feb 2018 15:28:45 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id B4252C21DD7 for ; Tue, 13 Feb 2018 15:28:45 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1DFJSG1016245; Tue, 13 Feb 2018 16:28:45 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2g22rywefd-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 13 Feb 2018 16:28:45 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9690034; Tue, 13 Feb 2018 15:28:44 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 870984F0B; Tue, 13 Feb 2018 15:28:44 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Feb 2018 16:28:44 +0100 Received: from localhost (10.201.23.68) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Tue, 13 Feb 2018 16:28:44 +0100 From: yannick fertre To: Yannick Fertre , Benjamin Gaignard , Philippe CORNU , "Patrice CHOTARD" , Anatolij Gustschin Date: Tue, 13 Feb 2018 16:28:29 +0100 Message-ID: <1518535713-787-4-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518535713-787-1-git-send-email-yannick.fertre@st.com> References: <1518535713-787-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-13_08:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Feb 2018 15:30:00 +0000 Cc: Andrzej Hajda , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1 3/7] video: stm32: stm32_ltdc: set rate of the pixel clock X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" pxclk is useless to set pixel clock. Signed-off-by: yannick fertre --- drivers/video/stm32/stm32_ltdc.c | 52 ++++++++++++++++++++++------------------ 1 file changed, 29 insertions(+), 23 deletions(-) diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 8d89b58..08e0afc 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -301,9 +301,9 @@ static int stm32_ltdc_probe(struct udevice *dev) struct video_priv *uc_priv = dev_get_uclass_priv(dev); struct stm32_ltdc_priv *priv = dev_get_priv(dev); struct udevice *panel; - struct clk pclk, pxclk; + struct clk pclk; struct reset_ctl rst; - int ret; + int rate, ret; priv->regs = (void *)dev_read_addr(dev); if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) { @@ -311,9 +311,16 @@ static int stm32_ltdc_probe(struct udevice *dev) return -EINVAL; } - ret = uclass_first_device(UCLASS_PANEL, &panel); + ret = clk_get_by_index(dev, 0, &pclk); if (ret) { - debug("%s: panel device error %d\n", __func__, ret); + debug("%s: peripheral clock get error %d\n", __func__, ret); + return ret; + } + + ret = clk_enable(&pclk); + if (ret) { + debug("%s: peripheral clock enable error %d\n", + __func__, ret); return ret; } @@ -326,6 +333,12 @@ static int stm32_ltdc_probe(struct udevice *dev) /* Reset */ reset_deassert(&rst); + ret = uclass_first_device(UCLASS_PANEL, &panel); + if (ret) { + debug("%s: panel device error %d\n", __func__, ret); + return ret; + } + ret = panel_enable_backlight(panel); if (ret) { debug("%s: panel %s enable backlight error %d\n", @@ -333,31 +346,24 @@ static int stm32_ltdc_probe(struct udevice *dev) return ret; } - ret = fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(dev), - 0, &priv->timing); + ret = fdtdec_decode_display_timing(gd->fdt_blob, + dev_of_offset(dev), 0, + &priv->timing); if (ret) { - debug("%s: decode display timing error %d\n", __func__, ret); + debug("%s: decode display timing error %d\n", + __func__, ret); return -EINVAL; } - ret = clk_get_by_name(dev, "pclk", &pclk); - if (ret) { - debug("%s: peripheral clock get error %d\n", __func__, ret); - return ret; + rate = clk_set_rate(&pclk, priv->timing.pixelclock.typ); + if (rate < 0) { + debug("%s: fail to set pixel clock %d hz %d hz\n", + __func__, priv->timing.pixelclock.typ, rate); + return rate; } - ret = clk_enable(&pclk); - if (ret) { - debug("%s: peripheral clock enable error %d\n", __func__, ret); - return ret; - } - - /* Verify pixel clock value if any & inform user accordingly */ - ret = clk_get_by_name(dev, "pxclk", &pxclk); - if (!ret) { - if (clk_get_rate(&pxclk) != priv->timing.pixelclock.typ) - printf("Warning: please adjust ltdc pixel clock\n"); - } + debug("%s: Set pixel clock req %d hz get %d hz\n", __func__, + priv->timing.pixelclock.typ, rate); /* TODO Below parameters are hard-coded for the moment... */ priv->l2bpp = VIDEO_BPP16; From patchwork Tue Feb 13 15:28:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 872924 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zgmnl2STfz9sQm for ; Wed, 14 Feb 2018 02:35:23 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E21F7C21F91; Tue, 13 Feb 2018 15:31:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 96F82C21F9A; Tue, 13 Feb 2018 15:30:08 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 017E1C21F07; Tue, 13 Feb 2018 15:28:46 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id B4EBDC21DD7 for ; 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Tue, 13 Feb 2018 16:28:45 +0100 From: yannick fertre To: Yannick Fertre , Benjamin Gaignard , Philippe CORNU , "Patrice CHOTARD" , Anatolij Gustschin Date: Tue, 13 Feb 2018 16:28:30 +0100 Message-ID: <1518535713-787-5-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518535713-787-1-git-send-email-yannick.fertre@st.com> References: <1518535713-787-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-13_08:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Feb 2018 15:30:00 +0000 Cc: Andrzej Hajda , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1 4/7] video: stm32: stm32_ltdc: missing set of line interrupt position X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Set LIPCR (line interrupt position conf) register with line length. Signed-off-by: yannick fertre --- drivers/video/stm32/stm32_ltdc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 08e0afc..6c3557b 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -219,6 +219,8 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv) val = (total_w << 16) | total_h; clrsetbits_le32(regs + LTDC_TWCR, TWCR_TOTALH | TWCR_TOTALW, val); + setbits_le32(regs + LTDC_LIPCR, acc_act_h + 1); + /* Signal polarities */ val = 0; debug("%s: timing->flags 0x%08x\n", __func__, timing->flags); From patchwork Tue Feb 13 15:28:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 872929 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zgmrH6nmDz9sQm for ; Wed, 14 Feb 2018 02:37:35 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3C38AC21F86; Tue, 13 Feb 2018 15:31:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 0A4C0C21DD7; Tue, 13 Feb 2018 15:30:10 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4E36FC21F07; Tue, 13 Feb 2018 15:28:48 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id DC0C6C21F4D for ; Tue, 13 Feb 2018 15:28:47 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1DFJQO3016242; Tue, 13 Feb 2018 16:28:47 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2g22rywefg-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 13 Feb 2018 16:28:47 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B5BA131; Tue, 13 Feb 2018 15:28:46 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A4EBB4F0B; Tue, 13 Feb 2018 15:28:46 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Feb 2018 16:28:46 +0100 Received: from localhost (10.201.23.68) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Tue, 13 Feb 2018 16:28:46 +0100 From: yannick fertre To: Yannick Fertre , Benjamin Gaignard , Philippe CORNU , "Patrice CHOTARD" , Anatolij Gustschin Date: Tue, 13 Feb 2018 16:28:31 +0100 Message-ID: <1518535713-787-6-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518535713-787-1-git-send-email-yannick.fertre@st.com> References: <1518535713-787-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-13_08:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Feb 2018 15:30:00 +0000 Cc: Andrzej Hajda , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1 5/7] video: stm32: stm32_ltdc: set the blending factor X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Set the blending factor regarding the pixel format Signed-off-by: yannick fertre --- drivers/video/stm32/stm32_ltdc.c | 41 ++++++++++++++++++++++++++++++++++------ 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index 6c3557b..e160c77 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -138,7 +138,9 @@ struct stm32_ltdc_priv { #define LXCFBLNR_CFBLN GENMASK(10, 0) /* Color Frame Buffer Line Number */ #define BF1_PAXCA 0x600 /* Pixel Alpha x Constant Alpha */ +#define BF1_CA 0x400 /* Constant Alpha */ #define BF2_1PAXCA 0x007 /* 1 - (Pixel Alpha x Constant Alpha) */ +#define BF2_1CA 0x005 /* 1 - Constant Alpha */ enum stm32_ltdc_pix_fmt { PF_ARGB8888 = 0, @@ -161,11 +163,17 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp) pf = PF_RGB565; break; + case VIDEO_BPP32: + pf = PF_ARGB8888; + break; + + case VIDEO_BPP8: + pf = PF_L8; + break; + case VIDEO_BPP1: case VIDEO_BPP2: case VIDEO_BPP4: - case VIDEO_BPP8: - case VIDEO_BPP32: default: debug("%s: warning %dbpp not supported yet, %dbpp instead\n", __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16)); @@ -178,6 +186,23 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp) return (u32)pf; } +static bool has_alpha(u32 fmt) +{ + switch (fmt) { + case PF_ARGB8888: + case PF_ARGB1555: + case PF_ARGB4444: + case PF_AL44: + case PF_AL88: + return true; + case PF_RGB888: + case PF_RGB565: + case PF_L8: + default: + return false; + } +} + static void stm32_ltdc_enable(struct stm32_ltdc_priv *priv) { /* Reload configuration immediately & enable LTDC */ @@ -247,6 +272,7 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr) u32 line_length; u32 bus_width; u32 val, tmp, bpp; + u32 format; x0 = priv->crop_x; x1 = priv->crop_x + priv->crop_w - 1; @@ -277,15 +303,18 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr) clrsetbits_le32(regs + LTDC_L1CFBLR, LXCFBLR_CFBLL | LXCFBLR_CFBP, val); /* Pixel format */ - val = stm32_ltdc_get_pixel_format(priv->l2bpp); - clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, val); + format = stm32_ltdc_get_pixel_format(priv->l2bpp); + clrsetbits_le32(regs + LTDC_L1PFCR, LXPFCR_PF, format); /* Constant alpha value */ clrsetbits_le32(regs + LTDC_L1CACR, LXCACR_CONSTA, priv->alpha); + /* Specifies the blending factors : with or without pixel alpha */ + /* Manage hw-specific capabilities */ + val = has_alpha(format) ? BF1_PAXCA | BF2_1PAXCA : BF1_CA | BF2_1CA; + /* Blending factors */ - clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1, - BF1_PAXCA | BF2_1PAXCA); + clrsetbits_le32(regs + LTDC_L1BFCR, LXBFCR_BF2 | LXBFCR_BF1, val); /* Frame buffer line number */ clrsetbits_le32(regs + LTDC_L1CFBLNR, LXCFBLNR_CFBLN, priv->crop_h); From patchwork Tue Feb 13 15:28:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 872931 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zgmsY0433z9sQm for ; Wed, 14 Feb 2018 02:38:40 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 7236DC21F95; Tue, 13 Feb 2018 15:32:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A18FAC21FAB; Tue, 13 Feb 2018 15:30:11 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 23960C21F07; Tue, 13 Feb 2018 15:28:49 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id CA4BBC21DD7 for ; Tue, 13 Feb 2018 15:28:48 +0000 (UTC) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1DFJSG2016245; Tue, 13 Feb 2018 16:28:48 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2g22rywefh-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 13 Feb 2018 16:28:48 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D5D0731; Tue, 13 Feb 2018 15:28:47 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BFB0C4F0B; Tue, 13 Feb 2018 15:28:47 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Feb 2018 16:28:47 +0100 Received: from localhost (10.201.23.68) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Tue, 13 Feb 2018 16:28:47 +0100 From: yannick fertre To: Yannick Fertre , Benjamin Gaignard , Philippe CORNU , "Patrice CHOTARD" , Anatolij Gustschin Date: Tue, 13 Feb 2018 16:28:32 +0100 Message-ID: <1518535713-787-7-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518535713-787-1-git-send-email-yannick.fertre@st.com> References: <1518535713-787-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-13_08:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Feb 2018 15:30:00 +0000 Cc: Andrzej Hajda , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1 6/7] arm: dts: stm32: add ltdc for STM32F746 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Philippe CORNU Add display controller node in device-tree. Signed-off-by: yannick fertre --- arch/arm/dts/stm32f746.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 46d148e..e4d32bf 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -323,6 +323,15 @@ pinctrl-names = "default", "opendrain"; max-frequency = <48000000>; }; + + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; + u-boot,dm-pre-reloc; + status = "disabled"; + }; }; }; From patchwork Tue Feb 13 15:28:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 872927 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zgmqq0bjBz9sNw for ; Wed, 14 Feb 2018 02:37:11 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C441BC21FA1; Tue, 13 Feb 2018 15:32:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4D9CEC21FB0; Tue, 13 Feb 2018 15:30:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 80772C21F48; Tue, 13 Feb 2018 15:28:50 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lists.denx.de (Postfix) with ESMTPS id 0DF09C21F48 for ; Tue, 13 Feb 2018 15:28:50 +0000 (UTC) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w1DFOaux026601; Tue, 13 Feb 2018 16:28:49 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2g1yw6wy3c-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 13 Feb 2018 16:28:49 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DD40431; Tue, 13 Feb 2018 15:28:48 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CD6D54F0B; Tue, 13 Feb 2018 15:28:48 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Feb 2018 16:28:48 +0100 Received: from localhost (10.201.23.68) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.352.0; Tue, 13 Feb 2018 16:28:48 +0100 From: yannick fertre To: Yannick Fertre , Benjamin Gaignard , Philippe CORNU , "Patrice CHOTARD" , Anatolij Gustschin Date: Tue, 13 Feb 2018 16:28:33 +0100 Message-ID: <1518535713-787-8-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1518535713-787-1-git-send-email-yannick.fertre@st.com> References: <1518535713-787-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-13_08:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Feb 2018 15:30:00 +0000 Cc: Andrzej Hajda , u-boot@lists.denx.de Subject: [U-Boot] [PATCH v1 7/7] arm: dts: stm32: add display for STM32F746 disco board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable the display controller , panel & backlight. Set panel display timings & set the RGB data bus. Signed-off-by: yannick fertre --- arch/arm/dts/stm32f746-disco.dts | 70 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index 9e8d2a0..bbde947 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -89,6 +89,37 @@ compatible = "st,button1"; button-gpio = <&gpioi 11 0>; }; + + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 0>; + status = "okay"; + }; + + panel: panel { + compatible = "simple-panel"; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 0>; + status = "okay"; + + display-timings { + timing@0 { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hfront-porch = <2>; + hback-porch = <2>; + hsync-len = <41>; + vfront-porch = <2>; + vback-porch = <2>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <1>; + }; + }; + }; }; &clk_hse { @@ -183,6 +214,40 @@ slew-rate = <2>; }; }; + + ltdc_pins: ltdc@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + slew-rate = <2>; + }; + }; }; &usart1 { @@ -250,3 +315,8 @@ bus-width = <4>; max-frequency = <25000000>; }; + +<dc { + status = "okay"; + pinctrl-0 = <<dc_pins>; +};