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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id f27sm7804046ejc.137.2021.12.30.08.48.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 08:48:33 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de Subject: [PATCH v3 1/6] rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Date: Thu, 30 Dec 2021 17:48:20 +0100 Message-Id: <20211230164825.6489-1-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass --- Changed V3: add ROCKCHIP_STIMER --- arch/arm/mach-rockchip/Kconfig | 22 ++++++++++++++++++++++ arch/arm/mach-rockchip/px30/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3036/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3128/Kconfig | 3 +++ arch/arm/mach-rockchip/rk322x/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3288/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3308/Kconfig | 10 ++++++---- arch/arm/mach-rockchip/rk3328/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3368/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3399/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3568/Kconfig | 3 +++ include/configs/px30_common.h | 1 - include/configs/rk3036_common.h | 1 - include/configs/rk3128_common.h | 1 - include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 1 - include/configs/rk3308_common.h | 1 - include/configs/rk3328_common.h | 1 - include/configs/rk3368_common.h | 1 - include/configs/rk3399_common.h | 1 - include/configs/rk3568_common.h | 1 - 21 files changed, 55 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index da6871eb..7a624c64 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -343,6 +343,28 @@ config ROCKCHIP_BOOT_MODE_REG The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h) according to the value from this register. +config ROCKCHIP_STIMER + bool "Rockchip STIMER support" + default y + depends on (ROCKCHIP_PX30|| \ + ROCKCHIP_RK3036|| \ + ROCKCHIP_RK3128|| \ + ROCKCHIP_RK322X|| \ + ROCKCHIP_RK3288|| \ + ROCKCHIP_RK3308|| \ + ROCKCHIP_RK3328|| \ + ROCKCHIP_RK3368|| \ + ROCKCHIP_RK3399|| \ + ROCKCHIP_RK3568) + help + Enable Rockchip STIMER support. + +config ROCKCHIP_STIMER_BASE + hex "Rockchip secure timer base address" + depends on ROCKCHIP_STIMER + help + Rockchip secure timer base address. + config ROCKCHIP_SPL_RESERVE_IRAM hex "Size of IRAM reserved in SPL" default 0 diff --git a/arch/arm/mach-rockchip/px30/Kconfig b/arch/arm/mach-rockchip/px30/Kconfig index aa5cc471..42cc111b 100644 --- a/arch/arm/mach-rockchip/px30/Kconfig +++ b/arch/arm/mach-rockchip/px30/Kconfig @@ -30,6 +30,9 @@ config TARGET_PX30_CORE config ROCKCHIP_BOOT_MODE_REG default 0xff010200 +config ROCKCHIP_STIMER_BASE + default 0xff220020 + config SYS_SOC default "px30" diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig index b746795d..111531be 100644 --- a/arch/arm/mach-rockchip/rk3036/Kconfig +++ b/arch/arm/mach-rockchip/rk3036/Kconfig @@ -16,6 +16,9 @@ endchoice config ROCKCHIP_BOOT_MODE_REG default 0x200081c8 +config ROCKCHIP_STIMER_BASE + default 0x200440a0 + config SYS_SOC default "rk3036" diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig index b867401c..9cc494eb 100644 --- a/arch/arm/mach-rockchip/rk3128/Kconfig +++ b/arch/arm/mach-rockchip/rk3128/Kconfig @@ -16,6 +16,9 @@ endchoice config ROCKCHIP_BOOT_MODE_REG default 0x100a0038 +config ROCKCHIP_STIMER_BASE + default 0x200440a0 + config SYS_SOC default "rk3128" diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig index 6458cd55..058f848d 100644 --- a/arch/arm/mach-rockchip/rk322x/Kconfig +++ b/arch/arm/mach-rockchip/rk322x/Kconfig @@ -8,6 +8,9 @@ config TARGET_EVB_RK3229 config ROCKCHIP_BOOT_MODE_REG default 0x110005c8 +config ROCKCHIP_STIMER_BASE + default 0x110d0020 + config SYS_SOC default "rk322x" diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index f37b1bdf..dd8c7826 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -148,6 +148,9 @@ config ROCKCHIP_FAST_SPL config ROCKCHIP_BOOT_MODE_REG default 0xff730094 +config ROCKCHIP_STIMER_BASE + default 0xff810020 + config SYS_SOC default "rk3288" diff --git a/arch/arm/mach-rockchip/rk3308/Kconfig b/arch/arm/mach-rockchip/rk3308/Kconfig index 8fa536e1..194353e4 100644 --- a/arch/arm/mach-rockchip/rk3308/Kconfig +++ b/arch/arm/mach-rockchip/rk3308/Kconfig @@ -8,6 +8,12 @@ config TARGET_ROC_RK3308_CC bool "Firefly roc-rk3308-cc" select BOARD_LATE_INIT +config ROCKCHIP_BOOT_MODE_REG + default 0xff000500 + +config ROCKCHIP_STIMER_BASE + default 0xff1b00a0 + config SYS_SOC default "rk3308" @@ -17,10 +23,6 @@ config SYS_MALLOC_F_LEN config SPL_SERIAL default y -config ROCKCHIP_BOOT_MODE_REG - default 0xff000500 - - source "board/rockchip/evb_rk3308/Kconfig" source "board/firefly/firefly-rk3308/Kconfig" diff --git a/arch/arm/mach-rockchip/rk3328/Kconfig b/arch/arm/mach-rockchip/rk3328/Kconfig index d13a1690..f6f1e06a 100644 --- a/arch/arm/mach-rockchip/rk3328/Kconfig +++ b/arch/arm/mach-rockchip/rk3328/Kconfig @@ -15,6 +15,9 @@ endchoice config ROCKCHIP_BOOT_MODE_REG default 0xff1005c8 +config ROCKCHIP_STIMER_BASE + default 0xff1d0020 + config SYS_SOC default "rk3328" diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index 78eb96df..104db367 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -45,6 +45,9 @@ endchoice config ROCKCHIP_BOOT_MODE_REG default 0xff738200 +config ROCKCHIP_STIMER_BASE + default 0xff830020 + config SYS_SOC default "rk3368" diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig index 17628f91..4bc15c1b 100644 --- a/arch/arm/mach-rockchip/rk3399/Kconfig +++ b/arch/arm/mach-rockchip/rk3399/Kconfig @@ -114,6 +114,9 @@ endchoice config ROCKCHIP_BOOT_MODE_REG default 0xff320300 +config ROCKCHIP_STIMER_BASE + default 0xff8680a0 + config SYS_SOC default "rk3399" diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index 201c63c2..4e7c02cc 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -9,6 +9,9 @@ config TARGET_EVB_RK3568 config ROCKCHIP_BOOT_MODE_REG default 0xfdc20200 +config ROCKCHIP_STIMER_BASE + default 0xfdd1c020 + config SYS_SOC default "rk3568" diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 09923871..dc609013 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_NS16550_MEM32 -#define CONFIG_ROCKCHIP_STIMER_BASE 0xff220020 #define COUNTER_FREQUENCY 24000000 /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index b133d8ec..10cba727 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -10,7 +10,6 @@ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 #define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 8b7a0bbb..71f66d57 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 #define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index a46b1ffe..aff24018 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ -#define CONFIG_ROCKCHIP_STIMER_BASE 0x110d0020 #define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index abbb2739..c781bc7e 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020 #define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 496f4628..edc535fe 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_NS16550_MEM32 -#define CONFIG_ROCKCHIP_STIMER_BASE 0xff1b00a0 #define CONFIG_IRAM_BASE 0xfff80000 #define CONFIG_SYS_INIT_SP_ADDR 0x00800000 #define CONFIG_SPL_STACK 0x00400000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index c1e26a01..8a5f0c89 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,7 +10,6 @@ #define CONFIG_IRAM_BASE 0xff090000 -#define CONFIG_ROCKCHIP_STIMER_BASE 0xff1d0020 #define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 8b239ca0..239296c1 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -15,7 +15,6 @@ #define SDRAM_MAX_SIZE 0xff000000 #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020 #define COUNTER_FREQUENCY 24000000 #define CONFIG_IRAM_BASE 0xff8c0000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index ed72c8bb..4037dba5 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0 #define CONFIG_IRAM_BASE 0xff8c0000 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index afe5050e..705c3454 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_ROCKCHIP_STIMER_BASE 0xfdd1c020 #define CONFIG_IRAM_BASE 0xfdcc0000 From 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id f27sm7804046ejc.137.2021.12.30.08.48.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 08:48:34 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de Subject: [PATCH v3 2/6] rockchip: move CONFIG_SYS_ARCH_TIMER to Kconfig Date: Thu, 30 Dec 2021 17:48:21 +0100 Message-Id: <20211230164825.6489-2-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211230164825.6489-1-jbx6244@gmail.com> References: <20211230164825.6489-1-jbx6244@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The config item SYS_ARCH_TIMER is default y if ARM64. Move CONFIG_SYS_ARCH_TIMER to Kconfig for the Rockchip CPU_V7A SoCs that have ARM Generic Timer support. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass --- arch/arm/mach-rockchip/rk3036/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3128/Kconfig | 3 +++ arch/arm/mach-rockchip/rk322x/Kconfig | 3 +++ arch/arm/mach-rockchip/rk3288/Kconfig | 3 +++ include/configs/rk3036_common.h | 1 - include/configs/rk3128_common.h | 1 - include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 1 - 8 files changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig index 111531be..99754138 100644 --- a/arch/arm/mach-rockchip/rk3036/Kconfig +++ b/arch/arm/mach-rockchip/rk3036/Kconfig @@ -19,6 +19,9 @@ config ROCKCHIP_BOOT_MODE_REG config ROCKCHIP_STIMER_BASE default 0x200440a0 +config SYS_ARCH_TIMER + default y + config SYS_SOC default "rk3036" diff --git a/arch/arm/mach-rockchip/rk3128/Kconfig b/arch/arm/mach-rockchip/rk3128/Kconfig index 9cc494eb..f6f7de1c 100644 --- a/arch/arm/mach-rockchip/rk3128/Kconfig +++ b/arch/arm/mach-rockchip/rk3128/Kconfig @@ -19,6 +19,9 @@ config ROCKCHIP_BOOT_MODE_REG config ROCKCHIP_STIMER_BASE default 0x200440a0 +config SYS_ARCH_TIMER + default y + config SYS_SOC default "rk3128" diff --git a/arch/arm/mach-rockchip/rk322x/Kconfig b/arch/arm/mach-rockchip/rk322x/Kconfig index 058f848d..7d74b2cc 100644 --- a/arch/arm/mach-rockchip/rk322x/Kconfig +++ b/arch/arm/mach-rockchip/rk322x/Kconfig @@ -11,6 +11,9 @@ config ROCKCHIP_BOOT_MODE_REG config ROCKCHIP_STIMER_BASE default 0x110d0020 +config SYS_ARCH_TIMER + default y + config SYS_SOC default "rk322x" diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index dd8c7826..35d471d5 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -151,6 +151,9 @@ config ROCKCHIP_BOOT_MODE_REG config ROCKCHIP_STIMER_BASE default 0xff810020 +config SYS_ARCH_TIMER + default y + config SYS_SOC default "rk3288" diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 10cba727..5905518e 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -11,7 +11,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 71f66d57..d77a7d7b 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index aff24018..3258820f 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -12,7 +12,6 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x61100000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index c781bc7e..e2e0f70a 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM From patchwork Thu Dec 30 16:48:22 2021 Content-Type: text/plain; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id f27sm7804046ejc.137.2021.12.30.08.48.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 08:48:35 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de Subject: [PATCH v3 3/6] rockchip: spl: change call condition rockchip_stimer_init() Date: Thu, 30 Dec 2021 17:48:22 +0100 Message-Id: <20211230164825.6489-3-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211230164825.6489-1-jbx6244@gmail.com> References: <20211230164825.6489-1-jbx6244@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE defined. Currently only rk3188 has an exception. Make this more generic and call the function rockchip_stimer_init() only when CONFIG_ROCKCHIP_STIMER_BASE is available. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass --- Changed V3: use CONFIG_ROCKCHIP_STIMER Changed V2: use IS_ENABLED add include kconfig.h move define location so that rockchip_stimer_init() is always visible to the compiler --- arch/arm/mach-rockchip/spl.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 02c40fb3..1dac3805 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -16,6 +16,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -70,7 +71,6 @@ u32 spl_mmc_boot_mode(const u32 boot_device) return MMCSD_MODE_RAW; } -#if !defined(CONFIG_ROCKCHIP_RK3188) #define TIMER_LOAD_COUNT_L 0x00 #define TIMER_LOAD_COUNT_H 0x04 #define TIMER_CONTROL_REG 0x10 @@ -80,6 +80,7 @@ u32 spl_mmc_boot_mode(const u32 boot_device) __weak void rockchip_stimer_init(void) { +#if defined(CONFIG_ROCKCHIP_STIMER_BASE) /* If Timer already enabled, don't re-init it */ u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); @@ -94,8 +95,8 @@ __weak void rockchip_stimer_init(void) writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); -} #endif +} __weak int board_early_init_f(void) { @@ -132,9 +133,11 @@ void board_init_f(ulong dummy) hang(); } arch_cpu_init(); -#if !defined(CONFIG_ROCKCHIP_RK3188) - rockchip_stimer_init(); -#endif + + /* Init secure timer */ + if (IS_ENABLED(CONFIG_ROCKCHIP_STIMER)) + rockchip_stimer_init(); + #ifdef CONFIG_SYS_ARCH_TIMER /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ timer_init(); From patchwork Thu Dec 30 16:48:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1574215 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id f27sm7804046ejc.137.2021.12.30.08.48.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 08:48:36 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de Subject: [PATCH v3 4/6] rockchip: tpl: change call condition rockchip_stimer_init() Date: Thu, 30 Dec 2021 17:48:23 +0100 Message-Id: <20211230164825.6489-4-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211230164825.6489-1-jbx6244@gmail.com> References: <20211230164825.6489-1-jbx6244@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE defined. Currently only rk3188 has an exception. Make this more generic and call the function rockchip_stimer_init() only when CONFIG_ROCKCHIP_STIMER_BASE is available. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass --- Changed V3: use CONFIG_ROCKCHIP_STIMER Changed V2: use IS_ENABLED add include kconfig.h move define location so that rockchip_stimer_init() is always visible to the compiler --- arch/arm/mach-rockchip/tpl.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 3c007bb4..2b561264 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -15,6 +15,7 @@ #include #include #include +#include #if CONFIG_IS_ENABLED(BANNER_PRINT) #include @@ -29,6 +30,7 @@ __weak void rockchip_stimer_init(void) { +#if defined(CONFIG_ROCKCHIP_STIMER_BASE) /* If Timer already enabled, don't re-init it */ u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); @@ -45,6 +47,7 @@ __weak void rockchip_stimer_init(void) writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); +#endif } void board_init_f(ulong dummy) @@ -74,7 +77,9 @@ void board_init_f(ulong dummy) } /* Init secure timer */ - rockchip_stimer_init(); + if (IS_ENABLED(CONFIG_ROCKCHIP_STIMER)) + rockchip_stimer_init(); + /* Init ARM arch timer in arch/arm/cpu/ */ timer_init(); From patchwork Thu Dec 30 16:48:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1574217 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=B654Df/8; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id f27sm7804046ejc.137.2021.12.30.08.48.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 08:48:36 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de Subject: [PATCH v3 5/6] rockchip: spl: replace ifdef by IS_ENABLED for timer_init() call condition Date: Thu, 30 Dec 2021 17:48:24 +0100 Message-Id: <20211230164825.6489-5-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211230164825.6489-1-jbx6244@gmail.com> References: <20211230164825.6489-1-jbx6244@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Not all Rockchip SoC models use the ARM arch timer. Call the function timer_init() only when CONFIG_SYS_ARCH_TIMER is available. Replace the ifdef call condition by IS_ENABLED to increase build coverage and make the code easier to read. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass --- arch/arm/mach-rockchip/spl.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 1dac3805..95db7557 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -138,10 +138,10 @@ void board_init_f(ulong dummy) if (IS_ENABLED(CONFIG_ROCKCHIP_STIMER)) rockchip_stimer_init(); -#ifdef CONFIG_SYS_ARCH_TIMER - /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ - timer_init(); -#endif + /* Init ARM arch timer */ + if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER)) + timer_init(); + #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_RAM) debug("\nspl:init dram\n"); ret = dram_init(); From patchwork Thu Dec 30 16:48:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Jonker X-Patchwork-Id: 1574216 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=M+3Lr4wP; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JPvPX4G37z9s0r for ; Fri, 31 Dec 2021 03:49:20 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7DC6583063; Thu, 30 Dec 2021 17:48:56 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="M+3Lr4wP"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5A29182FBC; Thu, 30 Dec 2021 17:48:42 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A1A5682FAF for ; Thu, 30 Dec 2021 17:48:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jbx6244@gmail.com Received: by mail-ed1-x52e.google.com with SMTP id f5so100179447edq.6 for ; Thu, 30 Dec 2021 08:48:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KtUkyrtZO1ukZGfc5QnMyc89G3cHhDLEz0uizC+ZdLk=; b=M+3Lr4wPbt7IqjDLRxMtiZJV/dTf49q+B0BZaq30qSpv9q3IfHQTa1cTveH6nqOgZG OepXemIhh9kyNSkZgIxTw7sW0YSVRjdMoUiNH9krWOVxcRnsMGKTlWjDZmKUIMVXYi4r kUPh4Hfj3OxhZpePuqCleN5s2t+X51jQEvYb5AnSdPdJQkHIEKS0k5DHJ3Mri1mrHdB1 mlFPSVDovfIykBDTYZda58m5EiIND4w2lxSszzz2G3uKH2g1x8454ncUcVQUqG65aeRo P/xW0SpSDxfw+K+41/EE2C0AkzF4OULvdz5rM41aR/0/u2PCgt0rLWZEtSVhLlv9QuDX nmGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KtUkyrtZO1ukZGfc5QnMyc89G3cHhDLEz0uizC+ZdLk=; b=C8mRvFD1E98SGaSDkxLZRrCsPBuddX7ii0WKEpLObaPLviHg6w3eC9tXjxWFsm8lSV +K8sO9vnDtdse26hrI1O94Uqi+v64dcXm/LBIKWb10bICHlxODT/NnPZie9ePaLbk3GO hy5bxNnYzM+GzW7kHrrUv6HjW2dyXINJ4EYnndHwIpbXnwOWbHgG2h5QEGBkC6YcycgS 2B8yvSOixsKtD6c6KRiWIti8nAPekbr6qev539DZHolBC9emTTo2nif6HEqiew4431MH qn/M0jhbBj/HnqlUOhkQHZWJs6WzIqnaN8+au2XjHQEfbLsyzoUJ8g6LCF+SbdSo0Pw2 S0Lg== X-Gm-Message-State: AOAM532xRJQ9Sbe4WUUGY2H0KZat2rE5+SaFryx6MVRQvZ2K3lgGq01F DjSoVcEme7ES0hHJoGzLIcU= X-Google-Smtp-Source: ABdhPJyaCQYU8Hcj24pQnaf9uLHJ5Xcl55rJ3sUaGinGagw7DN7iVJeUKSXBM/1I6ye28Vxoz2RYfg== X-Received: by 2002:a17:906:7304:: with SMTP id di4mr25190168ejc.327.1640882917329; Thu, 30 Dec 2021 08:48:37 -0800 (PST) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id f27sm7804046ejc.137.2021.12.30.08.48.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Dec 2021 08:48:37 -0800 (PST) From: Johan Jonker To: kever.yang@rock-chips.com Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, u-boot@lists.denx.de Subject: [PATCH v3 6/6] rockchip: tpl: use IS_ENABLED for timer_init() call condition Date: Thu, 30 Dec 2021 17:48:25 +0100 Message-Id: <20211230164825.6489-6-jbx6244@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211230164825.6489-1-jbx6244@gmail.com> References: <20211230164825.6489-1-jbx6244@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.38 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Not all Rockchip SoC models use the ARM arch timer. Call the function timer_init() only when CONFIG_SYS_ARCH_TIMER is available. Use the call condition IS_ENABLED to increase build coverage and make the code easier to read. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass --- arch/arm/mach-rockchip/tpl.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 2b561264..05deba3f 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -80,8 +80,9 @@ void board_init_f(ulong dummy) if (IS_ENABLED(CONFIG_ROCKCHIP_STIMER)) rockchip_stimer_init(); - /* Init ARM arch timer in arch/arm/cpu/ */ - timer_init(); + /* Init ARM arch timer */ + if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER)) + timer_init(); ret = uclass_get_device(UCLASS_RAM, 0, &dev); if (ret) {