From patchwork Wed Dec 8 05:37:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Oliva X-Patchwork-Id: 1565081 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=qRCTOlfB; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4J85YV4xknz9sRN for ; Wed, 8 Dec 2021 16:38:20 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 065C93858C60 for ; Wed, 8 Dec 2021 05:38:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 065C93858C60 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1638941897; bh=4TxY8tDCO7IyRhJcczxHKlSPzqJnatZgvPIr7SgY4l8=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=qRCTOlfB6sw0Y4R1l6sCqpiLX+pVVhyHe+QK1fDaOFXOQNw7ffDmdOSPX1FO9fc7Z RkUoTwSZiwYaZwakYxZXf/B7M5j7LcaUiaHseGtxI6bCXRjB/Kq+BLFIn7NhX5emRl IZpshknLluIJR2Jf1vlnwtw26rH3OA3sZF9K55DM= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from rock.gnat.com (rock.gnat.com [205.232.38.15]) by sourceware.org (Postfix) with ESMTPS id EE7423858D28; Wed, 8 Dec 2021 05:37:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org EE7423858D28 Received: from localhost (localhost.localdomain [127.0.0.1]) by filtered-rock.gnat.com (Postfix) with ESMTP id ACD611169B3; Wed, 8 Dec 2021 00:37:56 -0500 (EST) X-Virus-Scanned: Debian amavisd-new at gnat.com Received: from rock.gnat.com ([127.0.0.1]) by localhost (rock.gnat.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id 0eLUHv3s5Dhg; Wed, 8 Dec 2021 00:37:56 -0500 (EST) Received: from free.home (tron.gnat.com [IPv6:2620:20:4000:0:46a8:42ff:fe0e:e294]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by rock.gnat.com (Postfix) with ESMTPS id 47660116990; Wed, 8 Dec 2021 00:37:56 -0500 (EST) Received: from livre (livre.home [172.31.160.2]) by free.home (8.15.2/8.15.2) with ESMTPS id 1B85blLp916965 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 8 Dec 2021 02:37:47 -0300 To: gcc-patches@gcc.gnu.org Subject: [PR103302] skip multi-word pre-move clobber during lra Organization: Free thinker, does not speak for AdaCore Date: Wed, 08 Dec 2021 02:37:47 -0300 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 X-Spam-Status: No, score=-12.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Alexandre Oliva via Gcc-patches From: Alexandre Oliva Reply-To: Alexandre Oliva Cc: zsojka@seznam.cz, wilson@gcc.gnu.org Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" If we emit clobbers before multi-word moves during lra, we get confused if a copy ends up with input or output replaced with each other: the clobber then kills the previous set, and it gets deleted. This patch avoids emitting such clobbers when lra_in_progress. Regstrapped on x86_64-linux-gnu. Verified that, applied on a riscv64 compiler that failed the test, the asm statements are no longer dropped in the reload dumps. Running a x86_64-x-riscv64 regression testing now. Ok to install? for gcc/ChangeLog PR target/103302 expr.c (emit_move_multi_word): Skip clobber during lra. for gcc/testsuite/ChangeLog PR target/103302 * gcc.target/riscv/pr103302.c: New. --- gcc/expr.c | 2 + gcc/testsuite/gcc.target/riscv/pr103302.c | 47 +++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr103302.c diff --git a/gcc/expr.c b/gcc/expr.c index b281525750978..0365625e7b835 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -3929,7 +3929,7 @@ emit_move_multi_word (machine_mode mode, rtx x, rtx y) hard regs shouldn't appear here except as return values. We never want to emit such a clobber after reload. */ if (x != y - && ! (reload_in_progress || reload_completed) + && ! (lra_in_progress || reload_in_progress || reload_completed) && need_clobber != 0) emit_clobber (x); diff --git a/gcc/testsuite/gcc.target/riscv/pr103302.c b/gcc/testsuite/gcc.target/riscv/pr103302.c new file mode 100644 index 0000000000000..822c408741645 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/pr103302.c @@ -0,0 +1,47 @@ +/* { dg-do run } */ +/* { dg-options "-Og -fharden-compares -fno-tree-dce -fno-tree-fre " } */ + +typedef unsigned char u8; +typedef unsigned char __attribute__((__vector_size__ (32))) v256u8; +typedef unsigned short __attribute__((__vector_size__ (32))) v256u16; +typedef unsigned short __attribute__((__vector_size__ (64))) v512u16; +typedef unsigned int u32; +typedef unsigned int __attribute__((__vector_size__ (4))) v512u32; +typedef unsigned long long __attribute__((__vector_size__ (32))) v256u64; +typedef unsigned long long __attribute__((__vector_size__ (64))) v512u64; +typedef unsigned __int128 __attribute__((__vector_size__ (32))) v256u128; +typedef unsigned __int128 __attribute__((__vector_size__ (64))) v512u128; + +v512u16 g; + +void +foo0 (u8 u8_0, v256u16 v256u16_0, v512u16 v512u16_0, u32 u32_0, v512u32, + v256u64 v256u64_0, v512u64 v512u64_0, v256u128 v256u128_0, + v512u128 v512u128_0) +{ + u32_0 <= (v512u128) (v512u128_0 != u8_0); + v512u64 v512u64_1 = + __builtin_shufflevector (v256u64_0, v512u64_0, 7, 8, 0, 9, 5, 0, 3, 1); + g = v512u16_0; + (v256u8) v256u16_0 + (v256u8) v256u128_0; +} + +int +main (void) +{ + foo0 (40, (v256u16) + { + }, (v512u16) + { + }, 0, (v512u32) + { + }, (v256u64) + { + }, (v512u64) + { + }, (v256u128) + { + }, (v512u128) + { + }); +}