From patchwork Wed Nov 10 22:14:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553622 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=LM7Ah0rK; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HqK3X0w71z9sVc for ; Thu, 11 Nov 2021 09:17:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233711AbhKJWU3 (ORCPT ); Wed, 10 Nov 2021 17:20:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233621AbhKJWUY (ORCPT ); Wed, 10 Nov 2021 17:20:24 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD95AC0797B8; Wed, 10 Nov 2021 14:15:05 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id n15-20020a17090a160f00b001a75089daa3so3049906pja.1; Wed, 10 Nov 2021 14:15:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DtWhfKdUtW9iOKlARDdNWnnImSZ5FB7Na1++POtAlgg=; b=LM7Ah0rKfOoHj+lixTe9M3QqNrzZ7r9PZ2Q+E7+ErGLfbyXA5s8RglAQZgt1FUrck1 ON/2vWjlzQUftUJkwHqBs8YsReO8zt/ZFl0ejVH1QqbM7IoRHkYLwUxSd1E1LAAq1egi 2m/NHpXXtSTB0iZa6CBkikESeFgEVpmxHE+sAS4hmSzTEGy3bjHB/ZhvFOeDpEyrAFVr 9tTlOzVnlOfPConWe8SvpAOxdRcR+4CtkpUYmYenHbTs9Qb4tmTiWbAxgDja4upCDcoR PHwuupSvA7n3LYEKDykBf57h/ULOwtyPcVsKguEHFqKOiRk8cogXZ54mcu6/Tb6yS60H F8wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DtWhfKdUtW9iOKlARDdNWnnImSZ5FB7Na1++POtAlgg=; b=GMf0wjR+GLnmsAxq0KvWXH7e6dfeGHmL32j5DSZ6RB9+t3B/fQ1gckm62g7HL4/VLY 7rEd+0coL/hLEMulS++9mq1FiL48YBAI9HWzTJrbQc6OI/xfdeXteJ2109891uslUIlo xwhBsI7gzLS7IkjBqLrm3O2nEqDF1VEcky+4ApqfWsjwlFoTbIsNCMJEa2R7Sq1j1F+1 i03eLmeORlztlD9vaFkTtvR3H9sWTz4YDxjV4OCjmnLWZezFIFCjt2BOiEPWUy9ab2Lg 1usApgeWf3QKKEn4/pLV5miwTSsaswFMGY9jsZWm1fu/pgVHxgMyaDru4VXzcass71Vu KKXg== X-Gm-Message-State: AOAM533Y23DyZSIX16ExNOAsXNs6kx3ESjRzA3QaMOcsgwT55vOdk6d8 Ug0HKk/yse9mCH3brXK3eF1j/71aKAM4cQ== X-Google-Smtp-Source: ABdhPJyxzsEjf9jRaw67JXc4mjFC5lTQZqMd/0Rt9PxJGUaSDkuZVg58yf/bwW6/8MOU7wSjW15Efw== X-Received: by 2002:a17:902:d114:b0:142:3934:be82 with SMTP id w20-20020a170902d11400b001423934be82mr2316791plw.40.1636582505108; Wed, 10 Nov 2021 14:15:05 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id q11sm611774pfk.192.2021.11.10.14.15.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Nov 2021 14:15:04 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 1/8] PCI: brcmstb: Change brcm_phy_stop() to return void Date: Wed, 10 Nov 2021 17:14:41 -0500 Message-Id: <20211110221456.11977-2-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org We do not use the result of this function so make it void. Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index cc30215f5a43..ff7d0d291531 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -1111,9 +1111,10 @@ static inline int brcm_phy_start(struct brcm_pcie *pcie) return pcie->rescal ? brcm_phy_cntl(pcie, 1) : 0; } -static inline int brcm_phy_stop(struct brcm_pcie *pcie) +static inline void brcm_phy_stop(struct brcm_pcie *pcie) { - return pcie->rescal ? brcm_phy_cntl(pcie, 0) : 0; + if (pcie->rescal) + brcm_phy_cntl(pcie, 0); } static void brcm_pcie_turn_off(struct brcm_pcie *pcie) @@ -1143,14 +1144,13 @@ static void brcm_pcie_turn_off(struct brcm_pcie *pcie) static int brcm_pcie_suspend(struct device *dev) { struct brcm_pcie *pcie = dev_get_drvdata(dev); - int ret; brcm_pcie_turn_off(pcie); - ret = brcm_phy_stop(pcie); + brcm_phy_stop(pcie); reset_control_rearm(pcie->rescal); clk_disable_unprepare(pcie->clk); - return ret; + return 0; } static int brcm_pcie_resume(struct device *dev) From patchwork Wed Nov 10 22:14:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553624 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=MX8Wb8jH; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HqK3X6Wb0z9sVc for ; Thu, 11 Nov 2021 09:17:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233757AbhKJWUb (ORCPT ); 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Wed, 10 Nov 2021 14:15:07 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Rob Herring , Saenz Julienne , linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 2/8] dt-bindings: PCI: Correct brcmstb interrupts, interrupt-map. Date: Wed, 10 Nov 2021 17:14:42 -0500 Message-Id: <20211110221456.11977-3-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The "pcie" and "msi" interrupts were given the same interrupt when they are actually different. Interrupt-map only had the INTA entry; the INTB, INTC, and INTD entries are added. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Acked-by: Rob Herring --- Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index b9589a0daa5c..508e5dce1282 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -142,11 +142,15 @@ examples: #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; - interrupts = , + interrupts = , ; interrupt-names = "pcie", "msi"; interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH + 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH + 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH + 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + msi-parent = <&pcie0>; msi-controller; ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; From patchwork Wed Nov 10 22:14:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553623 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=U8PlSZUX; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HqK3X3jssz9sCD for ; Thu, 11 Nov 2021 09:17:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233750AbhKJWUa (ORCPT ); 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Wed, 10 Nov 2021 14:15:09 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Rob Herring , Saenz Julienne , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 3/8] dt-bindings: PCI: Add bindings for Brcmstb EP voltage regulators Date: Wed, 10 Nov 2021 17:14:43 -0500 Message-Id: <20211110221456.11977-4-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Similar to the regulator bindings found in "rockchip-pcie-host.txt", this allows optional regulators to be attached and controlled by the PCIe RC driver. That being said, this driver searches in the DT subnode (the EP node, eg pci-ep@0,0) for the regulator property. The use of a regulator property in the pcie EP subnode such as "vpcie12v-supply" depends on a pending pullreq to the pci-bus.yaml file at https://github.com/devicetree-org/dt-schema/pull/63 Signed-off-by: Jim Quinlan --- .../bindings/pci/brcm,stb-pcie.yaml | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 508e5dce1282..ef2427320b7d 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -158,5 +158,28 @@ examples: <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; brcm,enable-ssc; brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; + + /* PCIe bridge */ + pci@0,0 { + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pciclass,0604"; + device_type = "pci"; + vpcie3v3-supply = <&vreg7>; + ranges; + + /* PCIe endpoint */ + pci-ep@0,0 { + assigned-addresses = + <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>; + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pci14e4,1688"; + #address-cells = <3>; + #size-cells = <2>; + + ranges; + }; + }; }; }; From patchwork Wed Nov 10 22:14:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553628 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=FanXgsDd; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HqK3r4xvRz9sVc for ; Thu, 11 Nov 2021 09:18:00 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233870AbhKJWUn (ORCPT ); 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Wed, 10 Nov 2021 14:15:13 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Sean V Kelley , Jonathan Cameron , Qiuxu Zhuo , Keith Busch , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 4/8] PCI/portdrv: Create pcie_is_port_dev() func from existing code Date: Wed, 10 Nov 2021 17:14:44 -0500 Message-Id: <20211110221456.11977-5-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The function will be needed elsewhere in a few commits. Signed-off-by: Jim Quinlan --- drivers/pci/pci.h | 2 ++ drivers/pci/pcie/portdrv_pci.c | 23 ++++++++++++++++++----- 2 files changed, 20 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 1cce56c2aea0..c2bd1995d3a9 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -744,4 +744,6 @@ extern const struct attribute_group aspm_ctrl_attr_group; extern const struct attribute_group pci_dev_reset_method_attr_group; +bool pcie_is_port_dev(struct pci_dev *dev); + #endif /* DRIVERS_PCI_H */ diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index c7ff1eea225a..63f2a87e9db8 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -90,6 +90,23 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = { #define PCIE_PORTDRV_PM_OPS NULL #endif /* !PM */ +bool pcie_is_port_dev(struct pci_dev *dev) +{ + int type; + + if (!dev) + return false; + + type = pci_pcie_type(dev); + + return pci_is_pcie(dev) && + ((type == PCI_EXP_TYPE_ROOT_PORT) || + (type == PCI_EXP_TYPE_UPSTREAM) || + (type == PCI_EXP_TYPE_DOWNSTREAM) || + (type == PCI_EXP_TYPE_RC_EC)); +} +EXPORT_SYMBOL_GPL(pcie_is_port_dev); + /* * pcie_portdrv_probe - Probe PCI-Express port devices * @dev: PCI-Express port device being probed @@ -104,11 +121,7 @@ static int pcie_portdrv_probe(struct pci_dev *dev, int type = pci_pcie_type(dev); int status; - if (!pci_is_pcie(dev) || - ((type != PCI_EXP_TYPE_ROOT_PORT) && - (type != PCI_EXP_TYPE_UPSTREAM) && - (type != PCI_EXP_TYPE_DOWNSTREAM) && - (type != PCI_EXP_TYPE_RC_EC))) + if (!pcie_is_port_dev(dev)) return -ENODEV; if (type == PCI_EXP_TYPE_RC_EC) From patchwork Wed Nov 10 22:14:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553629 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=QR6XZHmd; dkim-atps=neutral Authentication-Results: ozlabs.org; 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Wed, 10 Nov 2021 14:15:18 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id q11sm611774pfk.192.2021.11.10.14.15.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Nov 2021 14:15:17 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Sean V Kelley , Jonathan Cameron , Qiuxu Zhuo , Keith Busch , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 5/8] PCI/portdrv: add mechanism to turn on subdev regulators Date: Wed, 10 Nov 2021 17:14:45 -0500 Message-Id: <20211110221456.11977-6-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Adds a mechanism inside the root port device to identify standard PCIe regulators in the DT, allocate them, and turn them on before the rest of the bus is scanned during pci_host_probe(). A root complex driver can leverage this mechanism by setting the pci_ops methods add_bus and remove_bus to pci_subdev_regulators_{add,remove}_bus. The allocated structure that contains the regulators is stored in dev.driver_data. The unabridged reason for doing this is as follows. We would like the Broadcom STB PCIe root complex driver (and others) to be able to turn off/on regulators[1] that provide power to endpoint[2] devices. Typically, the drivers of these endpoint devices are stock Linux drivers that are not aware that these regulator(s) exist and must be turned on for the driver to be probed. The simple solution of course is to turn these regulators on at boot and keep them on. However, this solution does not satisfy at least three of our usage modes: 1. For example, one customer uses multiple PCIe controllers, but wants the ability to, by script invoking and unbind, turn any or all of them by and their subdevices off to save power, e.g. when in battery mode. 2. Another example is when a watchdog script discovers that an endpoint device is in an unresponsive state and would like to unbind, power toggle, and re-bind just the PCIe endpoint and controller. 3. Of course we also want power turned off during suspend mode. However, some endpoint devices may be able to "wake" during suspend and we need to recognise this case and veto the nominal act of turning off its regulator. Such is the case with Wake-on-LAN and Wake-on-WLAN support where PCIe end-point device needs to be kept powered on in order to receive network packets and wake-up the system. In all of these cases it is advantageous for the PCIe controller to govern the turning off/on the regulators needed by the endpoint device. The first two cases can be done by simply unbinding and binding the PCIe controller, if the controller has control of these regulators. [1] These regulators typically govern the actual power supply to the endpoint chip. Sometimes they may be a the official PCIe socket power -- such as 3.3v or aux-3.3v. Sometimes they are truly the regulator(s) that supply power to the EP chip. [2] The 99% configuration of our boards is a single endpoint device attached to the PCIe controller. I use the term endpoint but it could possible mean a switch as well. Signed-off-by: Jim Quinlan Reported-by: kernel test robot --- drivers/pci/bus.c | 72 ++++++++++++++++++++++++++++++++++ drivers/pci/pci.h | 8 ++++ drivers/pci/pcie/portdrv_pci.c | 32 +++++++++++++++ 3 files changed, 112 insertions(+) diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 3cef835b375f..c39fdf36b0ad 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c @@ -419,3 +419,75 @@ void pci_bus_put(struct pci_bus *bus) if (bus) put_device(&bus->dev); } + +static void *alloc_subdev_regulators(struct device *dev) +{ + static const char * const supplies[] = { + "vpcie3v3", + "vpcie3v3aux", + "vpcie12v", + }; + const size_t size = sizeof(struct subdev_regulators) + + sizeof(struct regulator_bulk_data) * ARRAY_SIZE(supplies); + struct subdev_regulators *sr; + int i; + + sr = devm_kzalloc(dev, size, GFP_KERNEL); + + if (sr) { + sr->num_supplies = ARRAY_SIZE(supplies); + for (i = 0; i < ARRAY_SIZE(supplies); i++) + sr->supplies[i].supply = supplies[i]; + } + + return sr; +} + + +int pci_subdev_regulators_add_bus(struct pci_bus *bus) +{ + struct device *dev = &bus->dev; + struct subdev_regulators *sr; + int ret; + + if (!pcie_is_port_dev(bus->self)) + return 0; + + if (WARN_ON(bus->dev.driver_data)) + dev_err(dev, "multiple clients using dev.driver_data\n"); + + sr = alloc_subdev_regulators(&bus->dev); + if (!sr) + return -ENOMEM; + + bus->dev.driver_data = sr; + ret = regulator_bulk_get(dev, sr->num_supplies, sr->supplies); + if (ret) + return ret; + + ret = regulator_bulk_enable(sr->num_supplies, sr->supplies); + if (ret) { + dev_err(dev, "failed to enable regulators for downstream device\n"); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(pci_subdev_regulators_add_bus); + +void pci_subdev_regulators_remove_bus(struct pci_bus *bus) +{ + struct device *dev = &bus->dev; + struct subdev_regulators *sr; + + if (!pcie_is_port_dev(bus->self)) + return; + + sr = bus->dev.driver_data; + if (!sr) + return; + + if (regulator_bulk_disable(sr->num_supplies, sr->supplies)) + dev_err(dev, "failed to disable regulators for downstream device\n"); +} +EXPORT_SYMBOL_GPL(pci_subdev_regulators_remove_bus); diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index c2bd1995d3a9..3f6cf75b91cc 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -3,6 +3,7 @@ #define DRIVERS_PCI_H #include +#include /* Number of possible devfns: 0.0 to 1f.7 inclusive */ #define MAX_NR_DEVFNS 256 @@ -744,6 +745,13 @@ extern const struct attribute_group aspm_ctrl_attr_group; extern const struct attribute_group pci_dev_reset_method_attr_group; +struct subdev_regulators { + unsigned int num_supplies; + struct regulator_bulk_data supplies[]; +}; + bool pcie_is_port_dev(struct pci_dev *dev); +int pci_subdev_regulators_add_bus(struct pci_bus *bus); +void pci_subdev_regulators_remove_bus(struct pci_bus *bus); #endif /* DRIVERS_PCI_H */ diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 63f2a87e9db8..9330cfbebdc1 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -15,6 +15,7 @@ #include #include #include +#include #include "../pci.h" #include "portdrv.h" @@ -35,6 +36,9 @@ bool pcie_ports_native; */ bool pcie_ports_dpc_native; +/* forward declaration */ +static struct pci_driver pcie_portdriver; + static int __init pcie_port_setup(char *str) { if (!strncmp(str, "compat", 6)) @@ -107,6 +111,26 @@ bool pcie_is_port_dev(struct pci_dev *dev) } EXPORT_SYMBOL_GPL(pcie_is_port_dev); +static int subdev_regulator_resume(struct pci_dev *dev) +{ + struct subdev_regulators *sr = dev->dev.driver_data; + + if (sr) + return regulator_bulk_enable(sr->num_supplies, sr->supplies); + + return 0; +} + +static int subdev_regulator_suspend(struct pci_dev *dev, pm_message_t state) +{ + struct subdev_regulators *sr = dev->dev.driver_data; + + if (sr) + return regulator_bulk_disable(sr->num_supplies, sr->supplies); + + return 0; +} + /* * pcie_portdrv_probe - Probe PCI-Express port devices * @dev: PCI-Express port device being probed @@ -131,6 +155,13 @@ static int pcie_portdrv_probe(struct pci_dev *dev, if (status) return status; + if (dev->bus->ops && + dev->bus->ops->add_bus && + dev->bus->dev.driver_data) { + pcie_portdriver.resume = subdev_regulator_resume; + pcie_portdriver.suspend = subdev_regulator_suspend; + } + pci_save_state(dev); dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE | @@ -237,6 +268,7 @@ static struct pci_driver pcie_portdriver = { .err_handler = &pcie_portdrv_err_handler, .driver.pm = PCIE_PORTDRV_PM_OPS, + /* Note: suspend and resume may be set during probe */ }; static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d) From patchwork Wed Nov 10 22:14:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553627 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=CyFcKDsR; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; 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Wed, 10 Nov 2021 14:15:22 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id q11sm611774pfk.192.2021.11.10.14.15.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Nov 2021 14:15:21 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Sean V Kelley , Jonathan Cameron , Qiuxu Zhuo , Keith Busch , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 6/8] PCI/portdrv: Do not turn off subdev regulators if EP can wake up Date: Wed, 10 Nov 2021 17:14:46 -0500 Message-Id: <20211110221456.11977-7-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If any downstream device may wake up during S2/S3 suspend, we do not want to turn off its power when suspending. Signed-off-by: Jim Quinlan --- drivers/pci/pci.h | 1 + drivers/pci/pcie/portdrv_pci.c | 43 +++++++++++++++++++++++++++++----- 2 files changed, 38 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 3f6cf75b91cc..27abb977d0ec 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -746,6 +746,7 @@ extern const struct attribute_group aspm_ctrl_attr_group; extern const struct attribute_group pci_dev_reset_method_attr_group; struct subdev_regulators { + bool ep_wakeup_capable; unsigned int num_supplies; struct regulator_bulk_data supplies[]; }; diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 9330cfbebdc1..717e816d0fc8 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -111,24 +111,55 @@ bool pcie_is_port_dev(struct pci_dev *dev) } EXPORT_SYMBOL_GPL(pcie_is_port_dev); +static int pci_dev_may_wakeup(struct pci_dev *dev, void *data) +{ + bool *ret = data; + + if (device_may_wakeup(&dev->dev)) { + *ret = true; + dev_dbg(&dev->dev, "disable cancelled for wake-up device\n"); + } + return (int) *ret; +} + static int subdev_regulator_resume(struct pci_dev *dev) { struct subdev_regulators *sr = dev->dev.driver_data; - if (sr) - return regulator_bulk_enable(sr->num_supplies, sr->supplies); + if (!sr) + return 0; - return 0; + if (sr->ep_wakeup_capable) { + /* + * We are resuming from a suspend. In the previous suspend + * we did not disable the power supplies, so there is no + * need to enable them (and falsely increase their usage + * count). + */ + sr->ep_wakeup_capable = false; + return 0; + } + + return regulator_bulk_enable(sr->num_supplies, sr->supplies); } static int subdev_regulator_suspend(struct pci_dev *dev, pm_message_t state) { struct subdev_regulators *sr = dev->dev.driver_data; - if (sr) - return regulator_bulk_disable(sr->num_supplies, sr->supplies); + if (!sr) + return 0; + /* + * If at least one device on this bus is enabled as a + * wake-up source, do not turn off regulators. + */ + sr->ep_wakeup_capable = false; + pci_walk_bus(dev->bus, pci_dev_may_wakeup, + &sr->ep_wakeup_capable); + if (sr->ep_wakeup_capable) + return 0; - return 0; + return regulator_bulk_disable(sr->num_supplies, sr->supplies); } /* From patchwork Wed Nov 10 22:14:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553626 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=o1ywP0id; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HqK3l5tMLz9sCD for ; Thu, 11 Nov 2021 09:17:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233820AbhKJWUj (ORCPT ); Wed, 10 Nov 2021 17:20:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233039AbhKJWU0 (ORCPT ); Wed, 10 Nov 2021 17:20:26 -0500 Received: from mail-pg1-x52f.google.com (mail-pg1-x52f.google.com [IPv6:2607:f8b0:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C132C0797BF; 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Wed, 10 Nov 2021 14:15:24 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id q11sm611774pfk.192.2021.11.10.14.15.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Nov 2021 14:15:23 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 7/8] PCI: brcmstb: Split brcm_pcie_setup() into two funcs Date: Wed, 10 Nov 2021 17:14:47 -0500 Message-Id: <20211110221456.11977-8-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org We need to take some code in brcm_pcie_setup() and put it in a new function brcm_pcie_linkup(). In future commits the brcm_pcie_linkup() function will be called indirectly by pci_host_probe() as opposed to the host driver invoking it directly. Some code that was executed after the PCIe linkup is now placed so that it executes prior to linkup, since this code has to run prior to the invocation of pci_host_probe(). Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 65 ++++++++++++++++----------- 1 file changed, 39 insertions(+), 26 deletions(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index ff7d0d291531..1a841c240abb 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -863,16 +863,9 @@ static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, static int brcm_pcie_setup(struct brcm_pcie *pcie) { - struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); u64 rc_bar2_offset, rc_bar2_size; void __iomem *base = pcie->base; - struct device *dev = pcie->dev; - struct resource_entry *entry; - bool ssc_good = false; - struct resource *res; - int num_out_wins = 0; - u16 nlw, cls, lnksta; - int i, ret, memc; + int ret, memc; u32 tmp, burst, aspm_support; /* Reset the bridge */ @@ -957,6 +950,40 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie) if (pcie->gen) brcm_pcie_set_gen(pcie, pcie->gen); + /* Don't advertise L0s capability if 'aspm-no-l0s' */ + aspm_support = PCIE_LINK_STATE_L1; + if (!of_property_read_bool(pcie->np, "aspm-no-l0s")) + aspm_support |= PCIE_LINK_STATE_L0S; + tmp = readl(base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY); + u32p_replace_bits(&tmp, aspm_support, + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK); + writel(tmp, base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY); + + /* + * For config space accesses on the RC, show the right class for + * a PCIe-PCIe bridge (the default setting is to be EP mode). + */ + tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3); + u32p_replace_bits(&tmp, 0x060400, + PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK); + writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3); + + return 0; +} + +static int brcm_pcie_linkup(struct brcm_pcie *pcie) +{ + struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); + struct device *dev = pcie->dev; + void __iomem *base = pcie->base; + struct resource_entry *entry; + struct resource *res; + int num_out_wins = 0; + u16 nlw, cls, lnksta; + bool ssc_good = false; + u32 tmp; + int ret, i; + /* Unassert the fundamental reset */ pcie->perst_set(pcie, 0); @@ -994,24 +1021,6 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie) num_out_wins++; } - /* Don't advertise L0s capability if 'aspm-no-l0s' */ - aspm_support = PCIE_LINK_STATE_L1; - if (!of_property_read_bool(pcie->np, "aspm-no-l0s")) - aspm_support |= PCIE_LINK_STATE_L0S; - tmp = readl(base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY); - u32p_replace_bits(&tmp, aspm_support, - PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK); - writel(tmp, base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY); - - /* - * For config space accesses on the RC, show the right class for - * a PCIe-PCIe bridge (the default setting is to be EP mode). - */ - tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3); - u32p_replace_bits(&tmp, 0x060400, - PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK); - writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3); - if (pcie->ssc) { ret = brcm_pcie_set_ssc(pcie); if (ret == 0) @@ -1186,6 +1195,10 @@ static int brcm_pcie_resume(struct device *dev) if (ret) goto err_reset; + ret = brcm_pcie_linkup(pcie); + if (ret) + goto err_reset; + if (pcie->msi) brcm_msi_set_regs(pcie->msi); From patchwork Wed Nov 10 22:14:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 1553625 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=ln4adG2D; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HqK3b0BYYz9sCD for ; Thu, 11 Nov 2021 09:17:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233769AbhKJWUc (ORCPT ); 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Wed, 10 Nov 2021 14:15:26 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Bjorn Helgaas , Nicolas Saenz Julienne , Rob Herring , Mark Brown , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v8 8/8] PCI: brcmstb: Add control of subdevice voltage regulators Date: Wed, 10 Nov 2021 17:14:48 -0500 Message-Id: <20211110221456.11977-9-jim2101024@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211110221456.11977-1-jim2101024@gmail.com> References: <20211110221456.11977-1-jim2101024@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This Broadcom STB PCIe RC driver has one port and connects directly to one device, be it a switch or an endpoint. We want to be able to leverage the recently added mechansim that allocates and turns on/off subdevice regulators. All that needs to be done is to put the regulator DT nodes in the bridge below host and to set the pci_ops methods add_bus and remove_bus. Note that the pci_subdev_regulators_add_bus() method is wrapped for two reasons: 1. To acheive linkup after the voltage regulators are turned on. 2. If, in the case of an unsuccessful linkup, to redirect any PCIe accesses to subdevices, e.g. the scan for DEV/ID. This redirection is needed because the Broadcom PCIe HW wil issue a CPU abort if such an access is made when there is no linkup. Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 56 ++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index 1a841c240abb..692df3dda77a 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -191,6 +191,7 @@ static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val); static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val); +static int brcm_pcie_add_bus(struct pci_bus *bus); enum { RGR1_SW_INIT_1, @@ -295,6 +296,7 @@ struct brcm_pcie { u32 hw_rev; void (*perst_set)(struct brcm_pcie *pcie, u32 val); void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); + bool refusal_mode; }; /* @@ -711,6 +713,18 @@ static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, /* Accesses to the RC go right to the RC registers if slot==0 */ if (pci_is_root_bus(bus)) return PCI_SLOT(devfn) ? NULL : base + where; + if (pcie->refusal_mode) { + /* + * At this point we do not have link. There will be a CPU + * abort -- a quirk with this controller --if Linux tries + * to read any config-space registers besides those + * targeting the host bridge. To prevent this we hijack + * the address to point to a safe access that will return + * 0xffffffff. + */ + writel(0xffffffff, base + PCIE_MISC_RC_BAR2_CONFIG_HI); + return base + PCIE_MISC_RC_BAR2_CONFIG_HI + (where & 0x3); + } /* For devices, write to the config space index register */ idx = PCIE_ECAM_OFFSET(bus->number, devfn, 0); @@ -722,6 +736,8 @@ static struct pci_ops brcm_pcie_ops = { .map_bus = brcm_pcie_map_conf, .read = pci_generic_config_read, .write = pci_generic_config_write, + .add_bus = brcm_pcie_add_bus, + .remove_bus = pci_subdev_regulators_remove_bus, }; static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) @@ -1242,6 +1258,34 @@ static const struct of_device_id brcm_pcie_match[] = { {}, }; +static int brcm_pcie_add_bus(struct pci_bus *bus) +{ + struct pci_host_bridge *hb; + struct brcm_pcie *pcie; + int ret; + + if (!pcie_is_port_dev(bus->self)) + return 0; + + hb = pci_find_host_bridge(bus); + pcie = (struct brcm_pcie *) hb->sysdata; + + ret = pci_subdev_regulators_add_bus(bus); + if (ret) + return ret; + + /* + * If we have failed linkup there is no point to return an error as + * currently it will cause a WARNING() from pci_alloc_child_bus(). + * We return 0 and turn on the "refusal_mode" so that any further + * accesses to the pci_dev just get 0xffffffff + */ + if (brcm_pcie_linkup(pcie) != 0) + pcie->refusal_mode = true; + + return 0; +} + static int brcm_pcie_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node, *msi_np; @@ -1333,7 +1377,17 @@ static int brcm_pcie_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pcie); - return pci_host_probe(bridge); + ret = pci_host_probe(bridge); + if (!ret && !brcm_pcie_link_up(pcie)) + ret = -ENODEV; + + if (ret) { + brcm_pcie_remove(pdev); + return ret; + } + + return 0; + fail: __brcm_pcie_remove(pcie); return ret;