From patchwork Tue Sep 12 13:57:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 812858 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xs5xt4GQrz9s7B for ; Tue, 12 Sep 2017 23:59:14 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5DAF1C221AD; Tue, 12 Sep 2017 13:58:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 76470C21FCF; Tue, 12 Sep 2017 13:58:42 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B9B5AC221DC; Tue, 12 Sep 2017 13:57:51 +0000 (UTC) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.135]) by lists.denx.de (Postfix) with ESMTPS id 00853C221AA for ; Tue, 12 Sep 2017 13:57:47 +0000 (UTC) Received: from andy.yan?rock-chips.com (unknown [192.168.167.161]) by regular1.263xmail.com (Postfix) with ESMTP id 889DC1E165 for ; Tue, 12 Sep 2017 21:57:38 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id A4D8E387; Tue, 12 Sep 2017 21:57:38 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: philipp.tomsich@theobroma-systems.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 31569VXJHFZ; Tue, 12 Sep 2017 21:57:39 +0800 (CST) From: Andy Yan To: philipp.tomsich@theobroma-systems.com, sjg@chromium.org Date: Tue, 12 Sep 2017 21:57:32 +0800 Message-Id: <1505224652-29989-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505224549-29936-1-git-send-email-andy.yan@rock-chips.com> References: <1505224549-29936-1-git-send-email-andy.yan@rock-chips.com> Cc: u-boot@lists.denx.de, Andy Yan Subject: [U-Boot] [PATCH 1/3] rockchip: make boot_mode releated codes reused across all platforms X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" setup_boot_mode function use the same logic but different mode register address across all the rockchip platforms, so it's better to make this function reused across all the platforms, and let the mode register address setting from the config file. Signed-off-by: Andy Yan Reviewed-by: Simon Glass --- arch/arm/include/asm/arch-rockchip/boot_mode.h | 2 ++ arch/arm/mach-rockchip/Kconfig | 14 +++++++++++ arch/arm/mach-rockchip/Makefile | 5 +++- arch/arm/mach-rockchip/boot_mode.c | 33 ++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3036-board.c | 24 ------------------- arch/arm/mach-rockchip/rk322x-board.c | 24 ------------------- arch/arm/mach-rockchip/rk3288-board.c | 25 ------------------- arch/arm/mach-rockchip/rk3399-board.c | 14 +++++++++++ 8 files changed, 67 insertions(+), 74 deletions(-) create mode 100644 arch/arm/mach-rockchip/boot_mode.c create mode 100644 arch/arm/mach-rockchip/rk3399-board.c diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h index bd65f60..163b2e7 100644 --- a/arch/arm/include/asm/arch-rockchip/boot_mode.h +++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h @@ -16,4 +16,6 @@ /* enter usb mass storage mode */ #define BOOT_UMS (REBOOT_FLAG + 12) +int setup_boot_mode(void); + #endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d9b25d5..527ca60 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -114,6 +114,7 @@ config ROCKCHIP_RK3399 select SPL_DRIVERS_MISC_SUPPORT select ENABLE_ARM_SOC_BOOT0_HOOK select DEBUG_UART_BOARD_INIT + select BOARD_LATE_INIT help The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72 and quad-core Cortex-A53. @@ -149,6 +150,19 @@ config TPL_ROCKCHIP_BACK_TO_BROM SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. +config ROCKCHIP_BOOT_MODE_REG + hex "Rockchip boot mode flag register address" + default 0x200081c8 if ROCKCHIP_RK3036 + default 0x110005d8 if ROCKCHIP_RK322X + default 0xff730094 if ROCKCHIP_RK3288 + default 0xff738200 if ROCKCHIP_RK3368 + default 0xff320300 if ROCKCHIP_RK3399 + default 0x10300580 if ROCKCHIP_RV1108 + default 0 + help + The Soc will enter to different boot mode according to different + value of this register. + config ROCKCHIP_SPL_RESERVE_IRAM hex "Size of IRAM reserved in SPL" default 0x4000 diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 79e9704..b7624cb 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -10,7 +10,6 @@ # the stack-pointer is valid before switching to the U-Boot stack). obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o @@ -22,10 +21,14 @@ obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) +ifneq ($(CONFIG_ROCKCHIP_BOOT_MODE_REG),0) +obj-y += boot_mode.o +endif obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o +obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o endif obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c new file mode 100644 index 0000000..7b3cbc5 --- /dev/null +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -0,0 +1,33 @@ +/* + * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +int setup_boot_mode(void) +{ + void *reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG; + int boot_mode = readl(reg); + + debug("boot mode %x.\n", boot_mode); + + /* Clear boot mode */ + writel(BOOT_NORMAL, reg); + + switch (boot_mode) { + case BOOT_FASTBOOT: + printf("enter fastboot!\n"); + env_set("preboot", "setenv preboot; fastboot usb0"); + break; + case BOOT_UMS: + printf("enter UMS!\n"); + env_set("preboot", "setenv preboot; ums mmc 0"); + break; + } + + return 0; +} diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c index a3457f3..a5d2571 100644 --- a/arch/arm/mach-rockchip/rk3036-board.c +++ b/arch/arm/mach-rockchip/rk3036-board.c @@ -19,30 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define GRF_BASE 0x20008000 - -static void setup_boot_mode(void) -{ - struct rk3036_grf *const grf = (void *)GRF_BASE; - int boot_mode = readl(&grf->os_reg[4]); - - debug("boot mode %x.\n", boot_mode); - - /* Clear boot mode */ - writel(BOOT_NORMAL, &grf->os_reg[4]); - - switch (boot_mode) { - case BOOT_FASTBOOT: - printf("enter fastboot!\n"); - env_set("preboot", "setenv preboot; fastboot usb0"); - break; - case BOOT_UMS: - printf("enter UMS!\n"); - env_set("preboot", "setenv preboot; ums mmc 0"); - break; - } -} - __weak int rk_board_late_init(void) { return 0; diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index c0ac2e9..3af137e 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -15,30 +15,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define GRF_BASE 0x11000000 - -static void setup_boot_mode(void) -{ - struct rk322x_grf *const grf = (void *)GRF_BASE; - int boot_mode = readl(&grf->os_reg[4]); - - debug("boot mode %x.\n", boot_mode); - - /* Clear boot mode */ - writel(BOOT_NORMAL, &grf->os_reg[4]); - - switch (boot_mode) { - case BOOT_FASTBOOT: - printf("enter fastboot!\n"); - env_set("preboot", "setenv preboot; fastboot usb0"); - break; - case BOOT_UMS: - printf("enter UMS!\n"); - env_set("preboot", "setenv preboot; ums mmc 0"); - break; - } -} - __weak int rk_board_late_init(void) { return 0; diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 278bb40..1c53cca 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -23,31 +23,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define PMU_BASE 0xff730000 - -static void setup_boot_mode(void) -{ - struct rk3288_pmu *const pmu = (void *)PMU_BASE; - int boot_mode = readl(&pmu->sys_reg[0]); - - debug("boot mode %x.\n", boot_mode); - - /* Clear boot mode */ - writel(BOOT_NORMAL, &pmu->sys_reg[0]); - - switch (boot_mode) { - case BOOT_FASTBOOT: - printf("enter fastboot!\n"); - env_set("preboot", "setenv preboot; fastboot usb0"); - break; - case BOOT_UMS: - printf("enter UMS!\n"); - env_set("preboot", "setenv preboot; if mmc dev 0;" - "then ums mmc 0; else ums mmc 1;fi"); - break; - } -} - __weak int rk_board_late_init(void) { return 0; diff --git a/arch/arm/mach-rockchip/rk3399-board.c b/arch/arm/mach-rockchip/rk3399-board.c new file mode 100644 index 0000000..9293843 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3399-board.c @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +int board_late_init(void) +{ + setup_boot_mode(); + return 0; +} From patchwork Tue Sep 12 13:57:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 812859 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xs5yQ62GZz9s7B for ; Tue, 12 Sep 2017 23:59:42 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 58E38C22226; Tue, 12 Sep 2017 13:59:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C0D32C22174; Tue, 12 Sep 2017 13:59:35 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B69ECC221E9; Tue, 12 Sep 2017 13:58:11 +0000 (UTC) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.139]) by lists.denx.de (Postfix) with ESMTPS id 438A2C221DA for ; Tue, 12 Sep 2017 13:58:10 +0000 (UTC) Received: from andy.yan?rock-chips.com (unknown [192.168.167.192]) by regular1.263xmail.com (Postfix) with ESMTP id AB0A35523 for ; Tue, 12 Sep 2017 21:58:03 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id CA71339E; Tue, 12 Sep 2017 21:58:04 +0800 (CST) X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: philipp.tomsich@theobroma-systems.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: yxj@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 1931LQ241F; Tue, 12 Sep 2017 21:58:05 +0800 (CST) From: Andy Yan To: philipp.tomsich@theobroma-systems.com, sjg@chromium.org Date: Tue, 12 Sep 2017 21:57:59 +0800 Message-Id: <1505224679-30046-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505224549-29936-1-git-send-email-andy.yan@rock-chips.com> References: <1505224549-29936-1-git-send-email-andy.yan@rock-chips.com> Cc: u-boot@lists.denx.de, Andy Yan Subject: [U-Boot] [PATCH 2/3] rockchip: add support for backing to bootrom download mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Rockchip bootrom will enter download mode if it returns from spl/tpl with a none-zero value and couldn't find a valid image in the backup partition. This patch provide a method to instruct the system to back to bootrom download mode by checking the BROM_DOWNLOAD_FLAG register. As the bootrom download function relys on some modules such as interrupts, so we need to back to bootrom as early as possbile before the tpl/tps code override the interrupt settings. Signed-off-by: Andy Yan Reviewed-by: Kever Yang --- arch/arm/include/asm/arch-rockchip/boot_mode.h | 4 ++ arch/arm/include/asm/arch-rockchip/bootrom.h | 2 +- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/bootrom.c | 2 +- arch/arm/mach-rockchip/save_boot_param.S | 56 +++++++++++++++++++++----- 5 files changed, 54 insertions(+), 11 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/boot_mode.h b/arch/arm/include/asm/arch-rockchip/boot_mode.h index 163b2e7..6b2a610 100644 --- a/arch/arm/include/asm/arch-rockchip/boot_mode.h +++ b/arch/arm/include/asm/arch-rockchip/boot_mode.h @@ -15,7 +15,11 @@ #define BOOT_CHARGING (REBOOT_FLAG + 11) /* enter usb mass storage mode */ #define BOOT_UMS (REBOOT_FLAG + 12) +/* enter bootrom download mode */ +#define BOOT_BROM_DOWNLOAD 0xEF08A53C +#ifndef __ASSEMBLY__ int setup_boot_mode(void); +#endif #endif diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h index 92eb878..6ae3e94 100644 --- a/arch/arm/include/asm/arch-rockchip/bootrom.h +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h @@ -22,6 +22,6 @@ void back_to_bootrom(void); /** * Assembler component for the above (do not call this directly) */ -void _back_to_bootrom_s(void); +void _back_to_bootrom_s(int mode); #endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 527ca60..a2b7a7e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -113,6 +113,7 @@ config ROCKCHIP_RK3399 select SPL_SERIAL_SUPPORT select SPL_DRIVERS_MISC_SUPPORT select ENABLE_ARM_SOC_BOOT0_HOOK + select ROCKCHIP_BROM_HELPER select DEBUG_UART_BOARD_INIT select BOARD_LATE_INIT help diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c index 8380e4e..6f0d583 100644 --- a/arch/arm/mach-rockchip/bootrom.c +++ b/arch/arm/mach-rockchip/bootrom.c @@ -12,5 +12,5 @@ void back_to_bootrom(void) #if CONFIG_IS_ENABLED(LIBCOMMON_SUPPORT) puts("Returning to boot ROM...\n"); #endif - _back_to_bootrom_s(); + _back_to_bootrom_s(0); } diff --git a/arch/arm/mach-rockchip/save_boot_param.S b/arch/arm/mach-rockchip/save_boot_param.S index 50fce20..325e81e 100644 --- a/arch/arm/mach-rockchip/save_boot_param.S +++ b/arch/arm/mach-rockchip/save_boot_param.S @@ -6,12 +6,25 @@ */ #include +#include #if defined(CONFIG_ARM64) .globl SAVE_SP_ADDR SAVE_SP_ADDR: .quad 0 +ENTRY(check_back_to_brom_dnl_flag) + ldr x8, =CONFIG_ROCKCHIP_BOOT_MODE_REG + ldr x9, [x8] + ldr x0, =BOOT_BROM_DOWNLOAD + cmp x9, x0 + b.ne save_boot_params_ret + mov x9, xzr + str x9, [x8] /* clear flag */ + mov x0, #1 /* indicate the bootrom to enter download mode */ + b _back_to_bootrom_s +ENDPROC(check_back_to_brom_dnl_flag) + ENTRY(save_boot_params) sub sp, sp, #0x60 stp x29, x30, [sp, #0x50] @@ -23,14 +36,22 @@ ENTRY(save_boot_params) ldr x8, =SAVE_SP_ADDR mov x9, sp str x9, [x8] +#if CONFIG_ROCKCHIP_BOOT_MODE_REG + b check_back_to_brom_dnl_flag +#else b save_boot_params_ret /* back to my caller */ +#endif ENDPROC(save_boot_params) +/* + * x0: return value for bootrom, none-zero for bootrom download + * mode and zero for normal boot mode + */ .globl _back_to_bootrom_s ENTRY(_back_to_bootrom_s) - ldr x0, =SAVE_SP_ADDR - ldr x0, [x0] - mov sp, x0 + ldr x1, =SAVE_SP_ADDR + ldr x1, [x1] + mov sp, x1 ldp x29, x30, [sp, #0x50] ldp x27, x28, [sp, #0x40] ldp x25, x26, [sp, #0x30] @@ -38,7 +59,6 @@ ENTRY(_back_to_bootrom_s) ldp x21, x22, [sp, #0x10] ldp x19, x20, [sp] add sp, sp, #0x60 - mov x0, xzr ret ENDPROC(_back_to_bootrom_s) #else @@ -46,6 +66,18 @@ ENDPROC(_back_to_bootrom_s) SAVE_SP_ADDR: .word 0 +ENTRY(check_back_to_brom_dnl_flag) + ldr r0, =CONFIG_ROCKCHIP_BOOT_MODE_REG + ldr r1, [r0] + ldr r2, =BOOT_BROM_DOWNLOAD + cmp r1, r2 + bne save_boot_params_ret + mov r3, #0 + str r3, [r0] @clear flag + mov r0, #1 @indicate the bootrom to enter download mode + b _back_to_bootrom_s +ENDPROC(check_back_to_brom_dnl_flag) + /* * void save_boot_params * @@ -55,15 +87,21 @@ ENTRY(save_boot_params) push {r1-r12, lr} ldr r0, =SAVE_SP_ADDR str sp, [r0] - b save_boot_params_ret @ back to my caller +#if CONFIG_ROCKCHIP_BOOT_MODE_REG + b check_back_to_brom_dnl_flag +#else + b save_boot_params_ret +#endif ENDPROC(save_boot_params) - +/* + * r0: return value for bootrom, none-zero for bootrom download + * mode and zero for normal boot mode + */ .globl _back_to_bootrom_s ENTRY(_back_to_bootrom_s) - ldr r0, =SAVE_SP_ADDR - ldr sp, [r0] - mov r0, #0 + ldr r1, =SAVE_SP_ADDR + ldr sp, [r1] pop {r1-r12, pc} ENDPROC(_back_to_bootrom_s) #endif From patchwork Tue Sep 12 13:58:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Yan X-Patchwork-Id: 812860 X-Patchwork-Delegate: philipp.tomsich@theobroma-systems.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xs5zQ48Pcz9s7B for ; Wed, 13 Sep 2017 00:00:34 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 58735C2221E; Tue, 12 Sep 2017 14:00:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.6 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BBF7CC22219; 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Tue, 12 Sep 2017 21:58:40 +0800 (CST) From: Andy Yan To: philipp.tomsich@theobroma-systems.com, sjg@chromium.org Date: Tue, 12 Sep 2017 21:58:33 +0800 Message-Id: <1505224713-30097-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1505224549-29936-1-git-send-email-andy.yan@rock-chips.com> References: <1505224549-29936-1-git-send-email-andy.yan@rock-chips.com> Cc: u-boot@lists.denx.de, Andy Yan Subject: [U-Boot] [PATCH 3/3] rockchip: check download key before bootup X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enter download mode if the download key pressed. Signed-off-by: Andy Yan --- arch/arm/mach-rockchip/boot_mode.c | 27 ++++++++++++++++++++++++++- board/rockchip/evb_rk3399/evb-rk3399.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c index 7b3cbc5..bff1cbc 100644 --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -8,11 +8,36 @@ #include #include +void set_back_to_bootrom_dnl_flag(void) +{ + writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); +} + +/* + * some boards use a adc key, but some use gpio + */ +__weak int rockchip_dnl_key_pressed(void) +{ + return false; +} + +void rockchip_dnl_mode_check(void) +{ + if (rockchip_dnl_key_pressed()) { + printf("download key pressed, enter download mode..."); + set_back_to_bootrom_dnl_flag(); + do_reset(NULL, 0, 0, NULL); + } +} + int setup_boot_mode(void) { void* reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG; - int boot_mode = readl(reg); + int boot_mode; + + rockchip_dnl_mode_check(); + boot_mode = readl(reg); debug("boot mode %x.\n", boot_mode); /* Clear boot mode */ diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index d50c59d..738d942 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include +#include #include #include #include @@ -13,6 +14,33 @@ DECLARE_GLOBAL_DATA_PTR; +#define KEY_DOWN_MIN_VAL 1 +#define KEY_DOWN_MAX_VAL 20 + +int rockchip_dnl_key_pressed(void) +{ + unsigned int ret; + unsigned int i; + unsigned int val; + int cnt = 0; + + for (i = 0; i < 10; i++) { + ret = adc_channel_single_shot("saradc", 1, &val); + if (ret) { + printf("%s adc_channel_single_shot fail!\n", __func__); + break; + } + + if ((val >= KEY_DOWN_MIN_VAL) && (val <= KEY_DOWN_MAX_VAL)) + cnt++; + } + + if (cnt >= 8) + return true; + else + return false; +} + int board_init(void) { struct udevice *pinctrl, *regulator;