From patchwork Thu Oct 21 09:27:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Schneider-Pargmann X-Patchwork-Id: 1544237 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=8MyqEVx8; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HZhw21PPvz9sS8 for ; Thu, 21 Oct 2021 20:27:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231332AbhJUJ3n (ORCPT ); Thu, 21 Oct 2021 05:29:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231320AbhJUJ3n (ORCPT ); Thu, 21 Oct 2021 05:29:43 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89829C06161C for ; Thu, 21 Oct 2021 02:27:27 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id b189-20020a1c1bc6000000b0030da052dd4fso116811wmb.3 for ; Thu, 21 Oct 2021 02:27:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YUizT5Wo6QNRZzLKQyX7xAagO6y2u5vlJ1IHIzpEMig=; b=8MyqEVx81dV7pE7mPfN/OecXsjb2Qv/SvK1MGn4n2hIQNJ6xMKdEUM7+tSQYLsARc3 384KGvuma+/fJGBxypQUfCheMIhkOkkRINw34Pzd0q/SQ6tR4MlMAjs9O5A3OrQOsiRU XQn7qlnXHnN2U/PjSlX/4M3Zd3m+z09PEBjntw/9xgPMKCdU1Si1ds056Yb8Dx1rl6rb NTVjgk1gQDglYkuxVLUWjuts337Pg5iKRfsw9QdieDjb/xigjd6HO2bazX259Tg7ET2a rA6JVukqzDBTeTV+BTOloCEfnGeeWnsh4zYM+WHymrp7JepuIuzfZ1Xb9JeDLn3+BS7/ O16Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YUizT5Wo6QNRZzLKQyX7xAagO6y2u5vlJ1IHIzpEMig=; b=ZbTW6G8D/VS27hEI5PSpiECF5MgaCw0ldTHbkEtrViZ/vL/G2z16DwxOB8xGxe0lXV wrIV6Dvm9ugkgmh0T2F3g5qd7SBi/kQ3yccTzLKaL2mEQVGezUG+/hbxSCUnmDjCMJFu LpHA7vuM+FNVbvQVCAL8Mq+LSu/6AMogTHysr5JmIxZYVh0VhP3gjk+Hp976Y3jlV2A7 FjUCvHYQeLUNuYSLCzsJ7vKO2SdYhxXJgYvs7HFMcIrDBCJZDSTgUVHfemmL9NSi2cZY BYlybXBbvjFPhpaBe89rXvVGT5+KgJrmyqp6XRBH3vBhMKIOeP8mPi7rssoMDDq6QzwU xB1A== X-Gm-Message-State: AOAM531BP/xguRJD006mUUugW5EzgIDOJzxzygVNSJ2PH9qBStbREzUL wNKD1eV4Sac+J8QLJZTstFQcag== X-Google-Smtp-Source: ABdhPJz1E+9+oInCY1vqxibaqKskcDP7eWbh3y5SDTdZxzg/MhVoYwSyqQLSyEcMXzma59LSuMGbqw== X-Received: by 2002:a05:600c:4111:: with SMTP id j17mr19808078wmi.59.1634808446096; Thu, 21 Oct 2021 02:27:26 -0700 (PDT) Received: from blmsp.lan ([2a02:2454:3e6:c900:5142:5fbb:5821:5dc3]) by smtp.gmail.com with ESMTPSA id d3sm4538468wrb.36.2021.10.21.02.27.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 02:27:25 -0700 (PDT) From: Markus Schneider-Pargmann To: Chun-Kuang Hu , Philipp Zabel , Rob Herring , Vinod Koul Cc: Sam Ravnborg , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Markus Schneider-Pargmann Subject: [PATCH v5 1/7] dt-bindings: mediatek,dpi: Add DP_INTF compatible Date: Thu, 21 Oct 2021 11:27:01 +0200 Message-Id: <20211021092707.3562523-2-msp@baylibre.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211021092707.3562523-1-msp@baylibre.com> References: <20211021092707.3562523-1-msp@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org DP_INTF is similar to DPI but does not have the exact same feature set or register layouts. DP_INTF is the sink of the display pipeline that is connected to the DisplayPort controller and encoder unit. It takes the same clocks as DPI. Signed-off-by: Markus Schneider-Pargmann Reviewed-by: Rob Herring --- Notes: Changes v4 -> v5: - Newly created patch after realizing that the specific clocks for dpintf were the same as engine and pixel clocks. .../bindings/display/mediatek/mediatek,dpi.yaml | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml index dd2896a40ff0..53acf9a84f7f 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml @@ -4,16 +4,16 @@ $id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: mediatek DPI Controller Device Tree Bindings +title: mediatek DPI/DP_INTF Controller Device Tree Bindings maintainers: - CK Hu - Jitao shi description: | - The Mediatek DPI function block is a sink of the display subsystem and - provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel - output bus. + The Mediatek DPI and DP_INTF function blocks are a sink of the display + subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a + parallel output bus. properties: compatible: @@ -23,6 +23,7 @@ properties: - mediatek,mt8173-dpi - mediatek,mt8183-dpi - mediatek,mt8192-dpi + - mediatek,mt8195-dpintf reg: maxItems: 1 @@ -54,7 +55,7 @@ properties: $ref: /schemas/graph.yaml#/properties/port description: Output port node. This port should be connected to the input port of an - attached HDMI or LVDS encoder chip. + attached HDMI, LVDS or DisplayPort encoder chip. required: - compatible From patchwork Thu Oct 21 09:27:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Schneider-Pargmann X-Patchwork-Id: 1544239 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=baylibre-com.20210112.gappssmtp.com header.i=@baylibre-com.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=suBCQYco; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HZhw23jJLz9sWJ for ; Thu, 21 Oct 2021 20:27:30 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231336AbhJUJ3o (ORCPT ); Thu, 21 Oct 2021 05:29:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231326AbhJUJ3o (ORCPT ); Thu, 21 Oct 2021 05:29:44 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5664FC061749 for ; Thu, 21 Oct 2021 02:27:28 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id 67-20020a1c1946000000b0030d4c90fa87so132451wmz.2 for ; Thu, 21 Oct 2021 02:27:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YHEDIhS7d+5sM1yG3p7LLvTgb3WIu2jXt+RBb0xlASQ=; b=suBCQYcolAMiamEKklNw9fxTBgPAmFMotspeeFnbt+Z4XGzKvJt4sQZTa3p8/ni6eW BOJtY3MahjWyuYgmfFedP95W7Q/cgesyiXY1FuEy1Q3NLPfegO1Z3xPg7fRBmvYRUelk bpphtoRk5KCu8Kuxd8Ic2X+FU1eUli9eE1cdV4p1viwyYP8iQM2pTjxcYmVhnDx9Ngh9 d1rPcAmMAmymRTglNqcSWXNfewgtwPgLwsHqeQGjFeiMTmrWnXfwIZO0cvBTmi8xaM30 NT1ie9sFJ8p/qNBUK2Ae6eiiNbFy4eNSHJTgB+qA6sOUNKOCFPUaYqXpOGyIG2Jj693n FAMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YHEDIhS7d+5sM1yG3p7LLvTgb3WIu2jXt+RBb0xlASQ=; b=bfYuKPewSBf5oGMhSslkYPidlZOBDl5Ynate8GLZejUKR5WqjKnNH7+wX9kc1+VTl0 VKIILBWsUeJo/j3dWXHujBqrbXUye1/WsmlyYBWMgFsLskN61UWiol8fwetnpw9W3n4f JO+OS6JeGshtyHFa1qTRlXy2JYxd91X+Ks5TvIsej+Y4U7P+xBZzUdej+6Ys49DJ/wCz MmM1t9tyv2DesI7w/f7feOUwKR4zyRhiyBw0h0KXdEaUrMSwyvuJmf0BoTfdHGEVeac4 GvpkWCQLRXgfvPo2VLYxzXAjM4LPOOJaAVFXq7WLVGQCMRhgge22gIRC3wcTGgWpqVoe HUqQ== X-Gm-Message-State: AOAM533JXdNsdCDZMhklzNOlC1il6XnblniGmiRXZqkW031Lgp+fRdCt 3ouigiyxCGOTp6iI13gX1MbiFQ== X-Google-Smtp-Source: ABdhPJxsU39aMKJTYEdpIYWuk95pmYltvZ1+5U+rjQtV/hGfMNChjMIVWlwgXwnzaSYjbMJbH9LKrg== X-Received: by 2002:a7b:c76b:: with SMTP id x11mr5445941wmk.83.1634808446897; Thu, 21 Oct 2021 02:27:26 -0700 (PDT) Received: from blmsp.lan ([2a02:2454:3e6:c900:5142:5fbb:5821:5dc3]) by smtp.gmail.com with ESMTPSA id d3sm4538468wrb.36.2021.10.21.02.27.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Oct 2021 02:27:26 -0700 (PDT) From: Markus Schneider-Pargmann To: Chun-Kuang Hu , Philipp Zabel , Rob Herring , Vinod Koul Cc: Sam Ravnborg , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Markus Schneider-Pargmann Subject: [PATCH v5 2/7] dt-bindings: mediatek,dp: Add Display Port binding Date: Thu, 21 Oct 2021 11:27:02 +0200 Message-Id: <20211021092707.3562523-3-msp@baylibre.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211021092707.3562523-1-msp@baylibre.com> References: <20211021092707.3562523-1-msp@baylibre.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This controller is present on several mediatek hardware. Currently mt8195 and mt8395 have this controller without a functional difference, so only one compatible field is added. The controller can have two forms, as a normal display port and as an embedded display port. Signed-off-by: Markus Schneider-Pargmann Reviewed-by: Rob Herring --- Notes: Changes v4 -> v5: - Removed "status" in the example - Remove edp_tx compatible. - Rename dp_tx compatible to dp-tx. .../display/mediatek/mediatek,dp.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml new file mode 100644 index 000000000000..068b11d766e2 --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Display Port Controller + +maintainers: + - CK Hu + - Jitao shi + +description: | + Device tree bindings for the Mediatek (embedded) Display Port controller + present on some Mediatek SoCs. + +properties: + compatible: + enum: + - mediatek,mt8195-dp-tx + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: faxi clock + + clock-names: + items: + - const: faxi + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input endpoint of the controller, usually dp_intf + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output endpoint of the controller + +required: + - compatible + - reg + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include + #include + edp_tx: edp_tx@1c500000 { + compatible = "mediatek,mt8195-dp-tx"; + reg = <0 0x1c500000 0 0x8000>; + interrupts = ; + power-domains = <&spm MT8195_POWER_DOMAIN_EPD_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&edp_pin>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + edp_in: endpoint { + remote-endpoint = <&dp_intf0_out>; + }; + }; + port@1 { + reg = <1>; + edp_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + };