From patchwork Mon Sep 11 20:11:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin S Cooper Jr X-Patchwork-Id: 812599 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="mb8DZZzd"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xrfJS3jBwz9s8J for ; Tue, 12 Sep 2017 06:13:44 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751047AbdIKUNm (ORCPT ); Mon, 11 Sep 2017 16:13:42 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:31658 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750987AbdIKUNl (ORCPT ); Mon, 11 Sep 2017 16:13:41 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8BKCCT0014519; Mon, 11 Sep 2017 15:12:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1505160732; bh=Toph8fY1i1cD47RQg5U3xfaWAveHIEfu+Ca0+19wQ7o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mb8DZZzdFSZQCEXubBZmp+Lia/iBaUggTcd3tY4T09DAJnny4tmm2ETtF7oTR+A2j XcArEULuxQ1GN/ITKTVfg/Hu4AakU6VyKhybHf1p82Yf0rDWx3AfNJhaIKMwnX3Ab/ GgofK0Hcw7iqMTve76KpR10RTusZLUmL+WIeJRFk= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8BKC7Z9003605; Mon, 11 Sep 2017 15:12:07 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Mon, 11 Sep 2017 15:12:07 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Mon, 11 Sep 2017 15:12:07 -0500 Received: from dbdmail01.india.ti.com (dbdmail01.india.ti.com [172.24.162.206]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8BKC6Va017622; Mon, 11 Sep 2017 15:12:06 -0500 Received: from uda0273011.dhcp.ti.com (uda0273011.dhcp.ti.com [128.247.59.135]) by dbdmail01.india.ti.com (8.14.3/8.14.3/SuSE Linux 0.8) with ESMTP id v8BKBvrf005179; Tue, 12 Sep 2017 01:42:02 +0530 From: Franklin S Cooper Jr To: , , , , , , , , , CC: Franklin S Cooper Jr Subject: [PATCH v4 1/2] i2c: davinci: Add PM Runtime Support Date: Mon, 11 Sep 2017 15:11:44 -0500 Message-ID: <20170911201145.31257-2-fcooper@ti.com> X-Mailer: git-send-email 2.9.4.dirty In-Reply-To: <20170911201145.31257-1-fcooper@ti.com> References: <20170911201145.31257-1-fcooper@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org 66AK2G has I2C instances that are not apart of the ALWAYS_ON power domain unlike other Keystone 2 SoCs and OMAPL138. Therefore, pm_runtime is required to insure the power domain used by the specific I2C instance is properly turned on along with its functional clock. Signed-off-by: Franklin S Cooper Jr --- Version 4 changes: Fix wording on error message Fix additional error path Version 3 changes: Remove several statements that set clk to NULL Fix error path drivers/i2c/busses/i2c-davinci.c | 67 +++++++++++++++++++++++++++++++++------- 1 file changed, 55 insertions(+), 12 deletions(-) diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index b8c4353..a2d9f7c 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -36,6 +36,7 @@ #include #include #include +#include /* ----- global defines ----------------------------------------------- */ @@ -122,6 +123,9 @@ /* set the SDA GPIO low */ #define DAVINCI_I2C_DCLR_PDCLR1 BIT(1) +/* timeout for pm runtime autosuspend */ +#define DAVINCI_I2C_PM_TIMEOUT 1000 /* ms */ + struct davinci_i2c_dev { struct device *dev; void __iomem *base; @@ -541,10 +545,17 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); + ret = pm_runtime_get_sync(dev->dev); + if (ret < 0) { + dev_err(dev->dev, "Failed to runtime_get device: %d\n", ret); + pm_runtime_put_noidle(dev->dev); + return ret; + } + ret = i2c_davinci_wait_bus_not_busy(dev); if (ret < 0) { dev_warn(dev->dev, "timeout waiting for bus ready\n"); - return ret; + goto out; } for (i = 0; i < num; i++) { @@ -552,14 +563,19 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) dev_dbg(dev->dev, "%s [%d/%d] ret: %d\n", __func__, i + 1, num, ret); if (ret < 0) - return ret; + goto out; } + ret = num; #ifdef CONFIG_CPU_FREQ complete(&dev->xfr_complete); #endif - return num; +out: + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); + + return ret; } static u32 i2c_davinci_func(struct i2c_adapter *adap) @@ -599,6 +615,9 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id) int count = 0; u16 w; + if (pm_runtime_suspended(dev->dev)) + return IRQ_NONE; + while ((stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG))) { dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat); if (count++ == 100) { @@ -802,13 +821,24 @@ static int davinci_i2c_probe(struct platform_device *pdev) dev->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(dev->clk)) return PTR_ERR(dev->clk); - clk_prepare_enable(dev->clk); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); dev->base = devm_ioremap_resource(&pdev->dev, mem); if (IS_ERR(dev->base)) { - r = PTR_ERR(dev->base); - goto err_unuse_clocks; + return PTR_ERR(dev->base); + } + + pm_runtime_set_autosuspend_delay(dev->dev, + DAVINCI_I2C_PM_TIMEOUT); + pm_runtime_use_autosuspend(dev->dev); + + pm_runtime_enable(dev->dev); + + r = pm_runtime_get_sync(dev->dev); + if (r < 0) { + dev_err(dev->dev, "failed to runtime_get device: %d\n", r); + pm_runtime_put_noidle(dev->dev); + return r; } i2c_davinci_init(dev); @@ -849,27 +879,40 @@ static int davinci_i2c_probe(struct platform_device *pdev) if (r) goto err_unuse_clocks; + pm_runtime_mark_last_busy(dev->dev); + pm_runtime_put_autosuspend(dev->dev); + return 0; err_unuse_clocks: - clk_disable_unprepare(dev->clk); - dev->clk = NULL; + pm_runtime_dont_use_autosuspend(dev->dev); + pm_runtime_put_sync(dev->dev); + pm_runtime_disable(dev->dev); + return r; } static int davinci_i2c_remove(struct platform_device *pdev) { struct davinci_i2c_dev *dev = platform_get_drvdata(pdev); + int ret; i2c_davinci_cpufreq_deregister(dev); i2c_del_adapter(&dev->adapter); - clk_disable_unprepare(dev->clk); - dev->clk = NULL; + ret = pm_runtime_get_sync(&pdev->dev); + if (ret < 0) { + pm_runtime_put_noidle(&pdev->dev); + return ret; + } davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0); + pm_runtime_dont_use_autosuspend(dev->dev); + pm_runtime_put_sync(dev->dev); + pm_runtime_disable(dev->dev); + return 0; } @@ -880,7 +923,6 @@ static int davinci_i2c_suspend(struct device *dev) /* put I2C into reset */ davinci_i2c_reset_ctrl(i2c_dev, 0); - clk_disable_unprepare(i2c_dev->clk); return 0; } @@ -889,7 +931,6 @@ static int davinci_i2c_resume(struct device *dev) { struct davinci_i2c_dev *i2c_dev = dev_get_drvdata(dev); - clk_prepare_enable(i2c_dev->clk); /* take I2C out of reset */ davinci_i2c_reset_ctrl(i2c_dev, 1); @@ -899,6 +940,8 @@ static int davinci_i2c_resume(struct device *dev) static const struct dev_pm_ops davinci_i2c_pm = { .suspend = davinci_i2c_suspend, .resume = davinci_i2c_resume, + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) }; #define davinci_i2c_pm_ops (&davinci_i2c_pm) From patchwork Mon Sep 11 20:11:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin S Cooper Jr X-Patchwork-Id: 812597 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="yXrKMxAK"; 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Mon, 11 Sep 2017 15:12:11 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Mon, 11 Sep 2017 15:12:11 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Mon, 11 Sep 2017 15:12:11 -0500 Received: from dbdmail01.india.ti.com (dbdmail01.india.ti.com [172.24.162.206]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8BKC96M032350; Mon, 11 Sep 2017 15:12:10 -0500 Received: from uda0273011.dhcp.ti.com (uda0273011.dhcp.ti.com [128.247.59.135]) by dbdmail01.india.ti.com (8.14.3/8.14.3/SuSE Linux 0.8) with ESMTP id v8BKBvrg005179; Tue, 12 Sep 2017 01:42:06 +0530 From: Franklin S Cooper Jr To: , , , , , , , , , CC: Franklin S Cooper Jr Subject: [PATCH v4 2/2] dt-bindings: i2c: i2c-davinci: Update binding for 66AK2Gx pwr dm property Date: Mon, 11 Sep 2017 15:11:45 -0500 Message-ID: <20170911201145.31257-3-fcooper@ti.com> X-Mailer: git-send-email 2.9.4.dirty In-Reply-To: <20170911201145.31257-1-fcooper@ti.com> References: <20170911201145.31257-1-fcooper@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Add pm-domains property which is required for 66AK2Gx. Also document 66AK2G unique clocks property usage. Signed-off-by: Franklin S Cooper Jr Acked-by: Rob Herring Acked-by: Sekhar Nori --- Documentation/devicetree/bindings/i2c/i2c-davinci.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-davinci.txt b/Documentation/devicetree/bindings/i2c/i2c-davinci.txt index 5b123e0..64e6e65 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-davinci.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-davinci.txt @@ -6,6 +6,18 @@ davinci/keystone i2c interface contains. Required properties: - compatible: "ti,davinci-i2c" or "ti,keystone-i2c"; - reg : Offset and length of the register set for the device +- clocks: I2C functional clock phandle. + For 66AK2G this property should be set per binding, + Documentation/devicetree/bindings/clock/ti,sci-clk.txt + +SoC-specific Required Properties: + +The following are mandatory properties for Keystone 2 66AK2G SoCs only: + +- power-domains: Should contain a phandle to a PM domain provider node + and an args specifier containing the I2C device id + value. This property is as per the binding, + Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt Recommended properties : - interrupts : standard interrupt property.