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[104.194.74.249]) by smtp.gmail.com with ESMTPSA id l65sm16973146pgl.32.2021.07.20.23.19.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Jul 2021 23:19:18 -0700 (PDT) From: Artem Lapkin X-Google-Original-From: Artem Lapkin To: narmstrong@baylibre.com, joe.hershberger@ni.com, rfried.dev@gmail.com Cc: u-boot@lists.denx.de, u-boot-amlogic@groups.io, khilman@baylibre.com, christianshewitt@gmail.com, martin.blumenstingl@googlemail.com, art@khadas.com, nick@khadas.com, gouwa@khadas.com Subject: [PATCH] net: designware: improve ethernet DMA reset Date: Wed, 21 Jul 2021 14:19:10 +0800 Message-Id: <20210721061910.776977-1-art@khadas.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Problem: uboot ethernet always have "DMA reset timeout" after linux usage, detected on VIM2 VIM3 VIM3L amlogic devices, mainline uboot and mainline linux > 5.1? . How-to reproduce: 1) Poweron device => ethernet uboot work fine. 2) Linux start and ethernet interface up and same works. 3) Reboot to uboot again and we cant use ethernet anymore. uboot always have "DMA reset timeout" inside designware_eth_init() only poweroff/poweron cycle can solve this problem. Solution: add phy_reset() into waiting DMA reset cycle, this insertion doesn't break normal behaviour (maybe). Note: same need explore real problem why its happens! because this patch may be just hack. Signed-off-by: Artem Lapkin --- drivers/net/designware.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 5d92257e..6485c46d 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -371,6 +371,7 @@ int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr) struct eth_dma_regs *dma_p = priv->dma_regs_p; unsigned int start; int ret; + int phy_reset_force = 0; writel(readl(&dma_p->busmode) | DMAMAC_SRST, &dma_p->busmode); @@ -389,6 +390,9 @@ int designware_eth_init(struct dw_eth_dev *priv, u8 *enetaddr) printf("DMA reset timeout\n"); return -ETIMEDOUT; } + // forced phy reset after 0.2s can help with DMAMAC_SRST + if (phy_reset_force++ == 2) + phy_reset(priv->phydev); mdelay(100); };