From patchwork Tue Jul 20 04:33:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1507374 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=UKJ36iDd; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GTQp52697z9sWS for ; Tue, 20 Jul 2021 14:33:47 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id ED9653861972 for ; Tue, 20 Jul 2021 04:33:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org ED9653861972 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1626755625; bh=4q0Fq2KEKqBzaoCqbKXDAGe94fE50jICH1XE0SBnnms=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=UKJ36iDdxd0S/x5HtKMXnqo4TRC7lCLrYfgWHZ/FUsmcAIMZI4c+2qIm0djNL2lmV P7qg4GDwIfA2TfJ8PPn2wHT+JugmHkrMJlV69cq4qOOWjtSTNhUJp3a7ERNatEK2F0 +tRvUH1BmjSYa5jQnzxyDrbNy0jffApfc8hjYBKU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qk1-x72a.google.com (mail-qk1-x72a.google.com [IPv6:2607:f8b0:4864:20::72a]) by sourceware.org (Postfix) with ESMTPS id A88EC385840E for ; Tue, 20 Jul 2021 04:33:21 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A88EC385840E Received: by mail-qk1-x72a.google.com with SMTP id s193so18974731qke.4 for ; Mon, 19 Jul 2021 21:33:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=4q0Fq2KEKqBzaoCqbKXDAGe94fE50jICH1XE0SBnnms=; b=B5v9F9RNZzWBaMrCPZuen1K1FT4yMIXE6tWBGyA57EHu3vzla5VMRRzAAJczggRVcp 0H3pqLdbqbugixn8EkWp2xsWCEluDedf3Gq4q7F3UYGAV3jKD+U2a0mipF/d6lK0Xm+E RGT/mypF1AR/IyLYgWIHXURWrJaP5pBVEDDsisNqr6OxxPSR6HE1ldorAIqfjwBk+Ytb CUNCQaYD4S+iZBbkd0x5do7vmGyWxZ3v3orvcXv6iSOzLeDmBFtEDlwvR8wSXWL0a4Gr m6Zs3u7QsMU2RcSBLrMIXXCbZYRNcLTRey2cxwj9yn2selyTruB/ZGx0ZO6wA2iHZOon A94A== X-Gm-Message-State: AOAM5324yfRxlZ39896C1KVA/YVTB+O5Q6rDLMyCIxsgdZiDtTTsbT0n JAfwLrNZ+oj3igHtXLYmYYMWyguvkVaxNXeMirPxL7BgW2ZSJQ== X-Google-Smtp-Source: ABdhPJx16XDQeecr5TQV9yVcXbk9udNiYAzHLRcawTx6Fvaqbl3DKTp2pWQf8+RXy6zFpdDHVd8kF4u2YYXlWMhAoe0= X-Received: by 2002:a05:620a:139c:: with SMTP id k28mr4684605qki.292.1626755600695; Mon, 19 Jul 2021 21:33:20 -0700 (PDT) MIME-Version: 1.0 Date: Tue, 20 Jul 2021 06:33:09 +0200 Message-ID: Subject: [PATCH] i386: Remove atomic_storedi_fpu and atomic_loaddi_fpu peepholes [PR100182] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-9.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" These patterns result in non-atomic sequence. 2021-07-21 Uroš Bizjak gcc/ PR target/100182 * config/i386/sync.md (define_peephole2 atomic_storedi_fpu): Remove. (define_peephole2 atomic_loaddi_fpu): Ditto. gcc/testsuite/ PR target/100182 * gcc.target/i386/pr71245-1.c: Remove. * gcc.target/i386/pr71245-2.c: Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master, will be pushed to all release branches. Uros. diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index 7913b918796..05a835256bb 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -219,82 +219,6 @@ DONE; }) -(define_peephole2 - [(set (match_operand:DF 0 "fp_register_operand") - (unspec:DF [(match_operand:DI 1 "memory_operand")] - UNSPEC_FILD_ATOMIC)) - (set (match_operand:DI 2 "memory_operand") - (unspec:DI [(match_dup 0)] - UNSPEC_FIST_ATOMIC)) - (set (match_operand:DF 3 "sse_reg_operand") - (match_operand:DF 4 "memory_operand"))] - "!TARGET_64BIT - && peep2_reg_dead_p (2, operands[0]) - && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))" - [(set (match_dup 3) (match_dup 5)) - (set (match_dup 4) (match_dup 3))] - "operands[5] = gen_lowpart (DFmode, operands[1]);") - -(define_peephole2 - [(set (match_operand:DF 0 "fp_register_operand") - (unspec:DF [(match_operand:DI 1 "memory_operand")] - UNSPEC_FILD_ATOMIC)) - (set (match_operand:DI 2 "memory_operand") - (unspec:DI [(match_dup 0)] - UNSPEC_FIST_ATOMIC)) - (set (mem:BLK (scratch:SI)) - (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE)) - (set (match_operand:DF 3 "sse_reg_operand") - (match_operand:DF 4 "memory_operand"))] - "!TARGET_64BIT - && peep2_reg_dead_p (2, operands[0]) - && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))" - [(const_int 0)] -{ - emit_move_insn (operands[3], gen_lowpart (DFmode, operands[1])); - emit_move_insn (operands[4], operands[3]); - emit_insn (gen_memory_blockage ()); - DONE; -}) - -(define_peephole2 - [(set (match_operand:DF 0 "sse_reg_operand") - (unspec:DF [(match_operand:DI 1 "memory_operand")] - UNSPEC_LDX_ATOMIC)) - (set (match_operand:DI 2 "memory_operand") - (unspec:DI [(match_dup 0)] - UNSPEC_STX_ATOMIC)) - (set (match_operand:DF 3 "sse_reg_operand") - (match_operand:DF 4 "memory_operand"))] - "!TARGET_64BIT - && peep2_reg_dead_p (2, operands[0]) - && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))" - [(set (match_dup 3) (match_dup 5)) - (set (match_dup 4) (match_dup 3))] - "operands[5] = gen_lowpart (DFmode, operands[1]);") - -(define_peephole2 - [(set (match_operand:DF 0 "sse_reg_operand") - (unspec:DF [(match_operand:DI 1 "memory_operand")] - UNSPEC_LDX_ATOMIC)) - (set (match_operand:DI 2 "memory_operand") - (unspec:DI [(match_dup 0)] - UNSPEC_STX_ATOMIC)) - (set (mem:BLK (scratch:SI)) - (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE)) - (set (match_operand:DF 3 "sse_reg_operand") - (match_operand:DF 4 "memory_operand"))] - "!TARGET_64BIT - && peep2_reg_dead_p (2, operands[0]) - && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))" - [(const_int 0)] -{ - emit_move_insn (operands[3], gen_lowpart (DFmode, operands[1])); - emit_move_insn (operands[4], operands[3]); - emit_insn (gen_memory_blockage ()); - DONE; -}) - (define_expand "atomic_store" [(set (match_operand:ATOMIC 0 "memory_operand") (unspec:ATOMIC [(match_operand:ATOMIC 1 "nonimmediate_operand") @@ -384,82 +308,6 @@ DONE; }) -(define_peephole2 - [(set (match_operand:DF 0 "memory_operand") - (match_operand:DF 1 "any_fp_register_operand")) - (set (match_operand:DF 2 "fp_register_operand") - (unspec:DF [(match_operand:DI 3 "memory_operand")] - UNSPEC_FILD_ATOMIC)) - (set (match_operand:DI 4 "memory_operand") - (unspec:DI [(match_dup 2)] - UNSPEC_FIST_ATOMIC))] - "!TARGET_64BIT - && peep2_reg_dead_p (3, operands[2]) - && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))" - [(set (match_dup 0) (match_dup 1)) - (set (match_dup 5) (match_dup 1))] - "operands[5] = gen_lowpart (DFmode, operands[4]);") - -(define_peephole2 - [(set (match_operand:DF 0 "memory_operand") - (match_operand:DF 1 "any_fp_register_operand")) - (set (mem:BLK (scratch:SI)) - (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE)) - (set (match_operand:DF 2 "fp_register_operand") - (unspec:DF [(match_operand:DI 3 "memory_operand")] - UNSPEC_FILD_ATOMIC)) - (set (match_operand:DI 4 "memory_operand") - (unspec:DI [(match_dup 2)] - UNSPEC_FIST_ATOMIC))] - "!TARGET_64BIT - && peep2_reg_dead_p (4, operands[2]) - && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))" - [(const_int 0)] -{ - emit_move_insn (operands[0], operands[1]); - emit_insn (gen_memory_blockage ()); - emit_move_insn (gen_lowpart (DFmode, operands[4]), operands[1]); - DONE; -}) - -(define_peephole2 - [(set (match_operand:DF 0 "memory_operand") - (match_operand:DF 1 "any_fp_register_operand")) - (set (match_operand:DF 2 "sse_reg_operand") - (unspec:DF [(match_operand:DI 3 "memory_operand")] - UNSPEC_LDX_ATOMIC)) - (set (match_operand:DI 4 "memory_operand") - (unspec:DI [(match_dup 2)] - UNSPEC_STX_ATOMIC))] - "!TARGET_64BIT - && peep2_reg_dead_p (3, operands[2]) - && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))" - [(set (match_dup 0) (match_dup 1)) - (set (match_dup 5) (match_dup 1))] - "operands[5] = gen_lowpart (DFmode, operands[4]);") - -(define_peephole2 - [(set (match_operand:DF 0 "memory_operand") - (match_operand:DF 1 "any_fp_register_operand")) - (set (mem:BLK (scratch:SI)) - (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE)) - (set (match_operand:DF 2 "sse_reg_operand") - (unspec:DF [(match_operand:DI 3 "memory_operand")] - UNSPEC_LDX_ATOMIC)) - (set (match_operand:DI 4 "memory_operand") - (unspec:DI [(match_dup 2)] - UNSPEC_STX_ATOMIC))] - "!TARGET_64BIT - && peep2_reg_dead_p (4, operands[2]) - && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))" - [(const_int 0)] -{ - emit_move_insn (operands[0], operands[1]); - emit_insn (gen_memory_blockage ()); - emit_move_insn (gen_lowpart (DFmode, operands[4]), operands[1]); - DONE; -}) - ;; ??? You'd think that we'd be able to perform this via FLOAT + FIX_TRUNC ;; operations. But the fix_trunc patterns want way more setup than we want ;; to provide. Note that the scratch is DFmode instead of XFmode in order diff --git a/gcc/testsuite/gcc.target/i386/pr71245-1.c b/gcc/testsuite/gcc.target/i386/pr71245-1.c deleted file mode 100644 index 02c0dcb80b6..00000000000 --- a/gcc/testsuite/gcc.target/i386/pr71245-1.c +++ /dev/null @@ -1,22 +0,0 @@ -/* PR target/71245 */ -/* { dg-do compile { target ia32 } } */ -/* { dg-options "-O2 -march=pentium -mno-sse -mfpmath=387" } */ - -typedef union -{ - unsigned long long ll; - double d; -} u_t; - -u_t d = { .d = 5.0 }; - -void foo_d (void) -{ - u_t tmp; - - tmp.ll = __atomic_load_n (&d.ll, __ATOMIC_SEQ_CST); - tmp.d += 1.0; - __atomic_store_n (&d.ll, tmp.ll, __ATOMIC_SEQ_CST); -} - -/* { dg-final { scan-assembler-not "(fistp|fild)" { xfail *-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr71245-2.c b/gcc/testsuite/gcc.target/i386/pr71245-2.c deleted file mode 100644 index bf37a8cbb71..00000000000 --- a/gcc/testsuite/gcc.target/i386/pr71245-2.c +++ /dev/null @@ -1,22 +0,0 @@ -/* PR target/71245 */ -/* { dg-do compile { target ia32 } } */ -/* { dg-options "-O2 -march=pentium -msse -mno-sse2 -mfpmath=387" } */ - -typedef union -{ - unsigned long long ll; - double d; -} u_t; - -u_t d = { .d = 5.0 }; - -void foo_d (void) -{ - u_t tmp; - - tmp.ll = __atomic_load_n (&d.ll, __ATOMIC_SEQ_CST); - tmp.d += 1.0; - __atomic_store_n (&d.ll, tmp.ll, __ATOMIC_SEQ_CST); -} - -/* { dg-final { scan-assembler-not "movlps" { xfail *-*-* } } } */