From patchwork Sat Jul 17 17:30:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2 via Gcc-patches" X-Patchwork-Id: 1506477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=FhN9BA++; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GRwvX5ghfz9sWS for ; Sun, 18 Jul 2021 04:03:20 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E07123839C65 for ; Sat, 17 Jul 2021 18:03:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E07123839C65 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1626544997; bh=sWqSX0cwqmvMFHMLMpfeWWn96DmbfCzhz7ofxmuQ6p0=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=FhN9BA++mNHijBmqCdaP4W48dTuNxG5+061LIlJpgMH3bcy/5evtis2p7U6qKH4N6 Upzj6G+FGOE1SilDh6pkIxlIjw7E07YMm4puXFXeRX/Gu0jrJphDybCn9Vsh2kMmRm SUJFs2KkUR5jdaIfsF/0ZRTs4adVWZtR1FKBHXC4= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by sourceware.org (Postfix) with ESMTPS id 47CEF383980B for ; Sat, 17 Jul 2021 18:02:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 47CEF383980B Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 16HI0rG7009556 for ; Sat, 17 Jul 2021 11:02:01 -0700 Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com with ESMTP id 39uxqr8n1s-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 17 Jul 2021 11:02:00 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sat, 17 Jul 2021 11:01:59 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Sat, 17 Jul 2021 11:01:59 -0700 Received: from linux.wrightpinski.org.com (unknown [10.69.242.197]) by maili.marvell.com (Postfix) with ESMTP id CD1F45B6AC5; Sat, 17 Jul 2021 10:30:56 -0700 (PDT) To: Subject: [PATCH] [AARCH64] Fix PR 101205: csinv does not have an zero_extend version Date: Sat, 17 Jul 2021 10:30:53 -0700 Message-ID: <1626543053-32054-1-git-send-email-apinski@marvell.com> X-Mailer: git-send-email 1.8.3.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: RAq30WpTVK0lsmD5dkYjeALOQpVxCdEt X-Proofpoint-GUID: RAq30WpTVK0lsmD5dkYjeALOQpVxCdEt X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-07-17_07:2021-07-16, 2021-07-17 signatures=0 X-Spam-Status: No, score=-14.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: apinski--- via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: apinski@marvell.com Cc: Andrew Pinski Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" From: Andrew Pinski So the problem is even though there was a csneg with a zero_extend in the front, there was not one for csinv. This fixes it by extending that pattern. OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions. gcc/ChangeLog: PR target/101205 * config/aarch64/aarch64.md (csneg3_uxtw_insn): Rename to ... (*cs3_uxtw_insn4): and extend to NEG_NOT. gcc/testsuite/ChangeLog: PR target/101205 * gcc.target/aarch64/csinv-neg-1.c: New test. --- gcc/config/aarch64/aarch64.md | 6 +- .../gcc.target/aarch64/csinv-neg-1.c | 112 ++++++++++++++++++ 2 files changed, 115 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index f12a0bebd3d..8cd259fca9c 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4203,15 +4203,15 @@ (define_insn "*csinv3_insn" [(set_attr "type" "csel")] ) -(define_insn "csneg3_uxtw_insn" +(define_insn "*cs3_uxtw_insn4" [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (if_then_else:SI (match_operand 1 "aarch64_comparison_operation" "") - (neg:SI (match_operand:SI 2 "register_operand" "r")) + (NEG_NOT:SI (match_operand:SI 2 "register_operand" "r")) (match_operand:SI 3 "aarch64_reg_or_zero" "rZ"))))] "" - "csneg\\t%w0, %w3, %w2, %M1" + "cs\\t%w0, %w3, %w2, %M1" [(set_attr "type" "csel")] ) diff --git a/gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c b/gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c new file mode 100644 index 00000000000..e528883198d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/csinv-neg-1.c @@ -0,0 +1,112 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +/* +** inv1: +** cmp w0, 0 +** csinv w0, w1, w2, ne +** ret +*/ +unsigned long long +inv1(unsigned a, unsigned b, unsigned c) +{ + unsigned t = a ? b : ~c; + return t; +} + +/* +** inv1_local: +** cmp w0, 0 +** csinv w0, w1, w2, ne +** ret +*/ +unsigned long long +inv1_local(unsigned a, unsigned b, unsigned c) +{ + unsigned d = ~c; + unsigned t = a ? b : d; + return t; +} + +/* +** inv_zero1: +** cmp w0, 0 +** csinv w0, wzr, w1, ne +** ret +*/ +unsigned long long +inv_zero1(unsigned a, unsigned b) +{ + unsigned t = a ? 0 : ~b; + return t; +} + +/* +** inv_zero2: +** cmp w0, 0 +** csinv w0, wzr, w1, eq +** ret +*/ +unsigned long long +inv_zero2(unsigned a, unsigned b) +{ + unsigned t = a ? ~b : 0; + return t; +} + + +/* +** inv2: +** cmp w0, 0 +** csinv w0, w2, w1, eq +** ret +*/ +unsigned long long +inv2(unsigned a, unsigned b, unsigned c) +{ + unsigned t = a ? ~b : c; + return t; +} + +/* +** inv2_local: +** cmp w0, 0 +** csinv w0, w2, w1, eq +** ret +*/ +unsigned long long +inv2_local(unsigned a, unsigned b, unsigned c) +{ + unsigned d = ~b; + unsigned t = a ? d : c; + return t; +} + +/* +** neg1: +** cmp w0, 0 +** csneg w0, w1, w2, ne +** ret +*/ +unsigned long long +neg1(unsigned a, unsigned b, unsigned c) +{ + unsigned t = a ? b : -c; + return t; +} + + +/* +** neg2: +** cmp w0, 0 +** csneg w0, w2, w1, eq +** ret +*/ +unsigned long long +neg2(unsigned a, unsigned b, unsigned c) +{ + unsigned t = a ? -b : c; + return t; +} + +/* { dg-final { check-function-bodies "**" "" "" } } */