From patchwork Wed Jan 24 00:44:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865110 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR60w5pMdz9s71 for ; Wed, 24 Jan 2018 11:46:08 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 71E3DC2219B; Wed, 24 Jan 2018 00:45:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 27E9BC2214C; Wed, 24 Jan 2018 00:45:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 94DC6C21EB4; Wed, 24 Jan 2018 00:45:14 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id 45F00C21C93 for ; Wed, 24 Jan 2018 00:45:14 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 1D14B2064F; Wed, 24 Jan 2018 01:45:14 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id 86D232072F; Wed, 24 Jan 2018 01:45:03 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:47 +0100 Message-Id: <20180124004454.5759-2-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/8] mtd: nand: sunxi: Fix strength minimum value X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When no requirement in Device Tree is given about the ECC strength and step size, the engine should fallback on the minimal working case for this engine (16b/1024B) instead of the NAND chip requirement which might be simply unreachable. Signed-off-by: Miquel Raynal --- drivers/mtd/nand/sunxi_nand.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/sunxi_nand.c b/drivers/mtd/nand/sunxi_nand.c index 8bc3828854..e8e7ad8ac5 100644 --- a/drivers/mtd/nand/sunxi_nand.c +++ b/drivers/mtd/nand/sunxi_nand.c @@ -1417,6 +1417,7 @@ static int sunxi_nand_hw_common_ecc_ctrl_init(struct mtd_info *mtd, goto err; } + ecc->strength = strengths[i]; data->mode = i; /* HW ECC always request ECC bytes for 1024 bytes blocks */ From patchwork Wed Jan 24 00:44:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865111 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR61N6q2Vz9s71 for ; Wed, 24 Jan 2018 11:46:32 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 3DF14C22178; Wed, 24 Jan 2018 00:45:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 143FCC2216F; Wed, 24 Jan 2018 00:45:20 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E8A91C22174; Wed, 24 Jan 2018 00:45:15 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id D1FC1C21C93 for ; Wed, 24 Jan 2018 00:45:14 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id AFCFB2072F; Wed, 24 Jan 2018 01:45:14 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id 1941E20C12; Wed, 24 Jan 2018 01:45:04 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:48 +0100 Message-Id: <20180124004454.5759-3-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 2/8] spl: nand: sunxi: Fix second case of modulo by zero error X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" In the nand_read_buffer() step, the seed is calculated by doing a modulo by conf->nseeds which is always zero when not using the randomizer (most of SLC NANDs). This situation turns out to lead to a run time freeze. Derive this seed only when the randomizer is enabled (and conf->nseeds logically not zero). Signed-off-by: Miquel Raynal --- drivers/mtd/nand/sunxi_nand_spl.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c index eed4472bdc..06695fc15f 100644 --- a/drivers/mtd/nand/sunxi_nand_spl.c +++ b/drivers/mtd/nand/sunxi_nand_spl.c @@ -475,11 +475,12 @@ static int nand_detect_config(struct nfc_config *conf, u32 offs, void *dest) static int nand_read_buffer(struct nfc_config *conf, uint32_t offs, unsigned int size, void *dest) { - int first_seed, page, ret; + int first_seed = 0, page, ret; size = ALIGN(size, conf->page_size); page = offs / conf->page_size; - first_seed = page % conf->nseeds; + if (conf->randomize) + first_seed = page % conf->nseeds; for (; size; size -= conf->page_size) { if (nand_load_page(conf, offs)) From patchwork Wed Jan 24 00:44:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865116 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR65r3xYyz9s71 for ; Wed, 24 Jan 2018 11:50:24 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 11387C22199; Wed, 24 Jan 2018 00:46:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 2395DC221A4; Wed, 24 Jan 2018 00:45:32 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9405DC221AE; Wed, 24 Jan 2018 00:45:19 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id 786BBC21C93 for ; Wed, 24 Jan 2018 00:45:15 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 518E220C12; Wed, 24 Jan 2018 01:45:15 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id A27B420C1A; Wed, 24 Jan 2018 01:45:04 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:49 +0100 Message-Id: <20180124004454.5759-4-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 3/8] sunxi: Allow SPL to be compiled for sun8i platforms X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add some clocks/PLL definitions and the dependency on MACH_SUN8I in Kconfig so the SPL could be compiled to boards using A33 SoCs. Signed-off-by: Miquel Raynal --- arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 6 ++++++ drivers/mtd/nand/Kconfig | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index d328df9597..d35aa479f7 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -192,6 +192,7 @@ struct sunxi_ccm_reg { #define ATB_DIV_1 0 #define ATB_DIV_2 1 #define ATB_DIV_4 2 +#define AHB_DIV_1 0 #define CPU_CLK_SRC_OSC24M 1 #define CPU_CLK_SRC_PLL1 2 @@ -317,6 +318,11 @@ struct sunxi_ccm_reg { #define AHB_GATE_OFFSET_LCD0 3 #endif +#define CCM_NAND_CTRL_M(x) ((x) - 1) +#define CCM_NAND_CTRL_N(x) ((x) << 16) +#define CCM_NAND_CTRL_PLL6 (0x1 << 24) +#define CCM_NAND_CTRL_ENABLE (0x1 << 31) + #define CCM_MMC_CTRL_M(x) ((x) - 1) #define CCM_MMC_CTRL_OCLK_DLY(x) ((x) << 8) #define CCM_MMC_CTRL_N(x) ((x) << 16) diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 85b26d6088..2f37a8014d 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -78,7 +78,7 @@ config NAND_PXA3XX config NAND_SUNXI bool "Support for NAND on Allwinner SoCs" - depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I + depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I select SYS_NAND_SELF_INIT select SYS_NAND_U_BOOT_LOCATIONS imply CMD_NAND From patchwork Wed Jan 24 00:44:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865112 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR63Z63Kxz9s82 for ; Wed, 24 Jan 2018 11:48:26 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 54672C2219B; Wed, 24 Jan 2018 00:46:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 92F4CC22184; Wed, 24 Jan 2018 00:45:47 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3157DC21EEB; Wed, 24 Jan 2018 00:45:26 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id F28B2C21F53 for ; Wed, 24 Jan 2018 00:45:22 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id D14A82064F; Wed, 24 Jan 2018 01:45:22 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id 43CDF20C1B; Wed, 24 Jan 2018 01:45:05 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:50 +0100 Message-Id: <20180124004454.5759-5-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 4/8] spl: nand: sunxi: Enhancements and cleaning X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Do some cleaning in sunxi NAND SPL driver like adding helpers and clearing flags at the right spot Signed-off-by: Miquel Raynal --- drivers/mtd/nand/sunxi_nand_spl.c | 64 +++++++++++++++++++++++++-------------- 1 file changed, 41 insertions(+), 23 deletions(-) diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c index 06695fc15f..2488d5cb51 100644 --- a/drivers/mtd/nand/sunxi_nand_spl.c +++ b/drivers/mtd/nand/sunxi_nand_spl.c @@ -55,8 +55,8 @@ #define NFC_ADDR_NUM_OFFSET 16 -#define NFC_SEND_ADR (1 << 19) #define NFC_ACCESS_DIR (1 << 20) +#define NFC_SEND_ADDR (1 << 19) #define NFC_DATA_TRANS (1 << 21) #define NFC_SEND_CMD1 (1 << 22) #define NFC_WAIT_FLAG (1 << 23) @@ -155,6 +155,30 @@ static inline int check_value_negated(int offset, int unexpected_bits, return check_value_inner(offset, unexpected_bits, timeout_us, 1); } +static int nand_wait_cmd_fifo_empty(void) +{ + if (!check_value_negated(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_FIFO_STAT, + DEFAULT_TIMEOUT_US)) { + printf("nand: timeout waiting for empty cmd FIFO\n"); + return -ETIMEDOUT; + } + + return 0; +} + +static int nand_wait_int(void) +{ + if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG, + DEFAULT_TIMEOUT_US)) { + printf("nand: timeout waiting for interruption\n"); + return -ETIMEDOUT; + } + + udelay(1); + + return 0; +} + void nand_init(void) { uint32_t val; @@ -172,22 +196,21 @@ void nand_init(void) } /* reset NAND */ + nand_wait_cmd_fifo_empty(); + writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); writel(NFC_SEND_CMD1 | NFC_WAIT_FLAG | NAND_CMD_RESET, SUNXI_NFC_BASE + NFC_CMD); - if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG, - DEFAULT_TIMEOUT_US)) { - printf("Error timeout waiting for nand reset\n"); - return; - } - writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); + nand_wait_int(); } static void nand_apply_config(const struct nfc_config *conf) { u32 val; + nand_wait_cmd_fifo_empty(); + val = readl(SUNXI_NFC_BASE + NFC_CTL); val &= ~NFC_CTL_PAGE_SIZE_MASK; writel(val | NFC_CTL_RAM_METHOD | NFC_CTL_PAGE_SIZE(conf->page_size), @@ -200,6 +223,8 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs) { int page = offs / conf->page_size; + nand_wait_cmd_fifo_empty(); + writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) | (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) | (NFC_CMD_READSTART << NFC_READ_CMD_OFFSET), @@ -208,38 +233,32 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs) writel((page >> 16) & 0xFF, SUNXI_NFC_BASE + NFC_ADDR_HIGH); writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | NFC_WAIT_FLAG | - ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADR, + ((conf->addr_cycles - 1) << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR, SUNXI_NFC_BASE + NFC_CMD); - if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG, - DEFAULT_TIMEOUT_US)) { - printf("Error while initializing dma interrupt\n"); - return -EIO; - } - - return 0; + return nand_wait_int(); } static int nand_reset_column(void) { + nand_wait_cmd_fifo_empty(); + writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) | (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) | (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET), SUNXI_NFC_BASE + NFC_RCMD_SET); + writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW); writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | - (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADR | NFC_CMD_RNDOUT, + (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | NFC_CMD_RNDOUT, SUNXI_NFC_BASE + NFC_CMD); - if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_CMD_INT_FLAG, - DEFAULT_TIMEOUT_US)) { - printf("Error while initializing dma interrupt\n"); - return -1; - } + return nand_wait_int(); - return 0; } +static const int ecc_bytes[] = {32, 46, 54, 60, 74, 88, 102, 110, 116}; + static int nand_read_page(const struct nfc_config *conf, u32 offs, void *dest, int len) { @@ -327,7 +346,6 @@ static int nand_read_page(const struct nfc_config *conf, u32 offs, static int nand_max_ecc_strength(struct nfc_config *conf) { - static const int ecc_bytes[] = { 32, 46, 54, 60, 74, 88, 102, 110, 116 }; int max_oobsize, max_ecc_bytes; int nsectors = conf->page_size / conf->ecc_size; int i; From patchwork Wed Jan 24 00:44:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865117 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR6662q11z9s71 for ; Wed, 24 Jan 2018 11:50:38 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id DB85FC221C6; Wed, 24 Jan 2018 00:46:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 90A7BC2214C; Wed, 24 Jan 2018 00:45:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 99B1EC22184; Wed, 24 Jan 2018 00:45:26 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id 04552C2219E for ; Wed, 24 Jan 2018 00:45:23 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id D6F8F2072F; Wed, 24 Jan 2018 01:45:22 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id D374620C29; Wed, 24 Jan 2018 01:45:05 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:51 +0100 Message-Id: <20180124004454.5759-6-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 5/8] spl: nand: sunxi: use PIO instead of DMA X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Because using DMA implementation is not generic and was not developped to work on SoCs like A33, migrate the SPL to use PIO. Signed-off-by: Miquel Raynal --- board/sunxi/board.c | 4 +- drivers/mtd/nand/sunxi_nand_spl.c | 167 +++++++++++++++++--------------------- 2 files changed, 79 insertions(+), 92 deletions(-) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 70e01437c4..512e2c17a6 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -266,11 +266,13 @@ static void nand_clock_setup(void) struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); + setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_NAND0)); + setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); #ifdef CONFIG_MACH_SUN9I setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA)); #else setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_DMA)); + setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_DMA)); #endif setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); } diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c index 2488d5cb51..5de6825994 100644 --- a/drivers/mtd/nand/sunxi_nand_spl.c +++ b/drivers/mtd/nand/sunxi_nand_spl.c @@ -10,6 +10,7 @@ #include #include #include +#include /* registers */ #define NFC_CTL 0x00000000 @@ -45,32 +46,22 @@ #define NFC_CTL_PAGE_SIZE_MASK (0xf << 8) #define NFC_CTL_PAGE_SIZE(a) ((fls(a) - 11) << 8) - #define NFC_ECC_EN (1 << 0) -#define NFC_ECC_PIPELINE (1 << 3) #define NFC_ECC_EXCEPTION (1 << 4) #define NFC_ECC_BLOCK_SIZE (1 << 5) #define NFC_ECC_RANDOM_EN (1 << 9) -#define NFC_ECC_RANDOM_DIRECTION (1 << 10) - #define NFC_ADDR_NUM_OFFSET 16 -#define NFC_ACCESS_DIR (1 << 20) #define NFC_SEND_ADDR (1 << 19) #define NFC_DATA_TRANS (1 << 21) #define NFC_SEND_CMD1 (1 << 22) #define NFC_WAIT_FLAG (1 << 23) #define NFC_SEND_CMD2 (1 << 24) -#define NFC_SEQ (1 << 25) -#define NFC_DATA_SWAP_METHOD (1 << 26) -#define NFC_ROW_AUTO_INC (1 << 27) -#define NFC_SEND_CMD3 (1 << 28) -#define NFC_SEND_CMD4 (1 << 29) #define NFC_RAW_CMD (0 << 30) -#define NFC_PAGE_CMD (2 << 30) +#define NFC_ECC_CMD (1 << 30) #define NFC_ST_CMD_INT_FLAG (1 << 1) -#define NFC_ST_DMA_INT_FLAG (1 << 2) +#define NFC_ST_CMD_FIFO_STAT (1 << 3) #define NFC_READ_CMD_OFFSET 0 #define NFC_RANDOM_READ_CMD0_OFFSET 8 @@ -80,22 +71,6 @@ #define NFC_CMD_RNDOUT 0x05 #define NFC_CMD_READSTART 0x30 -#define SUNXI_DMA_CFG_REG0 0x300 -#define SUNXI_DMA_SRC_START_ADDR_REG0 0x304 -#define SUNXI_DMA_DEST_START_ADDRR_REG0 0x308 -#define SUNXI_DMA_DDMA_BC_REG0 0x30C -#define SUNXI_DMA_DDMA_PARA_REG0 0x318 - -#define SUNXI_DMA_DDMA_CFG_REG_LOADING (1 << 31) -#define SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 (2 << 25) -#define SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM (1 << 16) -#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 (2 << 9) -#define SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO (1 << 5) -#define SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC (3 << 0) - -#define SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC (0x0F << 0) -#define SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE (0x7F << 8) - struct nfc_config { int page_size; int ecc_strength; @@ -254,7 +229,23 @@ static int nand_reset_column(void) SUNXI_NFC_BASE + NFC_CMD); return nand_wait_int(); +} +static int nand_change_column(u16 column) +{ + nand_wait_cmd_fifo_empty(); + + writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) | + (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) | + (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET), + SUNXI_NFC_BASE + NFC_RCMD_SET); + writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); + writel(column, SUNXI_NFC_BASE + NFC_ADDR_LOW); + writel(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | + (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | NFC_CMD_RNDOUT, + SUNXI_NFC_BASE + NFC_CMD); + + return nand_wait_int(); } static const int ecc_bytes[] = {32, 46, 54, 60, 74, 88, 102, 110, 116}; @@ -262,86 +253,80 @@ static const int ecc_bytes[] = {32, 46, 54, 60, 74, 88, 102, 110, 116}; static int nand_read_page(const struct nfc_config *conf, u32 offs, void *dest, int len) { - dma_addr_t dst = (dma_addr_t)dest; int nsectors = len / conf->ecc_size; u16 rand_seed = 0; - u32 val; - int page; - - page = offs / conf->page_size; + int oob_chunk_sz = ecc_bytes[conf->ecc_strength]; + int page = offs / conf->page_size; + u32 ecc_st; + int i; if (offs % conf->page_size || len % conf->ecc_size || len > conf->page_size || len < 0) return -EINVAL; - /* clear ecc status */ - writel(0, SUNXI_NFC_BASE + NFC_ECC_ST); - /* Choose correct seed if randomized */ if (conf->randomize) rand_seed = random_seed[page % conf->nseeds]; - writel((rand_seed << 16) | (conf->ecc_strength << 12) | - (conf->randomize ? NFC_ECC_RANDOM_EN : 0) | - (conf->ecc_size == 512 ? NFC_ECC_BLOCK_SIZE : 0) | - NFC_ECC_EN | NFC_ECC_PIPELINE | NFC_ECC_EXCEPTION, - SUNXI_NFC_BASE + NFC_ECC_CTL); - - flush_dcache_range(dst, ALIGN(dst + conf->ecc_size, ARCH_DMA_MINALIGN)); - - /* SUNXI_DMA */ - writel(0x0, SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0); /* clr dma cmd */ - /* read from REG_IO_DATA */ - writel(SUNXI_NFC_BASE + NFC_IO_DATA, - SUNXI_DMA_BASE + SUNXI_DMA_SRC_START_ADDR_REG0); - /* read to RAM */ - writel(dst, SUNXI_DMA_BASE + SUNXI_DMA_DEST_START_ADDRR_REG0); - writel(SUNXI_DMA_DDMA_PARA_REG_SRC_WAIT_CYC | - SUNXI_DMA_DDMA_PARA_REG_SRC_BLK_SIZE, - SUNXI_DMA_BASE + SUNXI_DMA_DDMA_PARA_REG0); - writel(len, SUNXI_DMA_BASE + SUNXI_DMA_DDMA_BC_REG0); - writel(SUNXI_DMA_DDMA_CFG_REG_LOADING | - SUNXI_DMA_DDMA_CFG_REG_DMA_DEST_DATA_WIDTH_32 | - SUNXI_DMA_DDMA_CFG_REG_DDMA_DST_DRQ_TYPE_DRAM | - SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_DATA_WIDTH_32 | - SUNXI_DMA_DDMA_CFG_REG_DMA_SRC_ADDR_MODE_IO | - SUNXI_DMA_DDMA_CFG_REG_DDMA_SRC_DRQ_TYPE_NFC, - SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0); - - writel(nsectors, SUNXI_NFC_BASE + NFC_SECTOR_NUM); - writel(NFC_ST_DMA_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); - writel(NFC_DATA_TRANS | NFC_PAGE_CMD | NFC_DATA_SWAP_METHOD, - SUNXI_NFC_BASE + NFC_CMD); + /* Retrieve data from SRAM (PIO) */ + for (i = 0; i < nsectors; i++) { + int data_off = i * conf->ecc_size; + int oob_off = conf->page_size + (i * oob_chunk_sz); + u8 *data = dest + data_off; + + /* Clear ECC status and restart ECC engine */ + writel(0, SUNXI_NFC_BASE + NFC_ECC_ST); + writel((rand_seed << 16) | (conf->ecc_strength << 12) | + (conf->randomize ? NFC_ECC_RANDOM_EN : 0) | + (conf->ecc_size == 512 ? NFC_ECC_BLOCK_SIZE : 0) | + NFC_ECC_EN | NFC_ECC_EXCEPTION, + SUNXI_NFC_BASE + NFC_ECC_CTL); + + /* Move the data in SRAM */ + nand_change_column(data_off); + nand_wait_cmd_fifo_empty(); + writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); + writel(conf->ecc_size, SUNXI_NFC_BASE + NFC_CNT); + writel(NFC_DATA_TRANS, SUNXI_NFC_BASE + NFC_CMD); + nand_wait_int(); - if (!check_value(SUNXI_NFC_BASE + NFC_ST, NFC_ST_DMA_INT_FLAG, - DEFAULT_TIMEOUT_US)) { - printf("Error while initializing dma interrupt\n"); - return -EIO; - } - writel(NFC_ST_DMA_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); + /* + * Let the ECC engine consume the ECC bytes and possibly correct + * the data. + */ + nand_change_column(oob_off); + nand_wait_cmd_fifo_empty(); + writel(NFC_ST_CMD_INT_FLAG, SUNXI_NFC_BASE + NFC_ST); + writel(NFC_DATA_TRANS | NFC_ECC_CMD, SUNXI_NFC_BASE + NFC_CMD); + nand_wait_int(); - if (!check_value_negated(SUNXI_DMA_BASE + SUNXI_DMA_CFG_REG0, - SUNXI_DMA_DDMA_CFG_REG_LOADING, - DEFAULT_TIMEOUT_US)) { - printf("Error while waiting for dma transfer to finish\n"); - return -EIO; - } + /* Get the ECC status */ + ecc_st = readl(SUNXI_NFC_BASE + NFC_ECC_ST); - invalidate_dcache_range(dst, - ALIGN(dst + conf->ecc_size, ARCH_DMA_MINALIGN)); + /* Retrieve the data from SRAM */ + memcpy_fromio(data, SUNXI_NFC_BASE + NFC_RAM0_BASE, + conf->ecc_size); - val = readl(SUNXI_NFC_BASE + NFC_ECC_ST); + /* Stop ECC engine */ + writel(readl(SUNXI_NFC_BASE + NFC_ECC_CTL) & ~NFC_ECC_EN, + SUNXI_NFC_BASE + NFC_ECC_CTL); - /* ECC error detected. */ - if (val & 0xffff) - return -EIO; + /* ECC error detected. */ + if (ecc_st & 0xffff) + return -EIO; - /* - * Return 1 if the page is empty. - * We consider the page as empty if the first ECC block is marked - * empty. - */ - return (val & 0x10000) ? 1 : 0; + /* + * Return 1 if the page is empty. We consider the page as empty + * if the first ECC block is marked empty. + */ + if (ecc_st & 0x10000) + return 1; + + if (data_off + conf->ecc_size >= len) + break; + } + + return 0; } static int nand_max_ecc_strength(struct nfc_config *conf) From patchwork Wed Jan 24 00:44:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865115 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR65s1NSwz9s7s for ; Wed, 24 Jan 2018 11:50:25 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C0B5AC221CB; Wed, 24 Jan 2018 00:47:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A38D7C221B4; Wed, 24 Jan 2018 00:45:58 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 51969C221B0; Wed, 24 Jan 2018 00:45:27 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id C6BA6C2219A for ; Wed, 24 Jan 2018 00:45:23 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id A469F20C12; Wed, 24 Jan 2018 01:45:23 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id 73B9220C53; Wed, 24 Jan 2018 01:45:06 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:52 +0100 Message-Id: <20180124004454.5759-7-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 6/8] configs: Add NAND support for NES Classic X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add NAND parameters to the Nintendo NES Classic configuration file. Signed-off-by: Miquel Raynal --- configs/Nintendo_NES_Classic_Edition_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig index d05375d0db..467055279c 100644 --- a/configs/Nintendo_NES_Classic_Edition_defconfig +++ b/configs/Nintendo_NES_Classic_Edition_defconfig @@ -9,6 +9,10 @@ CONFIG_AXP_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SYS_EXTRA_OPTIONS="SYS_NAND_BLOCK_SIZE=0x20000,SYS_NAND_PAGE_SIZE=2048,SYS_NAND_OOBSIZE=64" +CONFIG_NAND=y +CONFIG_NAND_SUNXI=y CONFIG_FASTBOOT_FLASH=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set From patchwork Wed Jan 24 00:44:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865113 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR63k5N1Zz9s71 for ; Wed, 24 Jan 2018 11:48:34 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 09053C22174; Wed, 24 Jan 2018 00:47:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 4DAE0C22180; Wed, 24 Jan 2018 00:46:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7E6C7C221BF; Wed, 24 Jan 2018 00:45:27 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id D6A7BC221A0 for ; Wed, 24 Jan 2018 00:45:23 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id B3EBE20C1A; Wed, 24 Jan 2018 01:45:23 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id 04E1120C56; Wed, 24 Jan 2018 01:45:06 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:53 +0100 Message-Id: <20180124004454.5759-8-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 7/8] sunxi: dts: Add NAND node to sun8i DTSI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add the NAND controller node, as well as the definition of the missing pins and clock. Signed-off-by: Miquel Raynal --- arch/arm/dts/sun8i-a23-a33.dtsi | 31 +++++++++++++++++++++++++++++++ arch/arm/dts/sun8i-a33.dtsi | 8 ++++++++ 2 files changed, 39 insertions(+) diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi index f97c38f097..fe6ea82cb3 100644 --- a/arch/arm/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -325,6 +325,19 @@ #size-cells = <0>; }; + nfc: nand@01c03000 { + compatible = "allwinner,sun4i-a10-nand"; + reg = <0x01c03000 0x1000>; + interrupts = ; + clocks = <&ahb1_gates 25>, <&nand_clk>; + clock-names = "ahb", "mod"; + resets = <&ahb1_rst 10>; + reset-names = "ahb"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + ehci0: usb@01c1a000 { compatible = "allwinner,sun8i-a23-ehci", "generic-ehci"; reg = <0x01c1a000 0x100>; @@ -364,6 +377,24 @@ allwinner,pull = ; }; + nand_pins_a: nand-base0@0 { + allwinner,pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", + "PC15"; + allwinner,function = "nand0"; + }; + + nand_cs0_pins_a: nand-cs@0 { + allwinner,pins = "PC4"; + allwinner,function = "nand0"; + }; + + nand_rb0_pins_a: nand-rb@0 { + allwinner,pins = "PC6"; + allwinner,function = "nand0"; + }; + mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi index 001d8402ca..2ef817a679 100644 --- a/arch/arm/dts/sun8i-a33.dtsi +++ b/arch/arm/dts/sun8i-a33.dtsi @@ -99,6 +99,14 @@ "ahb1_sat"; }; + nand_clk: clk@01c20080 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c20080 0x4>; + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; + clock-output-names = "nand"; + }; + ss_clk: clk@01c2009c { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-mod0-clk"; From patchwork Wed Jan 24 00:44:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 865114 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zR65h4B02z9s7s for ; Wed, 24 Jan 2018 11:50:16 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 39B82C221BC; Wed, 24 Jan 2018 00:47:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BEE58C221A8; Wed, 24 Jan 2018 00:45:51 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3EAC0C221AE; Wed, 24 Jan 2018 00:45:27 +0000 (UTC) Received: from mail.free-electrons.com (mail.free-electrons.com [62.4.15.54]) by lists.denx.de (Postfix) with ESMTP id 5481FC221A9 for ; Wed, 24 Jan 2018 00:45:24 +0000 (UTC) Received: by mail.free-electrons.com (Postfix, from userid 110) id 3352E20C1B; Wed, 24 Jan 2018 01:45:24 +0100 (CET) Received: from localhost.localdomain (unknown [91.224.148.103]) by mail.free-electrons.com (Postfix) with ESMTPSA id 8D0E720C89; Wed, 24 Jan 2018 01:45:07 +0100 (CET) From: Miquel Raynal To: Albert Aribaud , Jagan Teki , Maxime Ripard , Hans de Goede , FUKAUMI Naoki , Scott Wood Date: Wed, 24 Jan 2018 01:44:54 +0100 Message-Id: <20180124004454.5759-9-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180124004454.5759-1-miquel.raynal@free-electrons.com> References: <20180124004454.5759-1-miquel.raynal@free-electrons.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 8/8] sunxi: dts: Enable NAND on NES classic X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Let the Nintendo NES Classic use the Macronix NAND chip on it. Signed-off-by: Miquel Raynal --- arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts b/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts index dce688ec8e..b8535d3dac 100644 --- a/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts +++ b/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts @@ -61,3 +61,17 @@ pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; + status = "okay"; + + nand@0 { + #address-cells = <2>; + #size-cells = <2>; + reg = <0>; + allwinner,rb = <0>; + nand-ecc-mode = "hw"; + }; +};