From patchwork Wed Jun 2 20:37:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486871 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=eGIPDKfC; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FwLTk3lx9z9sVt for ; Thu, 3 Jun 2021 06:38:50 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B018F82F41; Wed, 2 Jun 2021 22:38:34 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.b="eGIPDKfC"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1892782F3B; Wed, 2 Jun 2021 22:38:30 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from libero.it (smtp-35.italiaonline.it [213.209.10.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7D80682F3D for ; Wed, 2 Jun 2021 22:38:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([79.17.119.101]) by smtp-35.iol.local with ESMTPA id oXctlNwhysptioXdAlNDgp; Wed, 02 Jun 2021 22:38:25 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666305; bh=RvNte/laX6IeODuB0rAs0klprF3whLec6socZti9mj4=; h=From; b=eGIPDKfClc3MI5OeatZIlWjWLh5A6iF1MzcCQIUfffKEjwV4WtPatr4rhza1oyKyu OZPxgQLlvbrJqQW+AcRg9ZlYYY41/e6Xi4mo7MO93fca2k8bWeVPaBIa6Al+RcGYTN RdBLtPL8dAc6B1G0hRKQt+chiuWuaF+ekZKh95UkGcVbBJc0C/B08yOv++uYOI5x2Q qFtaUjwI95YCqWIdQfY5cC4ZejyhZH6MQuLn7RexsVYPUuJnijPmUB+haYFBcZswTg WHOhybZ8AyifrT1LJtJs2bVn1arKAE+UYqkeyInzt7gVdmiHiSstfqzwSBZLXLc1F/ L5+eGt1h0MxBA== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec41 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=K-Is7kys6MgbSg9EoGoA:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Heiko Schocher , Heinrich Schuchardt , Lokesh Vutla , =?utf-8?q?Marek_Beh=C3=BAn?= , =?utf-8?q?Pali_Roh=C3=A1?= =?utf-8?q?r?= , Stefan Roese , "Ying-Chun Liu (PaulLiu)" Subject: [PATCH v2 1/8] rtc: davinci: enable compilation for omap architectures Date: Wed, 2 Jun 2021 22:37:58 +0200 Message-Id: <20210602203805.11494-2-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfNGGpt5NpzJAL95T0uOH9QCZaZiMtWPcc0RSJl1MwVndXhpU3wDxmCN8eaB7O2jlelQAcAfT5rqGSqZzK3Y2m/vbz4aHRSZlBu7Qf8v7xmXF+qftPVAz UBZPB45ddu6vLt+9qouT27jSd6KByRN+VBLGe8n1kQ5LqhTFmYGe0pq/YmIti+sfJ7/liim/uBSd34EKJBmAsUVWWrnv/wMMDcbtZfHA93HH5h4P7E58jFA6 2IXq5hqSH1PRmW9Txdc2wgFn8jtQpX2Kz+9pF3rCnGmRD/fCaX5UMEKCn29JJCMM37IbXVaskyBkL1ScdlwnGSM8iMB6OW25SR6IiSuw6KnQFDCKBTDhCiUL AT+Y+lyt/J2kPZnFj7CpljjL9ON8psa8VMUlgGU1emEDARxzlqPdjYj9HO5ui9nJYBd/zHFtI7vxL7AlyuZ6iWK9I3PKsQ== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and DRA7XX SOCs. So, let's enable compilation for these architectures too. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/rtc/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index c84a9d2b27..cbdfddb80f 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -188,4 +188,11 @@ config RTC_ABX80X families of ultra-low-power battery- and capacitor-backed real-time clock chips. +config RTC_DAVINCI + bool "Enable TI OMAP RTC driver" + depends on ARCH_DAVINCI || ARCH_OMAP2PLUS + help + Say "yes" here to support the on chip real time clock + present on TI OMAP1, AM33xx, DA8xx/OMAP-L13x, AM43xx and DRA7xx. + endmenu From patchwork Wed Jun 2 20:37:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486870 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=H94ZziCK; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FwLTY5PwVz9sVb for ; Thu, 3 Jun 2021 06:38:39 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9149182F36; Wed, 2 Jun 2021 22:38:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.b="H94ZziCK"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1385482F3A; Wed, 2 Jun 2021 22:38:30 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from libero.it (smtp-35.italiaonline.it [213.209.10.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8BD6C82F42 for ; Wed, 2 Jun 2021 22:38:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([79.17.119.101]) by smtp-35.iol.local with ESMTPA id oXctlNwhysptioXdBlNDhU; Wed, 02 Jun 2021 22:38:25 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666305; bh=SAPNQpLVPR97qoRj5qUw0h0e66kTfhMzMqKJGCMggGU=; h=From; b=H94ZziCKerBeY6HsS4deWR7GCp0BK1IT1UB8m1SISQ6UCZk1K1PZpThlfkLkx9MKC fVThn1tpHGURdQ6Hs+Qru6wXSeDuJNsNshWr8LVTbxwjOeGgsUo4wZqwQfQVU+i4cA TY2QkC+25uMt0qjp10Os2SsbFoC/5t4W1fnUrORHgcoYvYBUQFU2OXbLybdTd0fw+v l5vtKZeK43qP8AV4Equ2PW/iuF5d1PP5IeBJFCDw3jWxuixxlAPIFG4prtdjDNK/jB oHjiffIgBEdqn9PQK8U8mA9O7zwYxGfGpHQr0SMCs8WoV/9rJlN+KfzJsyWSVfhTyM eSZ9GW7riRvLg== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec41 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=MpC_hCVLlhPZseGFDh4A:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH v2 2/8] rtc: davinci: fix compiler errors Date: Wed, 2 Jun 2021 22:37:59 +0200 Message-Id: <20210602203805.11494-3-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfNGGpt5NpzJAL95T0uOH9QCZaZiMtWPcc0RSJl1MwVndXhpU3wDxmCN8eaB7O2jlelQAcAfT5rqGSqZzK3Y2m/vbz4aHRSZlBu7Qf8v7xmXF+qftPVAz UBZPB45ddu6vLt+9qouT27jSd6KByRN+VBLGe8n1kQ5LqhTFmYGe0pq/f2xHjljqzMimYdLLH0RSVjvBf5Shc+BPHBC480UWHp7cKq+7LGWrSd2n0RTMj8yI 8SZNWfEeZ9YkkzjKGd2R7cyY/RZse8r0nRZWwUZLjEDGxOAItoXV9awOKpDHqKba X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Fix errors raised by module compilation. Signed-off-by: Dario Binacchi --- Changes in v2: - Separated from Kconfig patch drivers/rtc/davinci.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index c446e7a735..8f5f76c9d6 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -9,11 +9,16 @@ #include #include #include +#include #include +#if !defined(RTC_BASE) && defined(DAVINCI_RTC_BASE) +#define RTC_BASE DAVINCI_RTC_BASE +#endif + int rtc_get(struct rtc_time *tmp) { - struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; unsigned long sec, min, hour, mday, wday, mon_cent, year; unsigned long status; @@ -57,7 +62,7 @@ int rtc_get(struct rtc_time *tmp) int rtc_set(struct rtc_time *tmp) { - struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, @@ -75,7 +80,7 @@ int rtc_set(struct rtc_time *tmp) void rtc_reset(void) { - struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; /* run RTC counter */ writel(0x01, &rtc->ctrl); From patchwork Wed Jun 2 20:38:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486874 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=lbMeRHFo; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FwLVV01q1z9sVt for ; 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Wed, 2 Jun 2021 22:38:25 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([79.17.119.101]) by smtp-35.iol.local with ESMTPA id oXctlNwhysptioXdBlNDhd; Wed, 02 Jun 2021 22:38:25 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666305; bh=5WGyXouPhW943GnGRfgP6HpJJwsG2zynUyYbUmKQejw=; h=From; b=lbMeRHFo4Wj8ykGtvgktiOuJwCaait8NxJkdVY01hLSw1/VZxZWkqOv7VG5WF8Yhd rg8WCrl5gRdY/K3uICOgaCHiOgedcNNHQ1YdU+PW22jV5HPwzevCZecucHS12CCGDb Be7FK+lLWqaFC3wO5n7x/7GIuntXgs8caPiP0Y9w7lE1VfurhnGZ6mu9Gz2L2PzsFM hl3THn6q0qMI7flZUjZ/9e8S7KMVH+WT6UQ3RNHbe55Re8knQS2aSEXVTYIfeorObt hkN0nsu9ASjcIQcbUk27HGZ45q40pofNGeOeKpejdAi/BJO2g6CWTpcSX6M0Eyr1As PHnA+CZgYS2mA== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec41 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=f3zYWjciisRAOMF2TB8A:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH v2 3/8] rtc: davinci: replace 32bit access with 8bit access Date: Wed, 2 Jun 2021 22:38:00 +0200 Message-Id: <20210602203805.11494-4-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfNGGpt5NpzJAL95T0uOH9QCZaZiMtWPcc0RSJl1MwVndXhpU3wDxmCN8eaB7O2jlelQAcAfT5rqGSqZzK3Y2m/vbz4aHRSZlBu7Qf8v7xmXF+qftPVAz UBZPB45ddu6vLt+9qouT27jSd6KByRN+VBLGe8n1kQ5LqhTFmYGe0pq/f2xHjljqzMimYdLLH0RSVjvBf5Shc+BPHBC480UWHp7cKq+7LGWrSd2n0RTMj8yI 8SZNWfEeZ9YkkzjKGd2R7cyY/RZse8r0nRZWwUZLjEDGxOAItoXV9awOKpDHqKba X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Use 32-bit access only where it is needed. Most of the RTC registers contain useful information in the 8 least significant bits, the others are reserved. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/rtc/davinci.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 8f5f76c9d6..99ae31e2a5 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -22,7 +22,7 @@ int rtc_get(struct rtc_time *tmp) unsigned long sec, min, hour, mday, wday, mon_cent, year; unsigned long status; - status = readl(&rtc->status); + status = readb(&rtc->status); if ((status & RTC_STATE_RUN) != RTC_STATE_RUN) { printf("RTC doesn't run\n"); return -1; @@ -30,13 +30,13 @@ int rtc_get(struct rtc_time *tmp) if ((status & RTC_STATE_BUSY) == RTC_STATE_BUSY) udelay(20); - sec = readl(&rtc->second); - min = readl(&rtc->minutes); - hour = readl(&rtc->hours); - mday = readl(&rtc->day); - wday = readl(&rtc->dotw); - mon_cent = readl(&rtc->month); - year = readl(&rtc->year); + sec = readb(&rtc->second); + min = readb(&rtc->minutes); + hour = readb(&rtc->hours); + mday = readb(&rtc->day); + wday = readb(&rtc->dotw); + mon_cent = readb(&rtc->month); + year = readb(&rtc->year); debug("Get RTC year: %02lx mon/cent: %02lx mday: %02lx wday: %02lx " "hr: %02lx min: %02lx sec: %02lx\n", @@ -67,14 +67,14 @@ int rtc_set(struct rtc_time *tmp) debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - writel(bin2bcd(tmp->tm_year % 100), &rtc->year); - writel(bin2bcd(tmp->tm_mon), &rtc->month); + writeb(bin2bcd(tmp->tm_year % 100), &rtc->year); + writeb(bin2bcd(tmp->tm_mon), &rtc->month); - writel(bin2bcd(tmp->tm_wday), &rtc->dotw); - writel(bin2bcd(tmp->tm_mday), &rtc->day); - writel(bin2bcd(tmp->tm_hour), &rtc->hours); - writel(bin2bcd(tmp->tm_min), &rtc->minutes); - writel(bin2bcd(tmp->tm_sec), &rtc->second); + writeb(bin2bcd(tmp->tm_wday), &rtc->dotw); + writeb(bin2bcd(tmp->tm_mday), &rtc->day); + writeb(bin2bcd(tmp->tm_hour), &rtc->hours); + writeb(bin2bcd(tmp->tm_min), &rtc->minutes); + writeb(bin2bcd(tmp->tm_sec), &rtc->second); return 0; } @@ -83,5 +83,5 @@ void rtc_reset(void) struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; /* run RTC counter */ - writel(0x01, &rtc->ctrl); + writeb(0x01, &rtc->ctrl); } From patchwork Wed Jun 2 20:38:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486876 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=kCO3CfaT; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FwLVt0HyDz9sVt for ; Thu, 3 Jun 2021 06:39:49 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F344582F6D; Wed, 2 Jun 2021 22:38:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.b="kCO3CfaT"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A6BD382F42; Wed, 2 Jun 2021 22:38:32 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from libero.it (smtp-35.italiaonline.it [213.209.10.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4499882F46 for ; Wed, 2 Jun 2021 22:38:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([79.17.119.101]) by smtp-35.iol.local with ESMTPA id oXctlNwhysptioXdClNDhk; Wed, 02 Jun 2021 22:38:26 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666306; bh=DXREIDEzpBvi7X9KWFuVH/vomS+QNU0r+dM5AH73bSs=; h=From; b=kCO3CfaTBmc/dEK7v/cUV9CnrtvL/MfDZONR1twQbgIjhIZD2Yoh/2JMNMbiHESDs ZM0I6S1OIBVACdN1gi2U3G01uW4yPY7bNwAfprTdqYKcCPoOazrDLhMdJ6HqFbJVur 5UOP5xypUc7IX1gqEzxzoolmqwuGiEHYTc1WDZWYqXGeV8ZwPfpyCTVb8oZnJ4wWaO HcJNkoU5iLg4/2U4ZC+iXwZ5uGi2/LMUUOIbpR+tOY2cO52rek1wUAk3m9Jw/T0d32 c8AHYwuZMZtY6IHSA+MEaNBiseAGcqF6fdzllNYI1Yn/3NDdtJAGbTcSe0ZIBE9wd1 SHdzM4UqRZXtw== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec42 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=IkcTkHD0fZMA:10 a=t0WUzoDEHqVNwkio9KQA:9 a=QEXdDO2ut3YA:10 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH v2 4/8] rtc: davinci: check BUSY bit before set TC registers Date: Wed, 2 Jun 2021 22:38:01 +0200 Message-Id: <20210602203805.11494-5-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> MIME-Version: 1.0 X-CMAE-Envelope: MS4xfNqcGOzsbdTeKEL8xabRpoE2g0C31JYcyTSAK7PRPqvAh7qxZJDhdDQ63mux3gBcloRucxptRVmgNWZSBnHZELVCpRw2xI73dnKTIp6tkjaNG0Jj0YNU flEfXL2xSCNpH/lbP7DIue8kUl/ZU59Cdq14S4bCL/F6QS3+fSi6mfRGP/G/JX3M//ejDtcU2ZzDbaHbMyvfi/NdC9fLAmP/gR9Q8OpDE/DlOPRJXF+orG8W R26z+gdDtMuaXuPUDJUfmKUnjb909zmnCs2EfHUq48caJAlTRVX+1bAWyJuIxlbw X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean To write correct data to the TC registers, the STATUS register must be read until the BUSY bit is equal to zero. Once the BUSY flag is zero, there is a 15 μs access period in which the TC registers can be programmed. The rtc_wait_not_busy() has been inspired by the Kernel. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/rtc/davinci.c | 45 ++++++++++++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 99ae31e2a5..7b8c729f3b 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -16,19 +16,39 @@ #define RTC_BASE DAVINCI_RTC_BASE #endif -int rtc_get(struct rtc_time *tmp) +static int davinci_rtc_wait_not_busy(struct davinci_rtc *rtc) { - struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; - unsigned long sec, min, hour, mday, wday, mon_cent, year; - unsigned long status; + int count; + u8 status; status = readb(&rtc->status); if ((status & RTC_STATE_RUN) != RTC_STATE_RUN) { printf("RTC doesn't run\n"); return -1; } - if ((status & RTC_STATE_BUSY) == RTC_STATE_BUSY) - udelay(20); + + /* BUSY may stay active for 1/32768 second (~30 usec) */ + for (count = 0; count < 50; count++) { + if (!(status & RTC_STATE_BUSY)) + break; + + udelay(1); + status = readb(&rtc->status); + } + + /* now we have ~15 usec to read/write various registers */ + return 0; +} + +int rtc_get(struct rtc_time *tmp) +{ + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + unsigned long sec, min, hour, mday, wday, mon_cent, year; + int ret; + + ret = davinci_rtc_wait_not_busy(rtc); + if (ret) + return ret; sec = readb(&rtc->second); min = readb(&rtc->minutes); @@ -63,10 +83,12 @@ int rtc_get(struct rtc_time *tmp) int rtc_set(struct rtc_time *tmp) { struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + int ret; + + ret = davinci_rtc_wait_not_busy(rtc); + if (ret) + return ret; - debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); writeb(bin2bcd(tmp->tm_year % 100), &rtc->year); writeb(bin2bcd(tmp->tm_mon), &rtc->month); @@ -75,6 +97,11 @@ int rtc_set(struct rtc_time *tmp) writeb(bin2bcd(tmp->tm_hour), &rtc->hours); writeb(bin2bcd(tmp->tm_min), &rtc->minutes); writeb(bin2bcd(tmp->tm_sec), &rtc->second); + + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + return 0; } From patchwork Wed Jun 2 20:38:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486875 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=UF0rKbVO; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FwLVg4MTjz9sVt for ; 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Wed, 2 Jun 2021 22:38:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([79.17.119.101]) by smtp-35.iol.local with ESMTPA id oXctlNwhysptioXdClNDiG; Wed, 02 Jun 2021 22:38:26 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666306; bh=k92Pi/tWucn373S76vSaeAIE/lB3/Td5kPTqJyfn8b0=; h=From; b=UF0rKbVONUKCw7d16SHORwijQ/Tv6h0rCRp/UhzlAYjdatdGoDPxrCyLIW/nfEPFu 8/1U7Hu1U1/PNjHzoFgxmwlZuqAnXWoaTwYJJBrLOk7tl1N3I8XDmeJkwEXLlmsqRo ycA5MHLFtO76A6lnoeZd5nqHMxaq+vNOSDz5Xgo0YhYRzp2kZHr9PjcmI/XEknlClx Az9x4mjXYjWrgz2rCB8++Nowo5qimqy8HiA3NDgozUbEHHfnQyxRON3YEjpsCndVQz KV9VfDh6lxs27ePoT0GAC+BS1TtIRTFhIDP5KpvrNqX6J2qKiTpAPFpd2O/atzK6Ef /AEaJ8powvVAA== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec42 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=RAYcp3480LDP6k6qtFIA:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH v2 5/8] rtc: davinci: use unlock/lock mechanism Date: Wed, 2 Jun 2021 22:38:02 +0200 Message-Id: <20210602203805.11494-6-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfNqcGOzsbdTeKEL8xabRpoE2g0C31JYcyTSAK7PRPqvAh7qxZJDhdDQ63mux3gBcloRucxptRVmgNWZSBnHZELVCpRw2xI73dnKTIp6tkjaNG0Jj0YNU flEfXL2xSCNpH/lbP7DIue8kUl/ZU59Cdq14S4bCL/F6QS3+fSi6mfRGP/G/JX3M//ejDtcU2ZzDbaHbMyvfi/NdC9fLAmP/gR9Q8OpDE/DlOPRJXF+orG8W R26z+gdDtMuaXuPUDJUfmKUnjb909zmnCs2EfHUq48caJAlTRVX+1bAWyJuIxlbw X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean The RTC module contains a kicker mechanism to prevent any spurious writes from changing the register values. To set the time, you must first unlock the TC registers, update them and then lock. Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/rtc/davinci.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 7b8c729f3b..82e5eb3b43 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -16,6 +16,18 @@ #define RTC_BASE DAVINCI_RTC_BASE #endif +static void davinci_rtc_lock(struct davinci_rtc *rtc) +{ + writel(0, &rtc->kick0r); + writel(0, &rtc->kick1r); +} + +static void davinci_rtc_unlock(struct davinci_rtc *rtc) +{ + writel(RTC_KICK0R_WE, &rtc->kick0r); + writel(RTC_KICK1R_WE, &rtc->kick1r); +} + static int davinci_rtc_wait_not_busy(struct davinci_rtc *rtc) { int count; @@ -89,6 +101,7 @@ int rtc_set(struct rtc_time *tmp) if (ret) return ret; + davinci_rtc_unlock(rtc); writeb(bin2bcd(tmp->tm_year % 100), &rtc->year); writeb(bin2bcd(tmp->tm_mon), &rtc->month); @@ -97,6 +110,7 @@ int rtc_set(struct rtc_time *tmp) writeb(bin2bcd(tmp->tm_hour), &rtc->hours); writeb(bin2bcd(tmp->tm_min), &rtc->minutes); writeb(bin2bcd(tmp->tm_sec), &rtc->second); + davinci_rtc_lock(rtc); debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, From patchwork Wed Jun 2 20:38:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486873 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=EUSsXnAZ; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FwLVH6Ft7z9sW7 for ; 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Wed, 2 Jun 2021 22:38:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([79.17.119.101]) by smtp-35.iol.local with ESMTPA id oXctlNwhysptioXdClNDiP; Wed, 02 Jun 2021 22:38:26 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666306; bh=ksZVPaOUpMkYO0s4QF6WeDfVppCY23sL7xSoOPzCQGE=; h=From; b=EUSsXnAZZhF1sec60cvW/zr/kuZL3Vv5heJ37WRK2qi6dHZ+2mLGD7CKpZBsP990z L+LtYLc3y8t8429ifI7m1TEUamYzn1H5jU9ik09cb6iKC8Cuu/9Sys5HV0HfkgnziR t+eoNfe8IshmjTGnLf+vrE0sqIQT6QO61pP6jpoCSPhl+G2HODkaTnUOnENkzS6ENP cM/qm1XeUjNTIQHpuxJpLqEG73dOamEkrZAqs/INDPsG0MR3TDnxKP1cybw4sJviKA ubGjOChaWj+Yqbf9myI/S+vbr33Fsme0boJ3mCM9vWyflu1GHqex3OcO1SpQAx0S9N VLsWN3D1umGVA== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec42 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=_KLRL7pzE3_qBKClGDYA:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Tom Rini Subject: [PATCH v2 6/8] arm: dts: sync rtc node of am335x boards with Linux 5.9-rc7 Date: Wed, 2 Jun 2021 22:38:03 +0200 Message-Id: <20210602203805.11494-7-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfNqcGOzsbdTeKEL8xabRpoE2g0C31JYcyTSAK7PRPqvAh7qxZJDhdDQ63mux3gBcloRucxptRVmgNWZSBnHZELVCpRw2xI73dnKTIp6tkjaNG0Jj0YNU flEfXL2xSCNpH/lbP7DIue8kUl/ZU59Cdq14S4bCL/F6QS3+fSi6mfRGP/G/JX3M//ejDtcU2ZzDbaHbMyvfi/NdC9fLAmP/gR9Q8OpDE/DlOPRJXF+orG8W 1piStPJc/s1r1FYsUpdv/GJ3EHZk0zm7BKRCOZx+qdy5hYptE+VSnUeX3KGFahBC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean There have been some changes to the am335x- DTs related to the rtc node, so let's re-syncs them with Linux. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/dts/am335x-bone-common.dtsi | 5 +++++ arch/arm/dts/am335x-evm.dts | 5 +++++ arch/arm/dts/am335x-evmsk.dts | 5 +++++ arch/arm/dts/am335x-osd335x-common.dtsi | 6 ++++++ 4 files changed, 21 insertions(+) diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi index 5b8230e281..8dcfac3a5b 100644 --- a/arch/arm/dts/am335x-bone-common.dtsi +++ b/arch/arm/dts/am335x-bone-common.dtsi @@ -398,3 +398,8 @@ &sham { status = "okay"; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; +}; diff --git a/arch/arm/dts/am335x-evm.dts b/arch/arm/dts/am335x-evm.dts index c4bd1855f2..136f685bc5 100644 --- a/arch/arm/dts/am335x-evm.dts +++ b/arch/arm/dts/am335x-evm.dts @@ -783,3 +783,8 @@ pinctrl-names = "default"; pinctrl-0 = <&dcan1_pins_default>; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; +}; diff --git a/arch/arm/dts/am335x-evmsk.dts b/arch/arm/dts/am335x-evmsk.dts index c94c33b595..b14bf2ff1b 100644 --- a/arch/arm/dts/am335x-evmsk.dts +++ b/arch/arm/dts/am335x-evmsk.dts @@ -724,3 +724,8 @@ &lcdc { status = "okay"; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; +}; diff --git a/arch/arm/dts/am335x-osd335x-common.dtsi b/arch/arm/dts/am335x-osd335x-common.dtsi index f8ff473f94..2b55b7d0f9 100644 --- a/arch/arm/dts/am335x-osd335x-common.dtsi +++ b/arch/arm/dts/am335x-osd335x-common.dtsi @@ -122,3 +122,9 @@ &sham { status = "okay"; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; + system-power-controller; +}; From patchwork Wed Jun 2 20:38:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486878 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 02 Jun 2021 22:38:27 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666307; bh=ssM4J7+GIPWj6ZZhdG8RcIrF5STMeO4wX8V5KxxolCg=; h=From; b=aaFHGLJq8ejLe5jQyghUSirx/R06AJPml5k2Uqs10JboiN14xt5dymEpN5pfhyZrX CLVelzjrASFj+XY4Fahb9+rAaQCqyEvW12c34/YLyxrqopvtJLHKaq8zcbTYQiypXk qfoH+5KldQJKRbyUdQMwO0HIqmJRyQCotYGo0RAhl/yNtehbbBAAVgdJFy4CdHJbnU gCv/mm6Z20la7ORtmu+ZWlISp57oZYFr+pelObdXBXdQjV7alUumztyff4Yese1cLM G3h+rPOduGAkocPAHK3DeUl2ymGkAhIkxjK4JhWYgGagVjjoXdhPPyhx1eysKt4pde T8p6/0a9NPYoQ== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec43 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=MQ0KurTrLJtgj8GxUgAA:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH v2 7/8] rtc: davinci: add driver model support Date: Wed, 2 Jun 2021 22:38:04 +0200 Message-Id: <20210602203805.11494-8-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfP5wprdIZ8mHEl+Ffoz6LEO1+O1PgMB9Jj3IYPiMzoQ54W2SWHWwdTfp8RvYL1IaBVQGPh9Zsuz/8vDCmgyxx4zp6t5TtxMuFg9fpwxjl+9giIw9FRZg iILPEC10Cmgp8fGP+wP9kMzA8EPIEQV40T18/qW6RtOIMBufe8v1ch1dxlleQ1+IJ+Q1bbdGWm/PYlUhLj2kG0uiSt0EvS5Jekxww1sUO8Zb41tswkQoNtdS WlL+tfKlOyi6PAjm7tEmBNOXBo+MpSwHB3EibzcI7xndMGB5gov4OMiapfCCqf7M X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Update the driver to support the device tree and the driver model. The read / write helpers in rtc_ops allow access to scratch registers only. The offset parameter is added to the address of the scratch0 register. Support for non-DM has been removed as there were no users. Signed-off-by: Dario Binacchi --- Changes in v2: - Use consistent naming (omap_rtc_. - Remove non-DM support. It's no more used. drivers/rtc/davinci.c | 428 ++++++++++++++++++++++++++++++++++++------ 1 file changed, 367 insertions(+), 61 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 82e5eb3b43..21e5234477 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -2,127 +2,433 @@ /* * (C) Copyright 2011 DENX Software Engineering GmbH * Heiko Schocher + * Copyright (C) 2021 Dario Binacchi */ #include #include +#include +#include #include #include #include -#include -#include +#include #include -#if !defined(RTC_BASE) && defined(DAVINCI_RTC_BASE) -#define RTC_BASE DAVINCI_RTC_BASE -#endif +/* RTC registers */ +#define OMAP_RTC_SECONDS_REG 0x00 +#define OMAP_RTC_MINUTES_REG 0x04 +#define OMAP_RTC_HOURS_REG 0x08 +#define OMAP_RTC_DAYS_REG 0x0C +#define OMAP_RTC_MONTHS_REG 0x10 +#define OMAP_RTC_YEARS_REG 0x14 +#define OMAP_RTC_WEEKS_REG 0x18 -static void davinci_rtc_lock(struct davinci_rtc *rtc) +#define OMAP_RTC_CTRL_REG 0x40 +#define OMAP_RTC_STATUS_REG 0x44 +#define OMAP_RTC_INTERRUPTS_REG 0x48 + +#define OMAP_RTC_OSC_REG 0x54 + +#define OMAP_RTC_SCRATCH0_REG 0x60 +#define OMAP_RTC_SCRATCH1_REG 0x64 +#define OMAP_RTC_SCRATCH2_REG 0x68 + +#define OMAP_RTC_KICK0_REG 0x6c +#define OMAP_RTC_KICK1_REG 0x70 + +#define OMAP_RTC_PMIC_REG 0x98 + +/* OMAP_RTC_CTRL_REG bit fields: */ +#define OMAP_RTC_CTRL_SPLIT BIT(7) +#define OMAP_RTC_CTRL_DISABLE BIT(6) +#define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5) +#define OMAP_RTC_CTRL_TEST BIT(4) +#define OMAP_RTC_CTRL_MODE_12_24 BIT(3) +#define OMAP_RTC_CTRL_AUTO_COMP BIT(2) +#define OMAP_RTC_CTRL_ROUND_30S BIT(1) +#define OMAP_RTC_CTRL_STOP BIT(0) + +/* OMAP_RTC_STATUS_REG bit fields */ +#define OMAP_RTC_STATUS_POWER_UP BIT(7) +#define OMAP_RTC_STATUS_ALARM2 BIT(7) +#define OMAP_RTC_STATUS_ALARM BIT(6) +#define OMAP_RTC_STATUS_1D_EVENT BIT(5) +#define OMAP_RTC_STATUS_1H_EVENT BIT(4) +#define OMAP_RTC_STATUS_1M_EVENT BIT(3) +#define OMAP_RTC_STATUS_1S_EVENT BIT(2) +#define OMAP_RTC_STATUS_RUN BIT(1) +#define OMAP_RTC_STATUS_BUSY BIT(0) + +/* OMAP_RTC_OSC_REG bit fields */ +#define OMAP_RTC_OSC_32KCLK_EN BIT(6) +#define OMAP_RTC_OSC_SEL_32KCLK_SRC BIT(3) +#define OMAP_RTC_OSC_OSC32K_GZ_DISABLE BIT(4) + +/* OMAP_RTC_KICKER values */ +#define OMAP_RTC_KICK0_VALUE 0x83e70b13 +#define OMAP_RTC_KICK1_VALUE 0x95a4f1e0 + +struct omap_rtc_device_type { + bool has_32kclk_en; + bool has_irqwakeen; + bool has_pmic_mode; + bool has_power_up_reset; +}; + +struct omap_rtc_priv { + fdt_addr_t base; + u8 max_reg; + struct udevice *dev; + struct clk clk; + bool has_ext_clk; + const struct omap_rtc_device_type *type; +}; + +static inline u8 omap_rtc_readb(struct omap_rtc_priv *priv, unsigned int reg) +{ + return readb(priv->base + reg); +} + +static inline u32 omap_rtc_readl(struct omap_rtc_priv *priv, unsigned int reg) +{ + return readl(priv->base + reg); +} + +static inline void omap_rtc_writeb(struct omap_rtc_priv *priv, unsigned int reg, + u8 val) +{ + writeb(val, priv->base + reg); +} + +static inline void omap_rtc_writel(struct omap_rtc_priv *priv, unsigned int reg, + u32 val) +{ + writel(val, priv->base + reg); +} + +static inline void omap_rtc_unlock(struct omap_rtc_priv *priv) { - writel(0, &rtc->kick0r); - writel(0, &rtc->kick1r); + omap_rtc_writel(priv, OMAP_RTC_KICK0_REG, OMAP_RTC_KICK0_VALUE); + omap_rtc_writel(priv, OMAP_RTC_KICK1_REG, OMAP_RTC_KICK1_VALUE); } -static void davinci_rtc_unlock(struct davinci_rtc *rtc) +static inline void omap_rtc_lock(struct omap_rtc_priv *priv) { - writel(RTC_KICK0R_WE, &rtc->kick0r); - writel(RTC_KICK1R_WE, &rtc->kick1r); + omap_rtc_writel(priv, OMAP_RTC_KICK0_REG, 0); + omap_rtc_writel(priv, OMAP_RTC_KICK1_REG, 0); } -static int davinci_rtc_wait_not_busy(struct davinci_rtc *rtc) +static int omap_rtc_wait_not_busy(struct omap_rtc_priv *priv) { int count; u8 status; - status = readb(&rtc->status); - if ((status & RTC_STATE_RUN) != RTC_STATE_RUN) { + status = omap_rtc_readb(priv, OMAP_RTC_STATUS_REG); + if ((status & OMAP_RTC_STATUS_RUN) != OMAP_RTC_STATUS_RUN) { printf("RTC doesn't run\n"); return -1; } /* BUSY may stay active for 1/32768 second (~30 usec) */ for (count = 0; count < 50; count++) { - if (!(status & RTC_STATE_BUSY)) + if (!(status & OMAP_RTC_STATUS_BUSY)) break; udelay(1); - status = readb(&rtc->status); + status = omap_rtc_readb(priv, OMAP_RTC_STATUS_REG); } /* now we have ~15 usec to read/write various registers */ return 0; } -int rtc_get(struct rtc_time *tmp) +static int omap_rtc_reset(struct udevice *dev) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + + /* run RTC counter */ + omap_rtc_writeb(priv, OMAP_RTC_CTRL_REG, 0x01); + return 0; +} + +static int omap_rtc_set(struct udevice *dev, const struct rtc_time *tm) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + int ret; + + ret = omap_rtc_wait_not_busy(priv); + if (ret) + return ret; + + omap_rtc_unlock(priv); + omap_rtc_writeb(priv, OMAP_RTC_YEARS_REG, bin2bcd(tm->tm_year % 100)); + omap_rtc_writeb(priv, OMAP_RTC_MONTHS_REG, bin2bcd(tm->tm_mon)); + omap_rtc_writeb(priv, OMAP_RTC_WEEKS_REG, bin2bcd(tm->tm_wday)); + omap_rtc_writeb(priv, OMAP_RTC_DAYS_REG, bin2bcd(tm->tm_mday)); + omap_rtc_writeb(priv, OMAP_RTC_HOURS_REG, bin2bcd(tm->tm_hour)); + omap_rtc_writeb(priv, OMAP_RTC_MINUTES_REG, bin2bcd(tm->tm_min)); + omap_rtc_writeb(priv, OMAP_RTC_SECONDS_REG, bin2bcd(tm->tm_sec)); + omap_rtc_lock(priv); + + dev_dbg(dev, "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, tm->tm_hour, + tm->tm_min, tm->tm_sec); + + return 0; +} + +static int omap_rtc_get(struct udevice *dev, struct rtc_time *tm) { - struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + struct omap_rtc_priv *priv = dev_get_priv(dev); unsigned long sec, min, hour, mday, wday, mon_cent, year; int ret; - ret = davinci_rtc_wait_not_busy(rtc); + ret = omap_rtc_wait_not_busy(priv); if (ret) return ret; - sec = readb(&rtc->second); - min = readb(&rtc->minutes); - hour = readb(&rtc->hours); - mday = readb(&rtc->day); - wday = readb(&rtc->dotw); - mon_cent = readb(&rtc->month); - year = readb(&rtc->year); + sec = omap_rtc_readb(priv, OMAP_RTC_SECONDS_REG); + min = omap_rtc_readb(priv, OMAP_RTC_MINUTES_REG); + hour = omap_rtc_readb(priv, OMAP_RTC_HOURS_REG); + mday = omap_rtc_readb(priv, OMAP_RTC_DAYS_REG); + wday = omap_rtc_readb(priv, OMAP_RTC_WEEKS_REG); + mon_cent = omap_rtc_readb(priv, OMAP_RTC_MONTHS_REG); + year = omap_rtc_readb(priv, OMAP_RTC_YEARS_REG); - debug("Get RTC year: %02lx mon/cent: %02lx mday: %02lx wday: %02lx " + dev_dbg(dev, + "Get RTC year: %02lx mon/cent: %02lx mday: %02lx wday: %02lx " "hr: %02lx min: %02lx sec: %02lx\n", year, mon_cent, mday, wday, hour, min, sec); - tmp->tm_sec = bcd2bin(sec & 0x7F); - tmp->tm_min = bcd2bin(min & 0x7F); - tmp->tm_hour = bcd2bin(hour & 0x3F); - tmp->tm_mday = bcd2bin(mday & 0x3F); - tmp->tm_mon = bcd2bin(mon_cent & 0x1F); - tmp->tm_year = bcd2bin(year) + 2000; - tmp->tm_wday = bcd2bin(wday & 0x07); - tmp->tm_yday = 0; - tmp->tm_isdst = 0; + tm->tm_sec = bcd2bin(sec & 0x7F); + tm->tm_min = bcd2bin(min & 0x7F); + tm->tm_hour = bcd2bin(hour & 0x3F); + tm->tm_mday = bcd2bin(mday & 0x3F); + tm->tm_mon = bcd2bin(mon_cent & 0x1F); + tm->tm_year = bcd2bin(year) + 2000; + tm->tm_wday = bcd2bin(wday & 0x07); + tm->tm_yday = 0; + tm->tm_isdst = 0; - debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + dev_dbg(dev, "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, tm->tm_hour, + tm->tm_min, tm->tm_sec); return 0; } -int rtc_set(struct rtc_time *tmp) +static int omap_rtc_scratch_read(struct udevice *dev, uint offset, + u8 *buffer, uint len) { - struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; - int ret; + struct omap_rtc_priv *priv = dev_get_priv(dev); + u32 *val = (u32 *)buffer; + unsigned int reg; + int i; - ret = davinci_rtc_wait_not_busy(rtc); - if (ret) - return ret; + if (len & 3) + return -EFAULT; + + for (i = 0; i < len / 4; i++) { + reg = OMAP_RTC_SCRATCH0_REG + offset + (i * 4); + if (reg >= OMAP_RTC_KICK0_REG) + return -EFAULT; + + val[i] = omap_rtc_readl(priv, reg); + } + + return 0; +} + +static int omap_rtc_scratch_write(struct udevice *dev, uint offset, + const u8 *buffer, uint len) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + u32 *val = (u32 *)buffer; + unsigned int reg; + int i; - davinci_rtc_unlock(rtc); - writeb(bin2bcd(tmp->tm_year % 100), &rtc->year); - writeb(bin2bcd(tmp->tm_mon), &rtc->month); + if (len & 3) + return -EFAULT; - writeb(bin2bcd(tmp->tm_wday), &rtc->dotw); - writeb(bin2bcd(tmp->tm_mday), &rtc->day); - writeb(bin2bcd(tmp->tm_hour), &rtc->hours); - writeb(bin2bcd(tmp->tm_min), &rtc->minutes); - writeb(bin2bcd(tmp->tm_sec), &rtc->second); - davinci_rtc_lock(rtc); + omap_rtc_unlock(priv); + for (i = 0; i < len / 4; i++) { + reg = OMAP_RTC_SCRATCH0_REG + offset + (i * 4); + if (reg >= OMAP_RTC_KICK0_REG) + return -EFAULT; - debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + omap_rtc_writel(priv, reg, val[i]); + } + omap_rtc_lock(priv); return 0; } -void rtc_reset(void) +static int omap_rtc_remove(struct udevice *dev) { - struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + struct omap_rtc_priv *priv = dev_get_priv(dev); + u8 reg; - /* run RTC counter */ - writeb(0x01, &rtc->ctrl); + if (priv->clk.dev) + clk_disable(&priv->clk); + + omap_rtc_unlock(priv); + + /* leave rtc running, but disable irqs */ + omap_rtc_writeb(priv, OMAP_RTC_INTERRUPTS_REG, 0); + + if (priv->has_ext_clk) { + reg = omap_rtc_readb(priv, OMAP_RTC_OSC_REG); + reg &= ~OMAP_RTC_OSC_SEL_32KCLK_SRC; + omap_rtc_writeb(priv, OMAP_RTC_OSC_REG, reg); + } + + omap_rtc_lock(priv); + return 0; +} + +static int omap_rtc_probe(struct udevice *dev) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + u8 reg, mask, new_ctrl; + + priv->dev = dev; + priv->type = (struct omap_rtc_device_type *)dev_get_driver_data(dev); + priv->max_reg = OMAP_RTC_PMIC_REG; + + if (!clk_get_by_name(dev, "ext-clk", &priv->clk)) + priv->has_ext_clk = true; + else + clk_get_by_name(dev, "int-clk", &priv->clk); + + if (priv->clk.dev) + clk_enable(&priv->clk); + else + dev_warn(dev, "missing clock\n"); + + omap_rtc_unlock(priv); + + /* + * disable interrupts + * + * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used + */ + omap_rtc_writel(priv, OMAP_RTC_INTERRUPTS_REG, 0); + + if (priv->type->has_32kclk_en) { + reg = omap_rtc_readb(priv, OMAP_RTC_OSC_REG); + omap_rtc_writeb(priv, OMAP_RTC_OSC_REG, + reg | OMAP_RTC_OSC_32KCLK_EN); + } + + /* clear old status */ + reg = omap_rtc_readb(priv, OMAP_RTC_STATUS_REG); + + mask = OMAP_RTC_STATUS_ALARM; + + if (priv->type->has_pmic_mode) + mask |= OMAP_RTC_STATUS_ALARM2; + + if (priv->type->has_power_up_reset) { + mask |= OMAP_RTC_STATUS_POWER_UP; + if (reg & OMAP_RTC_STATUS_POWER_UP) + dev_info(dev, "RTC power up reset detected\n"); + } + + if (reg & mask) + omap_rtc_writeb(priv, OMAP_RTC_STATUS_REG, reg & mask); + + /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ + reg = omap_rtc_readb(priv, OMAP_RTC_CTRL_REG); + if (reg & OMAP_RTC_CTRL_STOP) + dev_info(dev, "already running\n"); + + /* force to 24 hour mode */ + new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT | OMAP_RTC_CTRL_AUTO_COMP); + new_ctrl |= OMAP_RTC_CTRL_STOP; + + /* + * BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: + * + * - Device wake-up capability setting should come through chip + * init logic. OMAP1 boards should initialize the "wakeup capable" + * flag in the platform device if the board is wired right for + * being woken up by RTC alarm. For OMAP-L138, this capability + * is built into the SoC by the "Deep Sleep" capability. + * + * - Boards wired so RTC_ON_nOFF is used as the reset signal, + * rather than nPWRON_RESET, should forcibly enable split + * power mode. (Some chip errata report that RTC_CTRL_SPLIT + * is write-only, and always reads as zero...) + */ + + if (new_ctrl & OMAP_RTC_CTRL_SPLIT) + dev_info(dev, "split power mode\n"); + + if (reg != new_ctrl) + omap_rtc_writeb(priv, OMAP_RTC_CTRL_REG, new_ctrl); + + /* + * If we have the external clock then switch to it so we can keep + * ticking across suspend. + */ + if (priv->has_ext_clk) { + reg = omap_rtc_readb(priv, OMAP_RTC_OSC_REG); + reg &= ~OMAP_RTC_OSC_OSC32K_GZ_DISABLE; + reg |= OMAP_RTC_OSC_32KCLK_EN | OMAP_RTC_OSC_SEL_32KCLK_SRC; + omap_rtc_writeb(priv, OMAP_RTC_OSC_REG, reg); + } + + omap_rtc_lock(priv); + return 0; } + +static int omap_rtc_of_to_plat(struct udevice *dev) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr(dev); + if (priv->base == FDT_ADDR_T_NONE) { + dev_err(dev, "invalid address\n"); + return -EINVAL; + } + + dev_dbg(dev, "base=%pa\n", &priv->base); + return 0; +} + +static const struct rtc_ops omap_rtc_ops = { + .get = omap_rtc_get, + .set = omap_rtc_set, + .reset = omap_rtc_reset, + .read = omap_rtc_scratch_read, + .write = omap_rtc_scratch_write, +}; + +static const struct omap_rtc_device_type omap_rtc_am3352_type = { + .has_32kclk_en = true, + .has_irqwakeen = true, + .has_pmic_mode = true, +}; + +static const struct omap_rtc_device_type omap_rtc_da830_type = { + .has_32kclk_en = false, + .has_irqwakeen = false, + .has_pmic_mode = false, +}; + +static const struct udevice_id omap_rtc_ids[] = { + {.compatible = "ti,am3352-rtc", .data = (ulong)&omap_rtc_am3352_type}, + {.compatible = "ti,da830-rtc", .data = (ulong)&omap_rtc_da830_type } +}; + +U_BOOT_DRIVER(omap_rtc) = { + .name = "omap_rtc", + .id = UCLASS_RTC, + .of_match = omap_rtc_ids, + .ops = &omap_rtc_ops, + .of_to_plat = omap_rtc_of_to_plat, + .probe = omap_rtc_probe, + .remove = omap_rtc_remove, + .priv_auto = sizeof(struct omap_rtc_priv), +}; From patchwork Wed Jun 2 20:38:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1486877 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([79.17.119.101]) by smtp-35.iol.local with ESMTPA id oXctlNwhysptioXdDlNDj6; Wed, 02 Jun 2021 22:38:27 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1622666307; bh=6MxCQfTH/yt77Xz2crQs1IliEw2C8Y7UrsJEXDga6i8=; h=From; b=jrAcAWCrxr8GBeRJI+lrvZyZ2HV9Vw+e5eyR0yTpu0CSE3Z3J3lTFBwKroTIvqLeO RS7NgSEjcZb+eSi2zlbrf7mfaTM58oM3mjpO3fIN6ejS34FPZtlKacmnAv0t2c/Rr+ jRWboml9pqUCdBbbUBjjl+VTYtYvsAGQFMuLDClnQIR/jPdroUsoxx4MIS8jlXeB4e oMPaooM9nz3d0KkFzrOBp1/7IHhZ6V0F898agK0RFjx8qxO+jaFnCxUk7wX0HqMuCJ H6ThEowoZ1DUO3+vRV4kpTikC3fOZi+C/RsTVdxgNEepSiBxj96Dayxiph8V1OIjEf LaNtDIIW2Yuzw== X-CNFS-Analysis: v=2.4 cv=Bo1Yfab5 c=1 sm=1 tr=0 ts=60b7ec43 cx=a_exe a=do1bHx4A/kh2kuTIUQHSxQ==:117 a=do1bHx4A/kh2kuTIUQHSxQ==:17 a=prFL4SO8xRJx28DiWS8A:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH v2 8/8] rtc: davinci: fix date loaded on reset Date: Wed, 2 Jun 2021 22:38:05 +0200 Message-Id: <20210602203805.11494-9-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210602203805.11494-1-dariobin@libero.it> References: <20210602203805.11494-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfP5wprdIZ8mHEl+Ffoz6LEO1+O1PgMB9Jj3IYPiMzoQ54W2SWHWwdTfp8RvYL1IaBVQGPh9Zsuz/8vDCmgyxx4zp6t5TtxMuFg9fpwxjl+9giIw9FRZg iILPEC10Cmgp8fGP+wP9kMzA8EPIEQV40T18/qW6RtOIMBufe8v1ch1dxlleQ1+IJ+Q1bbdGWm/PYlUhLj2kG0uiSt0EvS5Jekxww1sUO8Zb41tswkQoNtdS WlL+tfKlOyi6PAjm7tEmBNOXBo+MpSwHB3EibzcI7xndMGB5gov4OMiapfCCqf7M X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean On reset, the RTC loads the 2000-01-01 date with a wrong day of the week (Sunday instead of Saturday). Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/rtc/davinci.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 21e5234477..c7ce41bbf5 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -290,6 +290,7 @@ static int omap_rtc_remove(struct udevice *dev) static int omap_rtc_probe(struct udevice *dev) { struct omap_rtc_priv *priv = dev_get_priv(dev); + struct rtc_time tm; u8 reg, mask, new_ctrl; priv->dev = dev; @@ -380,6 +381,15 @@ static int omap_rtc_probe(struct udevice *dev) } omap_rtc_lock(priv); + + if (omap_rtc_get(dev, &tm)) { + dev_err(dev, "failed to get datetime\n"); + } else if (tm.tm_year == 2000 && tm.tm_mon == 1 && tm.tm_mday == 1 && + tm.tm_wday == 0) { + tm.tm_wday = 6; + omap_rtc_set(dev, &tm); + } + return 0; }