From patchwork Mon Jan 22 10:48:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 864207 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-471781-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="OQWx5RcV"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zQ7Sz5v7tz9sDB for ; Mon, 22 Jan 2018 21:48:34 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=Y++eY14Z8b7xICKGpeiwLHkZeothv4zhBaTiflW9QgcAfn A24IdT27k2A5yu4z5e2mUQSgEnSp9n8hcdP4IL8VugJiAiC1JhF1jiauEsOG20SW oMdK3naELzNaAhf+ArLaJfqDVCk/FoXJS6CtrAJLKIw2NDStwP2/IHHr6zKyc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=3C4DnP8m4OvTwD3r4xtGrdBVPiY=; b=OQWx5RcV1DGZduVz6s94 R/TR4ml75gzD4Lsb03h6hZUvH+mb1w7SpGQrkwB0JlVM/kyUmEKHot36Ch+oh6Bi LZ59m3qT9r3Daljo8P1T8CDSQ/zGPHD5YEeJC4n6G5DQopQz3le/W75w/6Y43Vy9 /i/qkBASDTIbcAAT4IN9etE= Received: (qmail 70029 invoked by alias); 22 Jan 2018 10:48:26 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 69940 invoked by uid 89); 22 Jan 2018 10:48:16 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 22 Jan 2018 10:48:14 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9D2E91529 for ; Mon, 22 Jan 2018 02:48:04 -0800 (PST) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3F8C73F53D for ; Mon, 22 Jan 2018 02:48:04 -0800 (PST) Message-ID: <5A65C162.7020205@foss.arm.com> Date: Mon, 22 Jan 2018 10:48:02 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH][arm] Make gcc.target/arm/copysign_softfloat_1.c more robust Hi all, This test has needlessly restrictive requirements. It tries to force a soft-float target and tries to run. This makes it unsupportable for any non-soft-float variant. In fact, the test can be a run-time test for any target, and only the scan-assembler tests are specific to -mfloat-abi=soft. So this patch makes the test always runnable and makes the scan-assembler checks predicable on the the new arm_sotftfloat effective target check. Committing to trunk. Thanks, Kyrill 2018-01-22 Kyrylo Tkachov * doc/sourcebuild.texi (arm_softfloat): Document. 2018-01-22 Kyrylo Tkachov * lib/target-supports.exp (check_effective_target_arm_softfloat): New procedure. * gcc.target/arm/copysign_softfloat_1.c: Allow running everywhere. Adjust scan-assembler checks for soft-float. diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index f0233c9cca4ca32248db407bf00fb4c97eb740b1..69fbf6ac76842ae90fcf4f07638755c18ecc23c9 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1650,6 +1650,10 @@ ARM target adheres to the VFP and Advanced SIMD Register Arguments variant of the ABI for the ARM Architecture (as selected with @code{-mfloat-abi=hard}). +@item arm_softfloat +ARM target uses the soft-float ABI with no floating-point instructions +used whatsoever (as selected with @code{-mfloat-abi=soft}). + @item arm_hard_vfp_ok ARM target supports @code{-mfpu=vfp -mfloat-abi=hard}. Some multilibs may be incompatible with these options. diff --git a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c index d79d014e27cf445cd741504c6b256a3a51ace6cd..fdbeeadc01e1c9b9a7810a8ff8b23c58f6c429a5 100644 --- a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c +++ b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c @@ -1,8 +1,8 @@ /* { dg-do run } */ /* { dg-require-effective-target arm_thumb2_ok } */ -/* { dg-require-effective-target arm_soft_ok } */ -/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=softfp" "-mfloat-abi=hard" } { "" } } */ -/* { dg-options "-O2 -mfloat-abi=soft --save-temps" } */ +/* { dg-add-options arm_arch_v6t2 } */ +/* { dg-additional-options "-O2 --save-temps" } */ + extern void abort (void); #define N 16 @@ -42,8 +42,8 @@ main (int argc, char **argv) { int index = 0; -/* { dg-final { scan-assembler-times "bfi" 2 } } */ -/* { dg-final { scan-assembler-times "lsr" 1 } } */ +/* { dg-final { scan-assembler-times "bfi" 2 { target arm_softfloat } } } */ +/* { dg-final { scan-assembler-times "lsr" 1 { target arm_softfloat } } } */ for (index; index < N; index++) { if (__builtin_copysignf (a_f[index], b_f[index]) != c_f[index]) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 4095f6386b19d601ffd345922b14e015565a2462..50ec1adbf8158b5f29130d3919fcd86de8be5248 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -4879,6 +4879,19 @@ proc check_effective_target_arm_hf_eabi { } { }] } +# Return 1 if this is an ARM target that uses the soft float ABI +# with no floating-point instructions at all (e.g. -mfloat-abi=soft). + +proc check_effective_target_arm_softfloat { } { + return [check_no_compiler_messages arm_softfloat object { + #if !defined(__SOFTFP__) + #error not soft-float EABI + #else + int dummy; + #endif + }] +} + # Return 1 if this is an ARM target supporting -mcpu=iwmmxt. # Some multilibs may be incompatible with this option.