From patchwork Fri May 7 04:15:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1475343 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=A1ZPXSks; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FbxvH18sLz9sPf for ; Fri, 7 May 2021 14:15:39 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BAB8E82E22; Fri, 7 May 2021 06:15:27 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.b="A1ZPXSks"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C589782E30; Fri, 7 May 2021 06:15:25 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from libero.it (smtp-35.italiaonline.it [213.209.10.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2102982E23 for ; Fri, 7 May 2021 06:15:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([95.244.94.151]) by smtp-35.iol.local with ESMTPA id ertQlaHiGpK9wertYldZMc; Fri, 07 May 2021 06:15:20 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1620360920; bh=htPBPr+NkGbUzrOh4ThahXw3eSXnPsxwoX2dxKxbC8E=; h=From; b=A1ZPXSksUE8I4sWn944XQB4jWPgFHlr77VKtjGjbKyo0QYx5dtSS7TNdQ4KqkQ4xL yefmFrRiTmBLzZTYV0LC1xjVFcgktZSrr0aOTqORxjoHbK31v322MtGEdUX6F4rgFq tEuM7AeyLJg2gEUudgso2rBVeRxTCpaiITCB1l7XL7PHsb9e5DP5fRMvSM7sRmdEqm +8/lIvlUOXm7/m21XqQ/z9XleJ9WVWOCS80dcKnfG+lu32/MyKoa2nE5Ii3JXk3M+v PmFoajbDvzbBLHIIGvStZuZJCalGuYSd/TSYrCzY840seYPjOnZFy07KZ6R7Ik4uQA PiXCx4KgDHrGA== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=6094bed8 cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=Tci6CQpCD_bukzXGx2cA:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Heiko Schocher , Heinrich Schuchardt , Lokesh Vutla , =?utf-8?q?Marek_Beh=C3=BAn?= , =?utf-8?q?Pali_Roh=C3=A1?= =?utf-8?q?r?= , Stefan Roese , "Ying-Chun Liu (PaulLiu)" Subject: [PATCH 1/7] rtc: davinci: enable compilation for omap architectures Date: Fri, 7 May 2021 06:15:02 +0200 Message-Id: <20210507041509.4928-2-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507041509.4928-1-dariobin@libero.it> References: <20210507041509.4928-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfPOftqpebCluqoB3VAzIdSeDbW3uln+jwbqxxfAnBvD8GHl6hqgVXkmnqrVALGqsg8AUPB+SyBdzpWvhVx8vuBpZeZvNa2NJneK1T2jCu+xx2ucOvIAJ yLMoJ0cjTH/2oxte8n4x/5Bck/ct/t1CAnpn51vXS6E3TOTwJ7IjACyEf4dz4wMo76dTYruB9mWnNE2xFfy3WWfkeTWLZBnMbTFjIV/fAf9nVxfeee5eGC4O Ik0pGU35qxJxiilX5E5QYpNVbdjSFEzmplXzXuLN4GFnPHqEMGoSU9OEXkzeNzRj5dkeOz8+PBWURugINCIgt0ppiIqiZHeiQ/fRC+1dEFroAjrR8ETmRysj uquG8neQGpKCS0KeZXkuOv4JpiQ+CQhgZvOwBDCHj2yFlPDXZYWOJi+C6xRP7dP0AVqBGPBeyUxAxdcXafIqxb/Pfy5N2A== X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and DRA7XX SOCs. So, let's enable compilation for these architectures too. Signed-off-by: Dario Binacchi --- drivers/rtc/Kconfig | 7 +++++++ drivers/rtc/davinci.c | 11 ++++++++--- 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index c84a9d2b27..cbdfddb80f 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -188,4 +188,11 @@ config RTC_ABX80X families of ultra-low-power battery- and capacitor-backed real-time clock chips. +config RTC_DAVINCI + bool "Enable TI OMAP RTC driver" + depends on ARCH_DAVINCI || ARCH_OMAP2PLUS + help + Say "yes" here to support the on chip real time clock + present on TI OMAP1, AM33xx, DA8xx/OMAP-L13x, AM43xx and DRA7xx. + endmenu diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index c446e7a735..8f5f76c9d6 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -9,11 +9,16 @@ #include #include #include +#include #include +#if !defined(RTC_BASE) && defined(DAVINCI_RTC_BASE) +#define RTC_BASE DAVINCI_RTC_BASE +#endif + int rtc_get(struct rtc_time *tmp) { - struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; unsigned long sec, min, hour, mday, wday, mon_cent, year; unsigned long status; @@ -57,7 +62,7 @@ int rtc_get(struct rtc_time *tmp) int rtc_set(struct rtc_time *tmp) { - struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, @@ -75,7 +80,7 @@ int rtc_set(struct rtc_time *tmp) void rtc_reset(void) { - struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; /* run RTC counter */ writel(0x01, &rtc->ctrl); From patchwork Fri May 7 04:15:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1475344 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.b="BeKyfvt0"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id DE46382D68; Fri, 7 May 2021 06:15:25 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from libero.it (smtp-35.italiaonline.it [213.209.10.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 261A482E22 for ; Fri, 7 May 2021 06:15:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([95.244.94.151]) by smtp-35.iol.local with ESMTPA id ertQlaHiGpK9wertYldZMp; Fri, 07 May 2021 06:15:21 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1620360921; bh=UFwCP6NajV/cLWu72U22ExTSlzGGIRPK3CuoJRT5gak=; h=From; b=BeKyfvt0kkxKQdPYqX0281U4ykd3Ti+K/ATEdFLCYQgJUFq1yJ4dtNjqz6FOOlofJ +y6eP8Wc+ZqR68y1wLyi8DaMRITBWJL+TF9R/nrOW7hYwkzxpI0e24h8L6537wKa+3 k57F5XAnlKZ0QpARZFEqjB12nlc7pCWF2RUGkG3qZUB93zyTikeC4hllnLWqjUmnB+ YfcsmB0nClv4WAAgj3uzthO06OWyLqLwdCvS1bmeSH9IxVZ2BvQ4S97pEg0qmEqiBg WQKJYMqmj7ka4S7z/cAJRtaDdAwK4TAiwVXvUqRMEqXL7dNRkFz2EHdPgDqDvPjaf8 bRrPk4PSWlDmw== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=6094bed9 cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=f3zYWjciisRAOMF2TB8A:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH 2/7] rtc: davinci: replace 32bit access with 8bit access Date: Fri, 7 May 2021 06:15:03 +0200 Message-Id: <20210507041509.4928-3-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507041509.4928-1-dariobin@libero.it> References: <20210507041509.4928-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfHyLgJzET94zpoLpOUiAAoojjQbOWo7aNEhpQ/yf2vx930RWm4Sr0cqlXCxh9dFF76CL7cepPm4UgKUUdbpZhu7Lj1VfVqFL0s8utBgfUFn2kVFiTrp4 csKdP0iYV6NEGJENGPWkWbq6Dghfgtf4tRZKvR30zFHKC7nTFbFHxHSUFu3V2VZckyZTBbdWRdUDnIl1dBWqW8pqUu3ciRnbZ8xq1lLyZ1dcf+btkapLM4G5 DCnxgSJKVQ2U3TzCc8OFK+qxYB95akUEAHG1+vgdVTkny5sw0UB2HFDzgwaeFcp1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Use 32-bit access only where it is needed. Most of the RTC registers contain useful information in the 8 least significant bits, the others are reserved. Signed-off-by: Dario Binacchi --- drivers/rtc/davinci.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 8f5f76c9d6..99ae31e2a5 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -22,7 +22,7 @@ int rtc_get(struct rtc_time *tmp) unsigned long sec, min, hour, mday, wday, mon_cent, year; unsigned long status; - status = readl(&rtc->status); + status = readb(&rtc->status); if ((status & RTC_STATE_RUN) != RTC_STATE_RUN) { printf("RTC doesn't run\n"); return -1; @@ -30,13 +30,13 @@ int rtc_get(struct rtc_time *tmp) if ((status & RTC_STATE_BUSY) == RTC_STATE_BUSY) udelay(20); - sec = readl(&rtc->second); - min = readl(&rtc->minutes); - hour = readl(&rtc->hours); - mday = readl(&rtc->day); - wday = readl(&rtc->dotw); - mon_cent = readl(&rtc->month); - year = readl(&rtc->year); + sec = readb(&rtc->second); + min = readb(&rtc->minutes); + hour = readb(&rtc->hours); + mday = readb(&rtc->day); + wday = readb(&rtc->dotw); + mon_cent = readb(&rtc->month); + year = readb(&rtc->year); debug("Get RTC year: %02lx mon/cent: %02lx mday: %02lx wday: %02lx " "hr: %02lx min: %02lx sec: %02lx\n", @@ -67,14 +67,14 @@ int rtc_set(struct rtc_time *tmp) debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); - writel(bin2bcd(tmp->tm_year % 100), &rtc->year); - writel(bin2bcd(tmp->tm_mon), &rtc->month); + writeb(bin2bcd(tmp->tm_year % 100), &rtc->year); + writeb(bin2bcd(tmp->tm_mon), &rtc->month); - writel(bin2bcd(tmp->tm_wday), &rtc->dotw); - writel(bin2bcd(tmp->tm_mday), &rtc->day); - writel(bin2bcd(tmp->tm_hour), &rtc->hours); - writel(bin2bcd(tmp->tm_min), &rtc->minutes); - writel(bin2bcd(tmp->tm_sec), &rtc->second); + writeb(bin2bcd(tmp->tm_wday), &rtc->dotw); + writeb(bin2bcd(tmp->tm_mday), &rtc->day); + writeb(bin2bcd(tmp->tm_hour), &rtc->hours); + writeb(bin2bcd(tmp->tm_min), &rtc->minutes); + writeb(bin2bcd(tmp->tm_sec), &rtc->second); return 0; } @@ -83,5 +83,5 @@ void rtc_reset(void) struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; /* run RTC counter */ - writel(0x01, &rtc->ctrl); + writeb(0x01, &rtc->ctrl); } From patchwork Fri May 7 04:15:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1475345 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=ZzqiAhD/; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Fbxvg38TCz9sPf for ; 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Fri, 7 May 2021 06:15:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([95.244.94.151]) by smtp-35.iol.local with ESMTPA id ertQlaHiGpK9wertZldZMv; Fri, 07 May 2021 06:15:21 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1620360921; bh=NihdqoWtiBaH3uqdpuYWyAwlJhczkWS/wRJ6DyuNzz8=; h=From; b=ZzqiAhD/f36p9wrfwKe5Pmni9j9l7ebfxeVnWp6ndxB5AorIun3ueP/W09g3sX11W B/yCh6DsJTf1fQTTO0X0ccA2DDYV7ExAWdaqjLrdrBPUxhyCd93GG3uVFK6pB69sIO bqyOUNSJ/mq+Pb2+CVFg6ZPih+4YAiBWSOLOn7uRvM+GoU0xaOZnjbVuI4zHmaGRfx JyRdk6RYqLaGDkRv/sOPVQOTFUqwBVwbm8zKxZ5aYd0isfW148u9TrHCssMYu+/M8s 1JlmPavzI7yXP/8MLwP3mXHkxBRhqtUU66/f17rvsPg5A6e6D/EqkG8fhZOMPVJWfa oulMOb5mjLxNg== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=6094bed9 cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=IkcTkHD0fZMA:10 a=t0WUzoDEHqVNwkio9KQA:9 a=QEXdDO2ut3YA:10 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH 3/7] rtc: davinci: check BUSY bit before set TC registers Date: Fri, 7 May 2021 06:15:04 +0200 Message-Id: <20210507041509.4928-4-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507041509.4928-1-dariobin@libero.it> References: <20210507041509.4928-1-dariobin@libero.it> MIME-Version: 1.0 X-CMAE-Envelope: MS4xfHyLgJzET94zpoLpOUiAAoojjQbOWo7aNEhpQ/yf2vx930RWm4Sr0cqlXCxh9dFF76CL7cepPm4UgKUUdbpZhu7Lj1VfVqFL0s8utBgfUFn2kVFiTrp4 csKdP0iYV6NEGJENGPWkWbq6Dghfgtf4tRZKvR30zFHKC7nTFbFHxHSUFu3V2VZckyZTBbdWRdUDnIl1dBWqW8pqUu3ciRnbZ8xq1lLyZ1dcf+btkapLM4G5 DCnxgSJKVQ2U3TzCc8OFK+qxYB95akUEAHG1+vgdVTkny5sw0UB2HFDzgwaeFcp1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean To write correct data to the TC registers, the STATUS register must be read until the BUSY bit is equal to zero. Once the BUSY flag is zero, there is a 15 μs access period in which the TC registers can be programmed. The rtc_wait_not_busy() has been inspired by the Kernel. Signed-off-by: Dario Binacchi --- drivers/rtc/davinci.c | 45 ++++++++++++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 9 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 99ae31e2a5..7b8c729f3b 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -16,19 +16,39 @@ #define RTC_BASE DAVINCI_RTC_BASE #endif -int rtc_get(struct rtc_time *tmp) +static int davinci_rtc_wait_not_busy(struct davinci_rtc *rtc) { - struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; - unsigned long sec, min, hour, mday, wday, mon_cent, year; - unsigned long status; + int count; + u8 status; status = readb(&rtc->status); if ((status & RTC_STATE_RUN) != RTC_STATE_RUN) { printf("RTC doesn't run\n"); return -1; } - if ((status & RTC_STATE_BUSY) == RTC_STATE_BUSY) - udelay(20); + + /* BUSY may stay active for 1/32768 second (~30 usec) */ + for (count = 0; count < 50; count++) { + if (!(status & RTC_STATE_BUSY)) + break; + + udelay(1); + status = readb(&rtc->status); + } + + /* now we have ~15 usec to read/write various registers */ + return 0; +} + +int rtc_get(struct rtc_time *tmp) +{ + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + unsigned long sec, min, hour, mday, wday, mon_cent, year; + int ret; + + ret = davinci_rtc_wait_not_busy(rtc); + if (ret) + return ret; sec = readb(&rtc->second); min = readb(&rtc->minutes); @@ -63,10 +83,12 @@ int rtc_get(struct rtc_time *tmp) int rtc_set(struct rtc_time *tmp) { struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + int ret; + + ret = davinci_rtc_wait_not_busy(rtc); + if (ret) + return ret; - debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", - tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, - tmp->tm_hour, tmp->tm_min, tmp->tm_sec); writeb(bin2bcd(tmp->tm_year % 100), &rtc->year); writeb(bin2bcd(tmp->tm_mon), &rtc->month); @@ -75,6 +97,11 @@ int rtc_set(struct rtc_time *tmp) writeb(bin2bcd(tmp->tm_hour), &rtc->hours); writeb(bin2bcd(tmp->tm_min), &rtc->minutes); writeb(bin2bcd(tmp->tm_sec), &rtc->second); + + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + return 0; } From patchwork Fri May 7 04:15:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1475346 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=QAbY92du; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4Fbxvt4SpFz9sXV for ; Fri, 7 May 2021 14:16:10 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 937CB82E3C; Fri, 7 May 2021 06:15:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.b="QAbY92du"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 6397082E2F; Fri, 7 May 2021 06:15:28 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from libero.it (smtp-35.italiaonline.it [213.209.10.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E402C82E25 for ; Fri, 7 May 2021 06:15:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([95.244.94.151]) by smtp-35.iol.local with ESMTPA id ertQlaHiGpK9wertZldZMy; Fri, 07 May 2021 06:15:21 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1620360921; bh=f4EbYg8qAXxcYD+15hZ2rJ5g/YBCTL2jghTSAGzYb4Y=; h=From; b=QAbY92duucRhgred35eaAOE0mAdAJKiZfJkrWLf3p2Wg6MmWERlxKvTkZalNzLGdM DoYXiUS3oyCqPQXdXtHfReFqQbxnEHqYv5UUmThifB7lR9vp9qDm5wdiyQXCiVeQzm G8YBN3TIjAH7SGWmo9o573ZViCIYp43ttu3ehsIi5nAG13Da3UunfWN3Ydsw1Gupex IdZrhMY9PVREt7QHLTigzenDsxphEBuGI6sBwjL4/gWBCSxjETbAKmXxkQsrpfR8BY tDoqyA35frRTkGxEwlCSL06k4FjcMZmCibu1pohG71aKZrFzZjUW4PdEPDdArA1nCP jwwZvzCEDE9KA== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=6094bed9 cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=RAYcp3480LDP6k6qtFIA:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH 4/7] rtc: davinci: use unlock/lock mechanism Date: Fri, 7 May 2021 06:15:05 +0200 Message-Id: <20210507041509.4928-5-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507041509.4928-1-dariobin@libero.it> References: <20210507041509.4928-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfHyLgJzET94zpoLpOUiAAoojjQbOWo7aNEhpQ/yf2vx930RWm4Sr0cqlXCxh9dFF76CL7cepPm4UgKUUdbpZhu7Lj1VfVqFL0s8utBgfUFn2kVFiTrp4 csKdP0iYV6NEGJENGPWkWbq6Dghfgtf4tRZKvR30zFHKC7nTFbFHxHSUFu3V2VZckyZTBbdWRdUDnIl1dBWqW8pqUu3ciRnbZ8xq1lLyZ1dcf+btkapLM4G5 DCnxgSJKVQ2U3TzCc8OFK+qxYB95akUEAHG1+vgdVTkny5sw0UB2HFDzgwaeFcp1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean The RTC module contains a kicker mechanism to prevent any spurious writes from changing the register values. To set the time, you must first unlock the TC registers, update them and then lock. Signed-off-by: Dario Binacchi --- drivers/rtc/davinci.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 7b8c729f3b..82e5eb3b43 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -16,6 +16,18 @@ #define RTC_BASE DAVINCI_RTC_BASE #endif +static void davinci_rtc_lock(struct davinci_rtc *rtc) +{ + writel(0, &rtc->kick0r); + writel(0, &rtc->kick1r); +} + +static void davinci_rtc_unlock(struct davinci_rtc *rtc) +{ + writel(RTC_KICK0R_WE, &rtc->kick0r); + writel(RTC_KICK1R_WE, &rtc->kick1r); +} + static int davinci_rtc_wait_not_busy(struct davinci_rtc *rtc) { int count; @@ -89,6 +101,7 @@ int rtc_set(struct rtc_time *tmp) if (ret) return ret; + davinci_rtc_unlock(rtc); writeb(bin2bcd(tmp->tm_year % 100), &rtc->year); writeb(bin2bcd(tmp->tm_mon), &rtc->month); @@ -97,6 +110,7 @@ int rtc_set(struct rtc_time *tmp) writeb(bin2bcd(tmp->tm_hour), &rtc->hours); writeb(bin2bcd(tmp->tm_min), &rtc->minutes); writeb(bin2bcd(tmp->tm_sec), &rtc->second); + davinci_rtc_lock(rtc); debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, From patchwork Fri May 7 04:15:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1475348 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=libero.it header.i=@libero.it header.a=rsa-sha256 header.s=s2021 header.b=wLbcCMgE; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FbxwJ2MTlz9sPf for ; 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Fri, 7 May 2021 06:15:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=libero.it Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=dariobin@libero.it Received: from passgat-Modern-14-A10M.homenet.telecomitalia.it ([95.244.94.151]) by smtp-35.iol.local with ESMTPA id ertQlaHiGpK9wertaldZN3; Fri, 07 May 2021 06:15:22 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1620360922; bh=H9pkIjxdY32YqXySzr/cO7DtZeR+t7hZQfTE+DhjOp4=; h=From; b=wLbcCMgEqGE/8xX4Oxyb2+z7ot+s4NICNAiiTdfnXxrfR96m+AxLjYf73jYxEeA2v Gi9ugW+6Q2Vc3j3OspIgfU/BQzq9LIDcSIhR/q8glUOCDdqvN/k+ucpygpIyF7L6yU W9Seqhw9LyxVgDNsJcGrIED7FQwBlvB12GXRaDOmx56BSosnj7ArBMiFGmIOokKBVK dO7cZ5CTjCWMVticSjKOD6ER0YX5/MZW5iq5sGyd7UXAZLKkihmdkN9jTRHmrJ8/CG 68Pd7j489kEo1BRYCbx8weSiDw7vaQ02ibL2C6aFDcw70o2kJgHsmndBn0VET2PCQT N4fEn3lH31C5w== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=6094beda cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=_KLRL7pzE3_qBKClGDYA:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Tom Rini Subject: [PATCH 5/7] arm: dts: sync rtc node of am335x boards with Linux 5.9-rc7 Date: Fri, 7 May 2021 06:15:06 +0200 Message-Id: <20210507041509.4928-6-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507041509.4928-1-dariobin@libero.it> References: <20210507041509.4928-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfFQbD3GAoM0vmFh9Bkyn8+7sjYG0c8rVBkY6U/gnOdmM+tcfrkJ9bFN2Jrb9sDnVesq8OfTi9TySqFNYMw3RYpE1+fJM0rNE55SG2AE6gt5jHZb0xZXI Vi+ogtp0OzwPQrng4tAv6vc/GjUPBVG5G77LhSHiNONjn/FXL/4x7T8oPWkEGJd7xafVam3rOgiJDZCiUvMVidXFVtq1bFGQD+lLEP9EQqIWxUpr8oOcEyl/ Ts7CfHM9zEMA4dDrExD+W1jZ3YmorhS+UDbVbhJMt21Ie6BBOx1zcr64PUFYCavf X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean There have been some changes to the am335x- DTs related to the rtc node, so let's re-syncs them with Linux. Signed-off-by: Dario Binacchi --- arch/arm/dts/am335x-bone-common.dtsi | 5 +++++ arch/arm/dts/am335x-evm.dts | 5 +++++ arch/arm/dts/am335x-evmsk.dts | 5 +++++ arch/arm/dts/am335x-osd335x-common.dtsi | 6 ++++++ 4 files changed, 21 insertions(+) diff --git a/arch/arm/dts/am335x-bone-common.dtsi b/arch/arm/dts/am335x-bone-common.dtsi index 5b8230e281..8dcfac3a5b 100644 --- a/arch/arm/dts/am335x-bone-common.dtsi +++ b/arch/arm/dts/am335x-bone-common.dtsi @@ -398,3 +398,8 @@ &sham { status = "okay"; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; +}; diff --git a/arch/arm/dts/am335x-evm.dts b/arch/arm/dts/am335x-evm.dts index c4bd1855f2..136f685bc5 100644 --- a/arch/arm/dts/am335x-evm.dts +++ b/arch/arm/dts/am335x-evm.dts @@ -783,3 +783,8 @@ pinctrl-names = "default"; pinctrl-0 = <&dcan1_pins_default>; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; +}; diff --git a/arch/arm/dts/am335x-evmsk.dts b/arch/arm/dts/am335x-evmsk.dts index c94c33b595..b14bf2ff1b 100644 --- a/arch/arm/dts/am335x-evmsk.dts +++ b/arch/arm/dts/am335x-evmsk.dts @@ -724,3 +724,8 @@ &lcdc { status = "okay"; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; +}; diff --git a/arch/arm/dts/am335x-osd335x-common.dtsi b/arch/arm/dts/am335x-osd335x-common.dtsi index f8ff473f94..2b55b7d0f9 100644 --- a/arch/arm/dts/am335x-osd335x-common.dtsi +++ b/arch/arm/dts/am335x-osd335x-common.dtsi @@ -122,3 +122,9 @@ &sham { status = "okay"; }; + +&rtc { + clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; + clock-names = "ext-clk", "int-clk"; + system-power-controller; +}; From patchwork Fri May 7 04:15:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1475349 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Fri, 07 May 2021 06:15:22 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1620360922; bh=JPtyu6qMCC2jXKN/14BbjcpiFn6vYU0Omt1hOhxnBNw=; h=From; b=KDti4PPauh6PePtblv9hWy8WTwmUsRP/x8t+hCuB6QtLPlHfThJH6flslfGsHqPBQ 1FvWCuMpZ7bFlRefujqubjD5o0cOcnJhGs3o8FEas7kdokrl7sJ5+HQ8OEA8BT4bTq GBEgitCApC2thyJFce83OOV3+rUUQKPQVxm8h+HW9fXV4KQSq/rvH+fmiiFiGLXGAZ 7kwTLGhv+Ui63AnXSreRKiMQVJUF7f0QnARXIAzbpetyMG9tkV3J8pswXqv3RGoVfJ fNrP4P6VR1t88KIUnbg7VjadmBcDiZcrCfT48v5W3KtgGqtEDKmzrUawFBVRoEe4lD eEBrq3urGovgg== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=6094beda cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=7OKNppJzErxNF3SiXq8A:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH 6/7] rtc: davinci: add driver model support Date: Fri, 7 May 2021 06:15:07 +0200 Message-Id: <20210507041509.4928-7-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507041509.4928-1-dariobin@libero.it> References: <20210507041509.4928-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfFQbD3GAoM0vmFh9Bkyn8+7sjYG0c8rVBkY6U/gnOdmM+tcfrkJ9bFN2Jrb9sDnVesq8OfTi9TySqFNYMw3RYpE1+fJM0rNE55SG2AE6gt5jHZb0xZXI Vi+ogtp0OzwPQrng4tAv6vc/GjUPBVG5G77LhSHiNONjn/FXL/4x7T8oPWkEGJd7xafVam3rOgiJDZCiUvMVidXFVtq1bFGQD+lLEP9EQqIWxUpr8oOcEyl/ ioxwlHSqs3BVYfmStEqkVq3LJi3VHVSrUZoeHr7/1c6hCoRRA4izKGLG/k/HwWkk X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean Update the driver to support the device tree and the driver model. The read / write helpers in rtc_ops allow access to scratch registers only. The offset parameter is added to the address of the scratch0 register. Signed-off-by: Dario Binacchi --- drivers/rtc/davinci.c | 373 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 363 insertions(+), 10 deletions(-) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 82e5eb3b43..b0a077cba7 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -2,20 +2,20 @@ /* * (C) Copyright 2011 DENX Software Engineering GmbH * Heiko Schocher + * Copyright (C) 2021 Dario Binacchi */ #include #include +#include +#include #include #include #include #include #include +#include #include -#if !defined(RTC_BASE) && defined(DAVINCI_RTC_BASE) -#define RTC_BASE DAVINCI_RTC_BASE -#endif - static void davinci_rtc_lock(struct davinci_rtc *rtc) { writel(0, &rtc->kick0r); @@ -52,9 +52,8 @@ static int davinci_rtc_wait_not_busy(struct davinci_rtc *rtc) return 0; } -int rtc_get(struct rtc_time *tmp) +static int davinci_rtc_get(struct davinci_rtc *rtc, struct rtc_time *tmp) { - struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; unsigned long sec, min, hour, mday, wday, mon_cent, year; int ret; @@ -92,9 +91,8 @@ int rtc_get(struct rtc_time *tmp) return 0; } -int rtc_set(struct rtc_time *tmp) +static int davinci_rtc_set(struct davinci_rtc *rtc, const struct rtc_time *tmp) { - struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; int ret; ret = davinci_rtc_wait_not_busy(rtc); @@ -119,10 +117,365 @@ int rtc_set(struct rtc_time *tmp) return 0; } +static void davinci_rtc_reset(struct davinci_rtc *rtc) +{ + /* run RTC counter */ + writeb(0x01, &rtc->ctrl); +} + +#if !CONFIG_IS_ENABLED(DM_RTC) + +#if !defined(RTC_BASE) && defined(DAVINCI_RTC_BASE) +#define RTC_BASE DAVINCI_RTC_BASE +#endif + +int rtc_get(struct rtc_time *tmp) +{ + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + + return davinci_rtc_get(rtc, tmp); +} + +int rtc_set(struct rtc_time *tmp) +{ + struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; + + return davinci_rtc_set(rtc, tmp); +} + void rtc_reset(void) { struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; - /* run RTC counter */ - writeb(0x01, &rtc->ctrl); + davinci_rtc_reset(rtc); +} + +#else /* CONFIG_DM_RTC */ + +#define OMAP_RTC_CTRL_REG 0x40 +#define OMAP_RTC_STATUS_REG 0x44 +#define OMAP_RTC_INTERRUPTS_REG 0x48 + +#define OMAP_RTC_OSC_REG 0x54 + +#define OMAP_RTC_SCRATCH0_REG 0x60 +#define OMAP_RTC_SCRATCH1_REG 0x64 +#define OMAP_RTC_SCRATCH2_REG 0x68 + +#define OMAP_RTC_KICK0_REG 0x6c +#define OMAP_RTC_KICK1_REG 0x70 + +#define OMAP_RTC_PMIC_REG 0x98 + +/* OMAP_RTC_CTRL_REG bit fields: */ +#define OMAP_RTC_CTRL_SPLIT BIT(7) +#define OMAP_RTC_CTRL_DISABLE BIT(6) +#define OMAP_RTC_CTRL_SET_32_COUNTER BIT(5) +#define OMAP_RTC_CTRL_TEST BIT(4) +#define OMAP_RTC_CTRL_MODE_12_24 BIT(3) +#define OMAP_RTC_CTRL_AUTO_COMP BIT(2) +#define OMAP_RTC_CTRL_ROUND_30S BIT(1) +#define OMAP_RTC_CTRL_STOP BIT(0) + +/* OMAP_RTC_STATUS_REG bit fields */ +#define OMAP_RTC_STATUS_POWER_UP BIT(7) +#define OMAP_RTC_STATUS_ALARM2 BIT(7) +#define OMAP_RTC_STATUS_ALARM BIT(6) +#define OMAP_RTC_STATUS_1D_EVENT BIT(5) +#define OMAP_RTC_STATUS_1H_EVENT BIT(4) +#define OMAP_RTC_STATUS_1M_EVENT BIT(3) +#define OMAP_RTC_STATUS_1S_EVENT BIT(2) +#define OMAP_RTC_STATUS_RUN BIT(1) +#define OMAP_RTC_STATUS_BUSY BIT(0) + +/* OMAP_RTC_OSC_REG bit fields */ +#define OMAP_RTC_OSC_32KCLK_EN BIT(6) +#define OMAP_RTC_OSC_SEL_32KCLK_SRC BIT(3) +#define OMAP_RTC_OSC_OSC32K_GZ_DISABLE BIT(4) + +struct omap_rtc_device_type { + bool has_32kclk_en; + bool has_irqwakeen; + bool has_pmic_mode; + bool has_power_up_reset; +}; + +struct omap_rtc_priv { + fdt_addr_t base; + u8 max_reg; + struct udevice *dev; + struct clk clk; + bool has_ext_clk; + const struct omap_rtc_device_type *type; +}; + +static inline u8 omap_rtc_readb(struct omap_rtc_priv *priv, unsigned int reg) +{ + return readb(priv->base + reg); +} + +static inline u32 omap_rtc_readl(struct omap_rtc_priv *priv, unsigned int reg) +{ + return readl(priv->base + reg); +} + +static inline void omap_rtc_writeb(struct omap_rtc_priv *priv, unsigned int reg, + u8 val) +{ + writeb(val, priv->base + reg); +} + +static inline void omap_rtc_writel(struct omap_rtc_priv *priv, unsigned int reg, + u32 val) +{ + writel(val, priv->base + reg); +} + +static inline void omap_rtc_unlock(struct omap_rtc_priv *priv) +{ + davinci_rtc_unlock((struct davinci_rtc *)priv->base); +} + +static inline void omap_rtc_lock(struct omap_rtc_priv *priv) +{ + davinci_rtc_lock((struct davinci_rtc *)priv->base); +} + +static int omap_rtc_reset(struct udevice *dev) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + + davinci_rtc_reset((struct davinci_rtc *)priv->base); + return 0; +} + +static int omap_rtc_set(struct udevice *dev, const struct rtc_time *tm) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + + return davinci_rtc_set((struct davinci_rtc *)priv->base, tm); } + +static int omap_rtc_get(struct udevice *dev, struct rtc_time *tm) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + + return davinci_rtc_get((struct davinci_rtc *)priv->base, tm); +} + +static int omap_rtc_scratch_read(struct udevice *dev, uint offset, + u8 *buffer, uint len) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + u32 *val = (u32 *)buffer; + unsigned int reg; + int i; + + if (len & 3) + return -EFAULT; + + for (i = 0; i < len / 4; i++) { + reg = OMAP_RTC_SCRATCH0_REG + offset + (i * 4); + if (reg >= OMAP_RTC_KICK0_REG) + return -EFAULT; + + val[i] = omap_rtc_readl(priv, reg); + } + + return 0; +} + +static int omap_rtc_scratch_write(struct udevice *dev, uint offset, + const u8 *buffer, uint len) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + u32 *val = (u32 *)buffer; + unsigned int reg; + int i; + + if (len & 3) + return -EFAULT; + + omap_rtc_unlock(priv); + for (i = 0; i < len / 4; i++) { + reg = OMAP_RTC_SCRATCH0_REG + offset + (i * 4); + if (reg >= OMAP_RTC_KICK0_REG) + return -EFAULT; + + omap_rtc_writel(priv, reg, val[i]); + } + omap_rtc_lock(priv); + + return 0; +} + +static int omap_rtc_remove(struct udevice *dev) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + u8 reg; + + if (priv->clk.dev) + clk_disable(&priv->clk); + + omap_rtc_unlock(priv); + + /* leave rtc running, but disable irqs */ + omap_rtc_writeb(priv, OMAP_RTC_INTERRUPTS_REG, 0); + + if (priv->has_ext_clk) { + reg = omap_rtc_readb(priv, OMAP_RTC_OSC_REG); + reg &= ~OMAP_RTC_OSC_SEL_32KCLK_SRC; + omap_rtc_writeb(priv, OMAP_RTC_OSC_REG, reg); + } + + omap_rtc_lock(priv); + return 0; +} + +static int omap_rtc_probe(struct udevice *dev) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + u8 reg, mask, new_ctrl; + + priv->dev = dev; + priv->type = (struct omap_rtc_device_type *)dev_get_driver_data(dev); + priv->max_reg = OMAP_RTC_PMIC_REG; + + if (!clk_get_by_name(dev, "ext-clk", &priv->clk)) + priv->has_ext_clk = true; + else + clk_get_by_name(dev, "int-clk", &priv->clk); + + if (priv->clk.dev) + clk_enable(&priv->clk); + else + dev_warn(dev, "missing clock\n"); + + omap_rtc_unlock(priv); + + /* + * disable interrupts + * + * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used + */ + omap_rtc_writel(priv, OMAP_RTC_INTERRUPTS_REG, 0); + + if (priv->type->has_32kclk_en) { + reg = omap_rtc_readb(priv, OMAP_RTC_OSC_REG); + omap_rtc_writeb(priv, OMAP_RTC_OSC_REG, + reg | OMAP_RTC_OSC_32KCLK_EN); + } + + /* clear old status */ + reg = omap_rtc_readb(priv, OMAP_RTC_STATUS_REG); + + mask = OMAP_RTC_STATUS_ALARM; + + if (priv->type->has_pmic_mode) + mask |= OMAP_RTC_STATUS_ALARM2; + + if (priv->type->has_power_up_reset) { + mask |= OMAP_RTC_STATUS_POWER_UP; + if (reg & OMAP_RTC_STATUS_POWER_UP) + dev_info(dev, "RTC power up reset detected\n"); + } + + if (reg & mask) + omap_rtc_writeb(priv, OMAP_RTC_STATUS_REG, reg & mask); + + /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ + reg = omap_rtc_readb(priv, OMAP_RTC_CTRL_REG); + if (reg & OMAP_RTC_CTRL_STOP) + dev_info(dev, "already running\n"); + + /* force to 24 hour mode */ + new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT | OMAP_RTC_CTRL_AUTO_COMP); + new_ctrl |= OMAP_RTC_CTRL_STOP; + + /* + * BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: + * + * - Device wake-up capability setting should come through chip + * init logic. OMAP1 boards should initialize the "wakeup capable" + * flag in the platform device if the board is wired right for + * being woken up by RTC alarm. For OMAP-L138, this capability + * is built into the SoC by the "Deep Sleep" capability. + * + * - Boards wired so RTC_ON_nOFF is used as the reset signal, + * rather than nPWRON_RESET, should forcibly enable split + * power mode. (Some chip errata report that RTC_CTRL_SPLIT + * is write-only, and always reads as zero...) + */ + + if (new_ctrl & OMAP_RTC_CTRL_SPLIT) + dev_info(dev, "split power mode\n"); + + if (reg != new_ctrl) + omap_rtc_writeb(priv, OMAP_RTC_CTRL_REG, new_ctrl); + + /* + * If we have the external clock then switch to it so we can keep + * ticking across suspend. + */ + if (priv->has_ext_clk) { + reg = omap_rtc_readb(priv, OMAP_RTC_OSC_REG); + reg &= ~OMAP_RTC_OSC_OSC32K_GZ_DISABLE; + reg |= OMAP_RTC_OSC_32KCLK_EN | OMAP_RTC_OSC_SEL_32KCLK_SRC; + omap_rtc_writeb(priv, OMAP_RTC_OSC_REG, reg); + } + + omap_rtc_lock(priv); + return 0; +} + +static int omap_rtc_of_to_plat(struct udevice *dev) +{ + struct omap_rtc_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr(dev); + if (priv->base == FDT_ADDR_T_NONE) { + dev_err(dev, "invalid address\n"); + return -EINVAL; + } + + dev_dbg(dev, "base=%pa\n", &priv->base); + return 0; +} + +static const struct rtc_ops omap_rtc_ops = { + .get = omap_rtc_get, + .set = omap_rtc_set, + .reset = omap_rtc_reset, + .read = omap_rtc_scratch_read, + .write = omap_rtc_scratch_write, +}; + +static const struct omap_rtc_device_type omap_rtc_am3352_type = { + .has_32kclk_en = true, + .has_irqwakeen = true, + .has_pmic_mode = true, +}; + +static const struct omap_rtc_device_type omap_rtc_da830_type = { + .has_32kclk_en = false, + .has_irqwakeen = false, + .has_pmic_mode = false, +}; + +static const struct udevice_id omap_rtc_ids[] = { + {.compatible = "ti,am3352-rtc", .data = (ulong)&omap_rtc_am3352_type}, + {.compatible = "ti,da830-rtc", .data = (ulong)&omap_rtc_da830_type } +}; + +U_BOOT_DRIVER(omap_rtc) = { + .name = "omap_rtc", + .id = UCLASS_RTC, + .of_match = omap_rtc_ids, + .ops = &omap_rtc_ops, + .of_to_plat = omap_rtc_of_to_plat, + .probe = omap_rtc_probe, + .remove = omap_rtc_remove, + .priv_auto = sizeof(struct omap_rtc_priv), +}; + +#endif /* CONFIG_DM_RTC */ From patchwork Fri May 7 04:15:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 1475347 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Fri, 07 May 2021 06:15:23 +0200 x-libjamoibt: 1601 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=libero.it; s=s2021; t=1620360923; bh=XWK5rQUQGA4upHtD0VW2WyFr+4FSjeLSFJrZaQjsXAc=; h=From; b=HdB1ozSyjFN8VR8sIYGvxyhd2TDtwezfgPhC86YnxsKP0Gol/dfk0nDki3mom3C/M WIfI6tgwO+V/J7Z/Sv+MBj5rA3njTdgHwiDZD2WTSHYqIpeMVSRSg3lbta1rK4ohMz RupjoHuSkgzUGi46QKtdurxvaEapdTrkS3IriAStwNng7yR+0e+xFvLfatF99C2UY+ TPcn/IvA/sYrydjYy7PlpAM2NYE/mjSUEYs/e448+q0P00AKHsKYgCLnD3Xw7j7vjh EX4aw/u9rAndmy0YyMKUGNPSybTEtsenlK2EG/hA4FfpNH+vhOxe3n/4Q9OXUHrRtV BK9hKJqT0D+kA== X-CNFS-Analysis: v=2.4 cv=A9ipg4aG c=1 sm=1 tr=0 ts=6094bedb cx=a_exe a=ugxisoNCKEotYwafST++Mw==:117 a=ugxisoNCKEotYwafST++Mw==:17 a=prFL4SO8xRJx28DiWS8A:9 From: Dario Binacchi To: u-boot@lists.denx.de Cc: Dario Binacchi , Lokesh Vutla Subject: [PATCH 7/7] rtc: davinci: fix date loaded on reset Date: Fri, 7 May 2021 06:15:08 +0200 Message-Id: <20210507041509.4928-8-dariobin@libero.it> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210507041509.4928-1-dariobin@libero.it> References: <20210507041509.4928-1-dariobin@libero.it> X-CMAE-Envelope: MS4xfDNUtYRdv+QLZOykshSTEvjrkuEukKFqt3S7BjfUWT6uOEUJC357xkJamh4PcP9616pUlNBekx4/e/aF8JSnY8Iqs6ZLRxRNno0pF+Tn1XZTyAfBVq9+ dUTGyZBYSmUSRezh9CeImSNMYCjsPxJKzNb5tScHDT+ABYQuQaz0OB25fSo+qKrFNtMC15ax12H00ucIftCwcU1K6Gu5NZ9ZjStlJJgSi4HQd07UxLKYtV2B r3q5Iy7byxMayDY6tijeTVTYfJFwj9tv25HbrQ0bjkTUEhZjv1F0wnkCAZawx8IE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de X-Virus-Status: Clean On reset, the RTC loads the 2000-01-01 date with a wrong day of the week (Sunday instead of Saturday). Signed-off-by: Dario Binacchi --- drivers/rtc/davinci.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index b0a077cba7..88fd56b1ba 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -335,6 +335,7 @@ static int omap_rtc_remove(struct udevice *dev) static int omap_rtc_probe(struct udevice *dev) { struct omap_rtc_priv *priv = dev_get_priv(dev); + struct rtc_time tm; u8 reg, mask, new_ctrl; priv->dev = dev; @@ -425,6 +426,15 @@ static int omap_rtc_probe(struct udevice *dev) } omap_rtc_lock(priv); + + if (omap_rtc_get(dev, &tm)) { + dev_err(dev, "failed to get datetime\n"); + } else if (tm.tm_year == 2000 && tm.tm_mon == 1 && tm.tm_mday == 1 && + tm.tm_wday == 0) { + tm.tm_wday = 6; + omap_rtc_set(dev, &tm); + } + return 0; }