From patchwork Thu Jan 18 09:15:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 862803 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-471563-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="oUk26CC+"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zMdfR02nVz9s7g for ; Thu, 18 Jan 2018 20:18:06 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; q= dns; s=default; b=k3z++tN9kQ8c/IKxLbf4fVKEfh2d5G4eXK5qpc7CablTt/ ROruIYdOujl91cMp8PZe0xwZN3xeGNb2rxInqgpaWI5zFdnPINMr/QEK1NysKizz iIXtXSjb96ybRsiuXy1mPcOHQvjv+wUAmKQqbHlBu9gF7Dnp+lxvok2vt/e00= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:content-type; s= default; bh=OY08JOG8GdTbK2xUGbEeQPKRWMs=; b=oUk26CC+Ir7sT5NqQdms 6JlmFgllQIZ6xf7cTHZQ9lrZq5ubG2HQqA7mEwItfsT2qifAULNaRsHliVEGHDD0 9tGDNU6HXBXU51/YiJZMCfsWPTHTrjpswRjYiLIjzDAOKdnY9imTjGCx8qqyfoF0 Qiody32H+bTcCKwDSD5c4kc= Received: (qmail 40591 invoked by alias); 18 Jan 2018 09:17:38 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 39646 invoked by uid 89); 18 Jan 2018 09:16:00 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=facilitate X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 18 Jan 2018 09:15:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 24E4A1529 for ; Thu, 18 Jan 2018 01:15:50 -0800 (PST) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A1C9C3F487 for ; Thu, 18 Jan 2018 01:15:49 -0800 (PST) Message-ID: <5A6065C3.4060609@foss.arm.com> Date: Thu, 18 Jan 2018 09:15:47 +0000 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" Subject: [PATCH][arm] PR target/65578: Fix builtin-bswap16-1.c and builtin-bswap-1.c Hi all, The builtin-bswap-1.c and builtin-bswap16-1.c are pretty annoying at the moment. They force an explicit armv6 option that is a thumb1 target, so if you're testing a toolchain configured with something like --with-cpu=cortex-a15 --with-float=hard --with-mode=thumb you'll get those pesky errors about Thumb1 hard-float not being implemented, even though the tests don't relate to floating-point functionality at all. I *think* this is also due to the wrong order of dg-options and dg-require-effective-target directives that might end up not doing a proper effective target check. The solution in this patch is to commonise the code and create a couple of tests for each. One tests an armv6t2 target. This allows us to test an ARM or a Thumb2 target. The second one sets an armv6-m target, which is a Thumb1 target. The dg-add-options machinery for arm_arch_v6m knows how to add the right -mfloat-abi=soft option. With this patch we end up testing all of ARM, Thumb1, Thumb2 codegen whereas before we only ever tried testing Thumb1, if the multilib options happened to line up just right, and would give an ugly error otherwise. Now, if the multilib options don't allow the test it should just appear as UNSUPPORTED. Committing to trunk. Thanks, Kyrill 2018-01-18 Kyrylo Tkachov PR target/65578 * gcc.target/arm/builtin-bswap.x: New file. * gcc.target/arm/builtin-bswap-1.c: Include the above. Add checks and options for armv6t2. * gcc.target/arm/builtin-bswap-2.c: Include the above. Add checks and options for Thumb1. * gcc.target/arm/builtin-bswap16.x: New file. * gcc.target/arm/builtin-bswap16-1.c: Include the above. Add checks and options for armv6t2. * gcc.target/arm/builtin-bswap16-2.c: Include the above. Add checks and options for Thumb1. diff --git a/gcc/testsuite/gcc.target/arm/builtin-bswap-1.c b/gcc/testsuite/gcc.target/arm/builtin-bswap-1.c index 43195bd8235b492a3c4783d88bf744ac92ee9f68..c1e7740d14d3ca4e93a71e38b12f82c19791a204 100644 --- a/gcc/testsuite/gcc.target/arm/builtin-bswap-1.c +++ b/gcc/testsuite/gcc.target/arm/builtin-bswap-1.c @@ -1,7 +1,9 @@ /* { dg-do compile } */ -/* { dg-options "-O2" } */ -/* { dg-require-effective-target arm_arch_v6_ok } */ -/* { dg-add-options arm_arch_v6 } */ +/* { dg-require-effective-target arm_arch_v6t2_ok } */ +/* { dg-add-options arm_arch_v6t2 } */ +/* This test depends on if-conversion creating the conditional forms of + of the instructions. Add an -mtune option known to facilitate that. */ +/* { dg-additional-options "-O2 -mtune=cortex-a53" } */ /* { dg-final { scan-assembler-not "orr\[ \t\]" } } */ /* { dg-final { scan-assembler-times "revsh\\t" 1 { target { arm_nothumb } } } } */ /* { dg-final { scan-assembler-times "revshne\\t" 1 { target { arm_nothumb } } } } */ @@ -13,69 +15,4 @@ /* { dg-final { scan-assembler-times "revne\\t" 2 { target { arm_nothumb } } } } */ /* { dg-final { scan-assembler-times "rev\\t" 4 { target { ! arm_nothumb } } } } */ -/* revsh */ -short swaps16 (short x) -{ - return __builtin_bswap16 (x); -} - -extern short foos16 (short); - -/* revshne */ -short swaps16_cond (short x, int y) -{ - short z = x; - if (y) - z = __builtin_bswap16 (x); - return foos16 (z); -} - -/* rev16 */ -unsigned short swapu16 (unsigned short x) -{ - return __builtin_bswap16 (x); -} - -extern unsigned short foou16 (unsigned short); - -/* rev16ne */ -unsigned short swapu16_cond (unsigned short x, int y) -{ - unsigned short z = x; - if (y) - z = __builtin_bswap16 (x); - return foou16 (z); -} - -/* rev */ -int swaps32 (int x) { - return __builtin_bswap32 (x); -} - -extern int foos32 (int); - -/* revne */ -int swaps32_cond (int x, int y) -{ - int z = x; - if (y) - z = __builtin_bswap32 (x); - return foos32 (z); -} - -/* rev */ -unsigned int swapu32 (unsigned int x) -{ - return __builtin_bswap32 (x); -} - -extern unsigned int foou32 (unsigned int); - -/* revne */ -unsigned int swapsu2 (unsigned int x, int y) -{ - int z = x; - if (y) - z = __builtin_bswap32 (x); - return foou32 (z); -} +#include "builtin-bswap.x" diff --git a/gcc/testsuite/gcc.target/arm/builtin-bswap-2.c b/gcc/testsuite/gcc.target/arm/builtin-bswap-2.c new file mode 100644 index 0000000000000000000000000000000000000000..4ba79aa322dc72b521dbff7e5f5ac3f77767988c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/builtin-bswap-2.c @@ -0,0 +1,10 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_arch_v6m_ok } */ +/* { dg-add-options arm_arch_v6m } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { scan-assembler-not "orr\[ \t\]" } } */ +/* { dg-final { scan-assembler-times "revsh\\t" 2 } } */ +/* { dg-final { scan-assembler-times "rev16\\t" 2 } } */ +/* { dg-final { scan-assembler-times "rev\\t" 4 } } */ + +#include "builtin-bswap.x" diff --git a/gcc/testsuite/gcc.target/arm/builtin-bswap.x b/gcc/testsuite/gcc.target/arm/builtin-bswap.x new file mode 100644 index 0000000000000000000000000000000000000000..c96dbe6329c4dc648fd0bcc972ad494c7d6dc6e5 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/builtin-bswap.x @@ -0,0 +1,66 @@ +/* revsh */ +short swaps16 (short x) +{ + return __builtin_bswap16 (x); +} + +extern short foos16 (short); + +/* revshne */ +short swaps16_cond (short x, int y) +{ + short z = x; + if (y) + z = __builtin_bswap16 (x); + return foos16 (z); +} + +/* rev16 */ +unsigned short swapu16 (unsigned short x) +{ + return __builtin_bswap16 (x); +} + +extern unsigned short foou16 (unsigned short); + +/* rev16ne */ +unsigned short swapu16_cond (unsigned short x, int y) +{ + unsigned short z = x; + if (y) + z = __builtin_bswap16 (x); + return foou16 (z); +} + +/* rev */ +int swaps32 (int x) { + return __builtin_bswap32 (x); +} + +extern int foos32 (int); + +/* revne */ +int swaps32_cond (int x, int y) +{ + int z = x; + if (y) + z = __builtin_bswap32 (x); + return foos32 (z); +} + +/* rev */ +unsigned int swapu32 (unsigned int x) +{ + return __builtin_bswap32 (x); +} + +extern unsigned int foou32 (unsigned int); + +/* revne */ +unsigned int swapsu2 (unsigned int x, int y) +{ + int z = x; + if (y) + z = __builtin_bswap32 (x); + return foou32 (z); +} diff --git a/gcc/testsuite/gcc.target/arm/builtin-bswap16-1.c b/gcc/testsuite/gcc.target/arm/builtin-bswap16-1.c index 6920f004eab42443441227029c579aeb2bb981ee..e08a38abcf27807a29bd1eca1844bb7e9a369dd7 100644 --- a/gcc/testsuite/gcc.target/arm/builtin-bswap16-1.c +++ b/gcc/testsuite/gcc.target/arm/builtin-bswap16-1.c @@ -1,15 +1,7 @@ /* { dg-do compile } */ -/* { dg-options "-O2" } */ -/* { dg-require-effective-target arm_arch_v6_ok } */ -/* { dg-add-options arm_arch_v6 } */ +/* { dg-require-effective-target arm_arch_v6t2_ok } */ +/* { dg-add-options arm_arch_v6t2 } */ +/* { dg-additional-options "-O2" } */ /* { dg-final { scan-assembler-not "orr\[ \t\]" } } */ -unsigned short swapu16_1 (unsigned short x) -{ - return (x << 8) | (x >> 8); -} - -unsigned short swapu16_2 (unsigned short x) -{ - return (x >> 8) | (x << 8); -} +#include "builtin-bswap16.x" diff --git a/gcc/testsuite/gcc.target/arm/builtin-bswap16-2.c b/gcc/testsuite/gcc.target/arm/builtin-bswap16-2.c new file mode 100644 index 0000000000000000000000000000000000000000..6b709a2887de45ded607d8eb076465e0ef5958de --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/builtin-bswap16-2.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_arch_v6m_ok } */ +/* { dg-add-options arm_arch_v6m } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { scan-assembler-not "orr\[ \t\]" } } */ + +#include "builtin-bswap16.x" diff --git a/gcc/testsuite/gcc.target/arm/builtin-bswap16.x b/gcc/testsuite/gcc.target/arm/builtin-bswap16.x new file mode 100644 index 0000000000000000000000000000000000000000..1e7f41edf013e353944f0a4879a1248c8a8b2f11 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/builtin-bswap16.x @@ -0,0 +1,9 @@ +unsigned short swapu16_1 (unsigned short x) +{ + return (x << 8) | (x >> 8); +} + +unsigned short swapu16_2 (unsigned short x) +{ + return (x >> 8) | (x << 8); +}