From patchwork Wed Jan 17 13:56:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 862277 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=vanguardiasur-com-ar.20150623.gappssmtp.com header.i=@vanguardiasur-com-ar.20150623.gappssmtp.com header.b="K2hMFnkH"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zM7w71YWtz9sNx for ; Thu, 18 Jan 2018 00:58:14 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id A6753C21E28; Wed, 17 Jan 2018 13:57:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 66FDAC21E0E; Wed, 17 Jan 2018 13:57:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 39888C21E0E; Wed, 17 Jan 2018 13:56:52 +0000 (UTC) Received: from mail-qt0-f194.google.com (mail-qt0-f194.google.com [209.85.216.194]) by lists.denx.de (Postfix) with ESMTPS id 609D6C21C3F for ; Wed, 17 Jan 2018 13:56:49 +0000 (UTC) Received: by mail-qt0-f194.google.com with SMTP id m59so22594680qte.11 for ; Wed, 17 Jan 2018 05:56:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vanguardiasur-com-ar.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/+2PMO5vEOT/fQVNN/abVp7C4EELATS1ZyJlRVQRDeQ=; b=K2hMFnkHrnebIxj9zmeelDIDkk8qhta/jGVslV18hEwMTxLYfCMw1fH1WJgS6lz4oF yUb7Wn9R9qQVnDBfbbG3JkSvuG7BES8ILnD6E5eQcLa1+CDWfAJX8or1ALWafWMu9K38 K2kbGGlCB7QONXbfbQfKmRZv99al3tD1607ZdVrvndX0frUl2zzoMEgXCkgYxJXMJ6rd dl6IYVkJ6Lfxq1s+zvloUfvHl9BS4nfbX4zeTrnqu31PpEHCogdkNyW/pr0W4mbWz1JN gZfkvQFgrlj9MapGEZfaVhmLQW/TBu+ZpF5QQs5mE7T5rbvY2WGxrhaP3OLkcgNiSJVF pixg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/+2PMO5vEOT/fQVNN/abVp7C4EELATS1ZyJlRVQRDeQ=; b=QktW5F54nTT667pSGvAFPq2cxMw/2MJDYwDDcZpQtyYI2oD0mlpp8LmJqGVpt9taI5 mMVGHTWAqJapkxggoGwu73Kq7AGguvE+zrZmvsBJ1+EtpX2R1rmSDwooqAKtWD1qAoW8 ALDlHTyJSzCiNryFyrf43Zst0UedmjkKDKOuyuQiT6dYw/3TqR/1UpxdOt+kNmGC+QiZ w9waFGWXvTx8aUqF2GVjPur2TATsAlWpuG8rvf+ewhhObs1g9zZzTHrNpBVeiLFeyE6t nbpSJ8aYTwMXUN2g7lG+4r80UVWN27pqgg+qLn6AM7g99fE6h/uneh6CkVbp4GZ3e0DA kErg== X-Gm-Message-State: AKwxytfRDu7jKMXPAxy3QerbwDngog4uHXLn/EtyahdNuLkqFQl85whG 151Byu03+IfxC+l8b1lajzqJbiK6 X-Google-Smtp-Source: ACJfBou0DcKx17L2UY+LttYCaVrNCvBm3icrvRYnJL/8YiiJLg00bOcdp3dYLgfVYKBLSyJHBiwOXQ== X-Received: by 10.237.41.225 with SMTP id o88mr21466350qtd.184.1516197408142; Wed, 17 Jan 2018 05:56:48 -0800 (PST) Received: from ezelaptop.fibertel.com.ar ([190.210.56.45]) by smtp.gmail.com with ESMTPSA id r2sm2871366qkb.54.2018.01.17.05.56.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Jan 2018 05:56:47 -0800 (PST) From: Ezequiel Garcia To: u-boot@lists.denx.de Date: Wed, 17 Jan 2018 10:56:22 -0300 Message-Id: <20180117135626.22498-2-ezequiel@vanguardiasur.com.ar> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> References: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> Cc: michal.simek@xilinx.com Subject: [U-Boot] [PATCH 1/5] zynq: Define macros for the device names X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This will allow to reuse the macros when showing the CPU info. Signed-off-by: Ezequiel Garcia --- include/zynqpl.h | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/include/zynqpl.h b/include/zynqpl.h index 5a34a17daefe..e10a266643bd 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -42,45 +42,57 @@ extern struct xilinx_fpga_op zynq_op; #define XILINX_XC7Z045_SIZE 106571232/8 #define XILINX_XC7Z100_SIZE 139330784/8 +/* Device Names */ +#define XILINX_XC7Z007S_NAME "7z007s" +#define XILINX_XC7Z010_NAME "7z010" +#define XILINX_XC7Z012S_NAME "7z012s" +#define XILINX_XC7Z014S_NAME "7z014s" +#define XILINX_XC7Z015_NAME "7z015" +#define XILINX_XC7Z020_NAME "7z020" +#define XILINX_XC7Z030_NAME "7z030" +#define XILINX_XC7Z035_NAME "7z035" +#define XILINX_XC7Z045_NAME "7z045" +#define XILINX_XC7Z100_NAME "7z100" + /* Descriptor Macros */ #define XILINX_XC7Z007S_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z007S_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z007s" } + XILINX_XC7Z007S_NAME } #define XILINX_XC7Z010_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z010" } + XILINX_XC7Z010_NAME } #define XILINX_XC7Z012S_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z012S_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z012s" } + XILINX_XC7Z012S_NAME } #define XILINX_XC7Z014S_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z014S_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z014s" } + XILINX_XC7Z014S_NAME } #define XILINX_XC7Z015_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z015" } + XILINX_XC7Z015_NAME } #define XILINX_XC7Z020_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z020" } + XILINX_XC7Z020_NAME } #define XILINX_XC7Z030_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z030" } + XILINX_XC7Z030_NAME } #define XILINX_XC7Z035_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z035_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z035" } + XILINX_XC7Z035_NAME } #define XILINX_XC7Z045_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z045" } + XILINX_XC7Z045_NAME } #define XILINX_XC7Z100_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \ - "7z100" } + XILINX_XC7Z100_NAME } #endif /* _ZYNQPL_H_ */ From patchwork Wed Jan 17 13:56:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 862276 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=vanguardiasur-com-ar.20150623.gappssmtp.com header.i=@vanguardiasur-com-ar.20150623.gappssmtp.com header.b="lY1zLriR"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zM7w40Y4kz9sNc for ; Thu, 18 Jan 2018 00:58:10 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 2A75DC21E18; Wed, 17 Jan 2018 13:57:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id DA33FC21E0E; Wed, 17 Jan 2018 13:57:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EE4D5C21DFA; Wed, 17 Jan 2018 13:56:55 +0000 (UTC) Received: from mail-qt0-f193.google.com (mail-qt0-f193.google.com [209.85.216.193]) by lists.denx.de (Postfix) with ESMTPS id DF50AC21E2F for ; Wed, 17 Jan 2018 13:56:51 +0000 (UTC) Received: by mail-qt0-f193.google.com with SMTP id d4so22597963qtj.5 for ; Wed, 17 Jan 2018 05:56:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vanguardiasur-com-ar.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HkbnaiTN7HX5icyqgpRbo2q1W1niXCJaWg2WAzHsQ1I=; b=lY1zLriRygvqnK/Y8ds/UHE55gwiI/zL2L2+d1u0O5WFv2Rt7smMYIwyOHUyY1fsuI 2g9LxE1oCTVqhh4/doMcwaMZbKGDh/b+KpLmhO/VPkBL+Twr0PH2n4ZY1hDXc5AGyZbV 2hDYXKceH2yCLW3FTnKws72o6olfWM+1Zq60yiZvcvEJd6xdvmxBeMtzufnWAhquMXrk c6R4cSl2saaQOOfTRSUf0xieoPXvbi85RiwZS3ilV2PG4Rtc/5jLoH/NfYSsUeDkczJE VJpJ1dwdVfYZ/KPp4FhXyfGjO2Fd3qMQYiVKbcR5ljdH7I9MKhgtOBeuu4Lf2aFnE1Ma jy1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HkbnaiTN7HX5icyqgpRbo2q1W1niXCJaWg2WAzHsQ1I=; b=XGefXT6pwC0+k3CJaGJy1aJ2iGODBIQoYwEzRqfcz4riUoGWJ36WX1/gulHegFtoRP hJiEAdnzuNNHxBfKljC8TxS+YgJqb3m07m/h5KWEd3krTcdyPckqSZ0SDBXYkSSj8kUC CkJWzgtHaG/uukxvMHy04BV2AtHmyL1ub15isdD6c/UFicKgWzxn4XDGjBWbfO67WylS PDuAyHyPIcKNuM0yJFrZ2aGmj2xun4iDpcxHFDkCbYvAbYdDQ7iJ0XOs9izzSD2XOg5Z 78Tk8YgGO8sN8GVl1IG4F4EEXOpkL8HXQ3Cu0OjQUc7S/F8V2buZREbAM2o9GMsr2xGA dm+A== X-Gm-Message-State: AKwxytetwl/NYK22tSak4xlmLJnfMj3AfKwYupbSZJCqni3WT0gxJzws nQOMJoSZBtvkIP7IZjPPKpg0mFn1 X-Google-Smtp-Source: ACJfBot+q/CJ2KAYiUM85R9nchbW90EHiK/GOry/AyCELLSNkBfEQN5FI8KYYrSt2l+Ekk5XHrC/og== X-Received: by 10.200.27.91 with SMTP id p27mr26056918qtk.254.1516197410549; Wed, 17 Jan 2018 05:56:50 -0800 (PST) Received: from ezelaptop.fibertel.com.ar ([190.210.56.45]) by smtp.gmail.com with ESMTPSA id r2sm2871366qkb.54.2018.01.17.05.56.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Jan 2018 05:56:49 -0800 (PST) From: Ezequiel Garcia To: u-boot@lists.denx.de Date: Wed, 17 Jan 2018 10:56:23 -0300 Message-Id: <20180117135626.22498-3-ezequiel@vanguardiasur.com.ar> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> References: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> Cc: michal.simek@xilinx.com Subject: [U-Boot] [PATCH 2/5] zynq: Rework FPGA initialization X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit moves the FPGA descriptor definition to mach-zynq, where it makes more sense. Also, the implementation is reworked to be cleaner and a bit smaller. add/remove: 2/11 grow/shrink: 0/1 up/down: 420/-608 (-188) function old new delta zynq_fpga_descs - 352 +352 zynq_fpga_desc - 68 +68 fpga100 28 - -28 fpga045 28 - -28 fpga035 28 - -28 fpga030 28 - -28 fpga020 28 - -28 fpga015 28 - -28 fpga014s 28 - -28 fpga012s 28 - -28 fpga010 28 - -28 fpga007s 28 - -28 fpga 28 - -28 board_init 332 32 -300 Total: Before=574182, After=573994, chg -0.03% Signed-off-by: Ariel D'Alessandro Signed-off-by: Ezequiel Garcia --- arch/arm/mach-zynq/cpu.c | 41 +++++++++++++++++++- arch/arm/mach-zynq/include/mach/sys_proto.h | 3 ++ board/xilinx/zynq/board.c | 59 +---------------------------- 3 files changed, 44 insertions(+), 59 deletions(-) diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index ee1c1a943b66..53a07b0059c2 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -5,14 +5,36 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include +#include #include #include -#include #include +#include +#include #define ZYNQ_SILICON_VER_MASK 0xF0000000 #define ZYNQ_SILICON_VER_SHIFT 28 +#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) +static const struct { + u8 idcode; + xilinx_desc desc; +} zynq_fpga_descs[] = { + { .idcode = XILINX_ZYNQ_7007S, .desc = XILINX_XC7Z007S_DESC(0x07) }, + { .idcode = XILINX_ZYNQ_7010, .desc = XILINX_XC7Z010_DESC(0x10) }, + { .idcode = XILINX_ZYNQ_7012S, .desc = XILINX_XC7Z012S_DESC(0x12) }, + { .idcode = XILINX_ZYNQ_7014S, .desc = XILINX_XC7Z014S_DESC(0x14) }, + { .idcode = XILINX_ZYNQ_7015, .desc = XILINX_XC7Z015_DESC(0x15) }, + { .idcode = XILINX_ZYNQ_7020, .desc = XILINX_XC7Z020_DESC(0x20) }, + { .idcode = XILINX_ZYNQ_7030, .desc = XILINX_XC7Z030_DESC(0x30) }, + { .idcode = XILINX_ZYNQ_7035, .desc = XILINX_XC7Z035_DESC(0x35) }, + { .idcode = XILINX_ZYNQ_7045, .desc = XILINX_XC7Z045_DESC(0x45) }, + { .idcode = XILINX_ZYNQ_7100, .desc = XILINX_XC7Z100_DESC(0x100) }, + { /* Sentinel */ }, +}; +#endif + int arch_cpu_init(void) { zynq_slcr_unlock(); @@ -60,3 +82,20 @@ void enable_caches(void) dcache_enable(); } #endif + +#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) +const xilinx_desc *zynq_fpga_desc(void) +{ + u32 idcode; + u8 i; + + idcode = zynq_slcr_get_idcode(); + for (i = 0; zynq_fpga_descs[i].idcode; i++) { + if (zynq_fpga_descs[i].idcode == idcode) { + return &zynq_fpga_descs[i].desc; + } + } + return NULL; +} +#endif diff --git a/arch/arm/mach-zynq/include/mach/sys_proto.h b/arch/arm/mach-zynq/include/mach/sys_proto.h index af61352dd110..fd5744c4e85e 100644 --- a/arch/arm/mach-zynq/include/mach/sys_proto.h +++ b/arch/arm/mach-zynq/include/mach/sys_proto.h @@ -7,6 +7,8 @@ #ifndef _SYS_PROTO_H_ #define _SYS_PROTO_H_ +#include + extern void zynq_slcr_lock(void); extern void zynq_slcr_unlock(void); extern void zynq_slcr_cpu_reset(void); @@ -16,6 +18,7 @@ extern u32 zynq_slcr_get_boot_mode(void); extern u32 zynq_slcr_get_idcode(void); extern int zynq_slcr_get_mio_pin_status(const char *periph); extern void zynq_ddrc_init(void); +extern const xilinx_desc *zynq_fpga_desc(void); extern unsigned int zynq_get_silicon_version(void); int zynq_board_read_rom_ethaddr(unsigned char *ethaddr); diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index e59038106aa6..f9e7bca4ee40 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -15,69 +15,12 @@ DECLARE_GLOBAL_DATA_PTR; -#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ - (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) -static xilinx_desc fpga; - -/* It can be done differently */ -static xilinx_desc fpga007s = XILINX_XC7Z007S_DESC(0x7); -static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10); -static xilinx_desc fpga012s = XILINX_XC7Z012S_DESC(0x12); -static xilinx_desc fpga014s = XILINX_XC7Z014S_DESC(0x14); -static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15); -static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20); -static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30); -static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35); -static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45); -static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100); -#endif - int board_init(void) { -#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ - (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) - u32 idcode; - - idcode = zynq_slcr_get_idcode(); - - switch (idcode) { - case XILINX_ZYNQ_7007S: - fpga = fpga007s; - break; - case XILINX_ZYNQ_7010: - fpga = fpga010; - break; - case XILINX_ZYNQ_7012S: - fpga = fpga012s; - break; - case XILINX_ZYNQ_7014S: - fpga = fpga014s; - break; - case XILINX_ZYNQ_7015: - fpga = fpga015; - break; - case XILINX_ZYNQ_7020: - fpga = fpga020; - break; - case XILINX_ZYNQ_7030: - fpga = fpga030; - break; - case XILINX_ZYNQ_7035: - fpga = fpga035; - break; - case XILINX_ZYNQ_7045: - fpga = fpga045; - break; - case XILINX_ZYNQ_7100: - fpga = fpga100; - break; - } -#endif - #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \ (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD)) fpga_init(); - fpga_add(fpga_xilinx, &fpga); + fpga_add(fpga_xilinx, (void *)zynq_fpga_desc()); #endif return 0; From patchwork Wed Jan 17 13:56:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 862280 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=vanguardiasur-com-ar.20150623.gappssmtp.com header.i=@vanguardiasur-com-ar.20150623.gappssmtp.com header.b="Cux/DZl7"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zM7xl2tpqz9sNc for ; Thu, 18 Jan 2018 00:59:39 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id DCC12C21C59; Wed, 17 Jan 2018 13:58:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E7F3FC21E50; Wed, 17 Jan 2018 13:57:23 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id A6188C21E39; Wed, 17 Jan 2018 13:56:57 +0000 (UTC) Received: from mail-qt0-f194.google.com (mail-qt0-f194.google.com [209.85.216.194]) by lists.denx.de (Postfix) with ESMTPS id F1319C21E3A for ; Wed, 17 Jan 2018 13:56:53 +0000 (UTC) Received: by mail-qt0-f194.google.com with SMTP id d4so22598094qtj.5 for ; Wed, 17 Jan 2018 05:56:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vanguardiasur-com-ar.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sj2wmiRhK1Mfc4TqPYzkxM+NqizbskF+0j8jWIfcSuw=; b=Cux/DZl7tGIzkFWwq8iezjyBGglijaRXZlsqldZX5azvBK4B7ahyeN21VKEKz0sMrQ bSDPAVZmd5EqZW6KPyPKnRIcueJY+QxuOMUUdb4XKU3YqL0KShdIRRJ/b6/s+nnFPsHJ hU0uZPKhgDr2jaTyOpIpj9remoY1Ba0UMeeE+sKRbV99wRBVbBFn0XDSrvx6OQJpTfrs 0b1P2Uwtz78IkXXSFRP26jf4f+TWeiy8nQ7ID+DBuRoTGbvpq3Xq2AuPj5Hx17xeLjIt +4LTli02RQN6C5q9q64PRKeTN0s0zKyCUtTo9z31ZJmD5U7LNnZvQi2zhtYIJOC9FBm5 bi9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sj2wmiRhK1Mfc4TqPYzkxM+NqizbskF+0j8jWIfcSuw=; b=XrHUWm4dzlB8HrdbpQdD5kjx0XapZhhvYJn1xb51cVolZFQMjgz8Zbsp4b2iOoh870 Bfdjcl40hQN0X2NUydwcxc+ZSs0chhy0KMh3YBGa7wdDUX3YwdAE9lSZ/3kGSRg8Vo1v QgwYQJHPo8RrGq/BtXuIDby2M5Td0G8wW+RqvcLXgHErLMiXzLjbE8uLVwsGyuBZ8whK h6/4lmAMCjstPrxokeHRS4eFP21FFhrFlHYWIRmwp3qMiFK2oQxUmtP6tO26onFedpWS RtvK4VHzO9mVo08j+G50gLcjgaGGv5Izsl3EFDqg0qtt4fuuRJvgZlroFbuLIxwzE7Jf LsNw== X-Gm-Message-State: AKwxytfTxvlOBFhDyLGAINxfzf4UC7VmDMcIvs2q878nGjNQGUGIh+Q4 /7Jd7QqPJcsftdzmXZo/Jt0sHR7f X-Google-Smtp-Source: ACJfBouZOjOr0I+syOU84tOmDbe++9gYpebtfDlYxFu4hqc+Qi+yGaS1Lquln6DA1hGV9HOqJZL3/A== X-Received: by 10.200.16.131 with SMTP id a3mr31617515qtj.123.1516197412746; Wed, 17 Jan 2018 05:56:52 -0800 (PST) Received: from ezelaptop.fibertel.com.ar ([190.210.56.45]) by smtp.gmail.com with ESMTPSA id r2sm2871366qkb.54.2018.01.17.05.56.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Jan 2018 05:56:51 -0800 (PST) From: Ezequiel Garcia To: u-boot@lists.denx.de Date: Wed, 17 Jan 2018 10:56:24 -0300 Message-Id: <20180117135626.22498-4-ezequiel@vanguardiasur.com.ar> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> References: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> Cc: michal.simek@xilinx.com Subject: [U-Boot] [PATCH 3/5] zynq: Support CPU info display X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit adds CPU and silicon version information consuming the SLCR IDCODE and DEVCFG MCTRL registers, respectively. Signed-off-by: Ariel D'Alessandro Signed-off-by: Ezequiel Garcia --- arch/arm/mach-zynq/cpu.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index 53a07b0059c2..602f483c162b 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -35,6 +35,25 @@ static const struct { }; #endif +#ifdef CONFIG_DISPLAY_CPUINFO +static const struct { + u8 idcode; + const char *cpuinfo; +} zynq_cpu_info[] = { + { .idcode = XILINX_ZYNQ_7007S, .cpuinfo = XILINX_XC7Z007S_NAME }, + { .idcode = XILINX_ZYNQ_7010, .cpuinfo = XILINX_XC7Z010_NAME }, + { .idcode = XILINX_ZYNQ_7012S, .cpuinfo = XILINX_XC7Z012S_NAME }, + { .idcode = XILINX_ZYNQ_7014S, .cpuinfo = XILINX_XC7Z014S_NAME }, + { .idcode = XILINX_ZYNQ_7015, .cpuinfo = XILINX_XC7Z015_NAME }, + { .idcode = XILINX_ZYNQ_7020, .cpuinfo = XILINX_XC7Z020_NAME }, + { .idcode = XILINX_ZYNQ_7030, .cpuinfo = XILINX_XC7Z030_NAME }, + { .idcode = XILINX_ZYNQ_7035, .cpuinfo = XILINX_XC7Z035_NAME }, + { .idcode = XILINX_ZYNQ_7045, .cpuinfo = XILINX_XC7Z045_NAME }, + { .idcode = XILINX_ZYNQ_7100, .cpuinfo = XILINX_XC7Z100_NAME }, + { /* Sentinel */ }, +}; +#endif + int arch_cpu_init(void) { zynq_slcr_unlock(); @@ -99,3 +118,30 @@ const xilinx_desc *zynq_fpga_desc(void) return NULL; } #endif + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + u32 idcode, version; + bool found; + u8 i; + + idcode = zynq_slcr_get_idcode(); + found = false; + for (i = 0; zynq_cpu_info[i].idcode; i++) { + if (zynq_cpu_info[i].idcode == idcode) { + found = true; + break; + } + } + + version = zynq_get_silicon_version() << 1; + if (version > (PCW_SILICON_VERSION_3 << 1)) + version += 1; + if (found) { + printf("CPU: Zynq %s\n", zynq_cpu_info[i].cpuinfo); + printf("Silicon: v%d.%d\n", version >> 1, version & 1); + } + return 0; +} +#endif From patchwork Wed Jan 17 13:56:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 862279 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=vanguardiasur-com-ar.20150623.gappssmtp.com header.i=@vanguardiasur-com-ar.20150623.gappssmtp.com header.b="ez3SxPFQ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zM7xG40T1z9sNx for ; Thu, 18 Jan 2018 00:59:14 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 022C5C21E0E; Wed, 17 Jan 2018 13:58:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E02ABC21E3B; Wed, 17 Jan 2018 13:57:25 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1E81FC21DE8; Wed, 17 Jan 2018 13:56:59 +0000 (UTC) Received: from mail-qt0-f195.google.com (mail-qt0-f195.google.com [209.85.216.195]) by lists.denx.de (Postfix) with ESMTPS id 12F1DC21E45 for ; Wed, 17 Jan 2018 13:56:56 +0000 (UTC) Received: by mail-qt0-f195.google.com with SMTP id i1so5751934qtj.8 for ; Wed, 17 Jan 2018 05:56:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vanguardiasur-com-ar.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vkwyK3rgVhUeJ7pHxBLs0c+9uNOUVo4D71jirGa0tUQ=; b=ez3SxPFQl+H/14MI9zqOFFAhTXBMkLI/W2vKj4zB4PHuYeC9qmTYC5S+zoNe4P+c5D U0umVtr4mQPF21qKYOZk+uS5M73Rf3IuqwUX58yaL3dEa/eM/zuiSkLYxb1ISeHRyz7E QjeIXYAMK3WjLs1F9pgqviuNBtIHNFdvx24SJ9UnJC5HSBODYsEEibB0815+Ef8SJgVN HdoEU1D/zr3TrCRjS1GYMmvJqN1ZBGuqiT6zn5UIRsy/WkOvCzF/wco7MZFF/84et7G4 MQ54L6kui3ztPJ8WrbV/HrAyU7GPiChW5zpaUSsELYX+lx317OCPLXUYcJ2xwcxafsD2 1gOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vkwyK3rgVhUeJ7pHxBLs0c+9uNOUVo4D71jirGa0tUQ=; b=iGjxt8+68BB/p+I/eOSSZYTX07uHj9fL7JWTqFRvgSElz7vIMNik3lMZozQJ1m/x9W X5eSxNLZaRVGvmSyqjNOUiaSsiWOUvcXarK+aiZa79r88lo/WUgo+IXovKuVHHPyd3O3 tNmDmKACR2WZHQc/v1MfxyncUYqGua+nJaxlcEz3mahfS0m2P5Ok4jzH8va6nhIcEWBO x84AfnTmdj5EpepAbwBISwcZK8qaCbmSVEfYHVH2H/qfvYvwy99x6TezGSjURGOft6ZM ELxIpTQx9P7XrAbe54AvkgEmUtUxsp3GojyIOxVV3WQXowZi22WrNFGe7tQjy4O+Gzy3 90qg== X-Gm-Message-State: AKwxytfLP4TMaqw/a28maQJV93v72u3laQQFb9VzboAnx8huNwz7WP9p 3ymPRiRWbs6456VQf62o/Yk+wuf5 X-Google-Smtp-Source: ACJfBosXUPiIOVeocaSzKy4R/KlCGGapbPCDqxK/OhUF8ggWBE4YcR7tmmsT5Vk4bWy4Bn6H9ZC6+g== X-Received: by 10.237.50.99 with SMTP id y90mr15808761qtd.274.1516197414790; Wed, 17 Jan 2018 05:56:54 -0800 (PST) Received: from ezelaptop.fibertel.com.ar ([190.210.56.45]) by smtp.gmail.com with ESMTPSA id r2sm2871366qkb.54.2018.01.17.05.56.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Jan 2018 05:56:54 -0800 (PST) From: Ezequiel Garcia To: u-boot@lists.denx.de Date: Wed, 17 Jan 2018 10:56:25 -0300 Message-Id: <20180117135626.22498-5-ezequiel@vanguardiasur.com.ar> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> References: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> Cc: michal.simek@xilinx.com Subject: [U-Boot] [PATCH 4/5] zynq: board: Remove checkboard X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now that showing silicon version is part of the CPU info display, let's remove checkboard(). Note that the generic show_board_info() will still show the DT 'model' property. For instance: U-Boot 2018.01-00172-g5e296ab7317a (Jan 17 2018 - 09:57:36 -0300) CPU: Zynq 7z010 Silicon: v3.1 Model: Bitmain Antminer S9 Board Signed-off-by: Ezequiel Garcia --- board/xilinx/zynq/board.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index f9e7bca4ee40..2374da68328f 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -11,7 +11,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -52,22 +51,6 @@ int board_late_init(void) return 0; } -#ifdef CONFIG_DISPLAY_BOARDINFO -int checkboard(void) -{ - u32 version = zynq_get_silicon_version(); - - version <<= 1; - if (version > (PCW_SILICON_VERSION_3 << 1)) - version += 1; - - puts("Board: Xilinx Zynq\n"); - printf("Silicon: v%d.%d\n", version >> 1, version & 1); - - return 0; -} -#endif - int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) { #if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \ From patchwork Wed Jan 17 13:56:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 862278 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=vanguardiasur-com-ar.20150623.gappssmtp.com header.i=@vanguardiasur-com-ar.20150623.gappssmtp.com header.b="dO8NTERE"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zM7wc0r5sz9ryQ for ; Thu, 18 Jan 2018 00:58:39 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 78FCDC21E24; Wed, 17 Jan 2018 13:57:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F27FAC21E39; Wed, 17 Jan 2018 13:57:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BA024C21DDD; Wed, 17 Jan 2018 13:57:02 +0000 (UTC) Received: from mail-qt0-f193.google.com (mail-qt0-f193.google.com [209.85.216.193]) by lists.denx.de (Postfix) with ESMTPS id 45CADC21E28 for ; Wed, 17 Jan 2018 13:56:58 +0000 (UTC) Received: by mail-qt0-f193.google.com with SMTP id o35so12459652qtj.13 for ; Wed, 17 Jan 2018 05:56:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vanguardiasur-com-ar.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=k5zqLiWIbTjT1KJP1knGks66r9ZSSPhFfV9mDBKtzCo=; b=dO8NTEREV+uWaly0nmPFxmnjbyrBk39YI2BVWEWrzYI4KxMYwYqioiWLDILo5+ORrm nrMiNR0+ILgtMR1sfVvoedIFzKiQoxu67kmB1zatIAD38atuAkyTLog+09w4djuxNwBi DLel2x9kg+vCt5WYVxxwb1jKOxLodONA6t5EwMvgzqi0QlJl9bmiWOxs1G3qiwFn/o7Z +7PB5dy+i/gAGvKoyGEEtQWpI69GJuRY2exstjUMcWwKVEsk7s/pH3YJx/BBa2kGyCTE 66/tLVpiLRm7cSj3AyvfdSjD4fAqAtWWIp8yyg/C+SIBijSp4q1q+WwpiXfwLE3IGMnQ qDBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k5zqLiWIbTjT1KJP1knGks66r9ZSSPhFfV9mDBKtzCo=; b=c8Qei3TNFPVb806VGEYRP7cNe/sGoTxOskX+N1cAtz56NHUTODYiwbSyCeokIDxpcO eyUrhZKu42sxY7i2QoiYlqCtmxx0nmmPNzd4u+iblUXXRHh4zqAPksivVZc1XDEmiubX OVXiDS6NaTph+keI3axyE5ILq1GV/bqPOHRLGmecoVaX0fLPS18a9qeA681T5iO1A17U LAXjHYCCVzU8quzGjUOJTT76gEXA8NHQlbCh/6+S+KFE7bkc8k5koj+7QesARjSLFIbW Toq43KSkKCuAe9JKv1BM13nkRIdNpiayPhIopkRE8WtlRibAnpYmwwM5lQ5w2orbzH7M eofQ== X-Gm-Message-State: AKwxytcvIPxMWSGOzGkoh3uF7RnBKS4P8ooiTq6PCKoW5IO8C81MNANU gv6yMMEWUynvFc69R3JPPGTPS8g9 X-Google-Smtp-Source: ACJfBotMJxzXZ1xZjlWHbyXPU9f/JBYXt3o0RypzLQM3F2EBfVacJOxE7vdi2lLdfMN/Hr0cJMEmeQ== X-Received: by 10.200.57.74 with SMTP id t10mr30391139qtb.22.1516197416966; Wed, 17 Jan 2018 05:56:56 -0800 (PST) Received: from ezelaptop.fibertel.com.ar ([190.210.56.45]) by smtp.gmail.com with ESMTPSA id r2sm2871366qkb.54.2018.01.17.05.56.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 Jan 2018 05:56:56 -0800 (PST) From: Ezequiel Garcia To: u-boot@lists.denx.de Date: Wed, 17 Jan 2018 10:56:26 -0300 Message-Id: <20180117135626.22498-6-ezequiel@vanguardiasur.com.ar> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> References: <20180117135626.22498-1-ezequiel@vanguardiasur.com.ar> Cc: michal.simek@xilinx.com Subject: [U-Boot] [PATCH 5/5] configs: zynq: Enable DISPLAY_CPUINFO X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Now that silicon version has been moved from checkboard() to print_cpuinfo(), we need to enable DISPLAY_CPUINFO option. Signed-off-by: Ezequiel Garcia --- configs/syzygy_hub_defconfig | 1 - configs/topic_miami_defconfig | 1 - configs/topic_miamilite_defconfig | 1 - configs/topic_miamiplus_defconfig | 1 - configs/zynq_cc108_defconfig | 1 - configs/zynq_cse_qspi_defconfig | 1 - configs/zynq_microzed_defconfig | 1 - configs/zynq_picozed_defconfig | 1 - configs/zynq_z_turn_defconfig | 1 - configs/zynq_zc702_defconfig | 1 - configs/zynq_zc706_defconfig | 1 - configs/zynq_zc770_xm010_defconfig | 1 - configs/zynq_zc770_xm011_defconfig | 1 - configs/zynq_zc770_xm012_defconfig | 1 - configs/zynq_zc770_xm013_defconfig | 1 - configs/zynq_zed_defconfig | 1 - configs/zynq_zybo_defconfig | 1 - 17 files changed, 17 deletions(-) diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 8bdc4be67d70..b4a41b484885 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -9,7 +9,6 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index aabd705da0fb..866c91276d95 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt" CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=0 -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 7228283b3c6b..1cae54c2da5e 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt" CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=0 -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index d511a942838b..13f69eb4b1ca 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -8,7 +8,6 @@ CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt" CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=0 -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig index bdba0d1cc9ba..31d5dda12b06 100644 --- a/configs/zynq_cc108_defconfig +++ b/configs/zynq_cc108_defconfig @@ -7,7 +7,6 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 9659faefbf33..f5201a72d6be 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_DEBUG_UART=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTDELAY=-1 -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SYS_PROMPT="Zynq> " diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index fc21eb8f67a3..fbce9631f893 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index f36e7bd849f4..e58b90b710ca 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig index c727b2acbf28..d4934c8d1673 100644 --- a/configs/zynq_z_turn_defconfig +++ b/configs/zynq_z_turn_defconfig @@ -7,7 +7,6 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 0d0efc223dd4..df0a1adf793d 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -8,7 +8,6 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 4b186c9fffc6..a010777804aa 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -8,7 +8,6 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 897ca91e5606..12de2935baab 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -8,7 +8,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index 2b8a12ee6906..9e8afe6060aa 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -8,7 +8,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index d53fe94db36b..854d129fa38b 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -8,7 +8,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index e6445f735c57..11df33d199f2 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -8,7 +8,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013" -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index c18f056debc4..0277ae55f1f1 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-zed" CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 21f8c08fd824..4f06c44578fa 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -8,7 +8,6 @@ CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -# CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y