From patchwork Tue Apr 13 12:49:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Martin Jambor X-Patchwork-Id: 1465769 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FKQQz3w16z9sW1 for ; Tue, 13 Apr 2021 22:49:13 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 66D8239450F2; Tue, 13 Apr 2021 12:49:08 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx2.suse.de (mx2.suse.de [195.135.220.15]) by sourceware.org (Postfix) with ESMTPS id 98710388A41E for ; Tue, 13 Apr 2021 12:49:05 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 98710388A41E Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=suse.cz Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mjambor@suse.cz X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 5F0F7AFEC for ; Tue, 13 Apr 2021 12:49:04 +0000 (UTC) From: Martin Jambor To: GCC Patches Cc: Subject: [wwwdocs] Add znver3 support to changes.html User-Agent: Notmuch/0.31.4 (https://notmuchmail.org) Emacs/27.1 (x86_64-suse-linux-gnu) Date: Tue, 13 Apr 2021 14:49:04 +0200 Message-ID: MIME-Version: 1.0 X-Spam-Status: No, score=-3039.2 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Hi, Martin Liška correctly observed that the newly added support for AMD zenver3 in GCC 11 and 10.3 is not reflected in the changes.html files. Would the following be OK? Thanks, Martin diff --git a/htdocs/gcc-10/changes.html b/htdocs/gcc-10/changes.html index d5166879..d9971ffb 100644 --- a/htdocs/gcc-10/changes.html +++ b/htdocs/gcc-10/changes.html @@ -1144,6 +1144,12 @@ are not listed here).

makes the code specific to 512-bit SVE. +

x86-64

+
    +
  • GCC 10.3 supports AMD CPUs based on znver3 core + through -march=znver3. +
    • +
diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html index a7fa4e1b..97a622f4 100644 --- a/htdocs/gcc-11/changes.html +++ b/htdocs/gcc-11/changes.html @@ -634,6 +634,9 @@ a work-in-progress.

The switch enables the CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, KEYLOCKER, AVX-VNNI, and HRESET ISA extensions. +
  • GCC now supports AMD CPUs based on znver3 core + through -march=znver3. +