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[44.242.66.180]) by smtp.gmail.com with ESMTPSA id h23sm2455213ejd.103.2021.04.06.01.15.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Apr 2021 01:15:33 -0700 (PDT) From: Bin Meng To: David Gibson , qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [for-6.0 PATCH 1/3] roms/Makefile: Update ppce500 u-boot build directory name Date: Tue, 6 Apr 2021 16:15:11 +0800 Message-Id: <20210406081513.1013372-2-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210406081513.1013372-1-bmeng.cn@gmail.com> References: <20210406081513.1013372-1-bmeng.cn@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=bmeng.cn@gmail.com; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Currently building ppce500 u-boot image results in modified: roms/u-boot (untracked content) As roms/u-boot/.gitignore indicates, update the build directory name to build-e500 to eliminate this message. Signed-off-by: Bin Meng --- roms/Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/roms/Makefile b/roms/Makefile index 5ffe3317ac..eeb5970348 100644 --- a/roms/Makefile +++ b/roms/Makefile @@ -154,10 +154,10 @@ slof: cp SLOF/boot_rom.bin ../pc-bios/slof.bin u-boot.e500: - $(MAKE) -C u-boot O=build.e500 qemu-ppce500_config + $(MAKE) -C u-boot O=build-e500 qemu-ppce500_config $(MAKE) -C u-boot CROSS_COMPILE=$(powerpc_cross_prefix) \ - O=build.e500 - $(powerpc_cross_prefix)strip u-boot/build.e500/u-boot -o \ + O=build-e500 + $(powerpc_cross_prefix)strip u-boot/build-e500/u-boot -o \ ../pc-bios/u-boot.e500 u-boot.sam460: @@ -205,7 +205,7 @@ clean: $(MAKE) -C ipxe/src veryclean $(MAKE) -C edk2/BaseTools clean $(MAKE) -C SLOF clean - rm -rf u-boot/build.e500 + rm -rf u-boot/build-e500 $(MAKE) -C u-boot-sam460ex distclean $(MAKE) -C skiboot clean $(MAKE) -f Makefile.edk2 clean From patchwork Tue Apr 6 08:15:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 1462644 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=mgnLZlrA; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FF0lF5CJ7z9sTD for ; Tue, 6 Apr 2021 18:18:01 +1000 (AEST) Received: from localhost ([::1]:58228 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lTguN-0006Zu-PS for incoming@patchwork.ozlabs.org; Tue, 06 Apr 2021 04:17:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59620) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lTgs8-0004Vg-Ga; Tue, 06 Apr 2021 04:15:40 -0400 Received: from mail-ej1-x62d.google.com ([2a00:1450:4864:20::62d]:35651) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lTgs6-0003zZ-KG; Tue, 06 Apr 2021 04:15:40 -0400 Received: by mail-ej1-x62d.google.com with SMTP id u17so14219021ejk.2; Tue, 06 Apr 2021 01:15:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=hpLfcLZHJjMECLvlszpIpEdjfVF3ZYOP2Rby1VxmtQs=; b=mgnLZlrAWqZcMxjgsK78yRy6bzEPpRW4DHciSFHGQ6QVB19PuFDG+a2yIaSBPZvvfj gLXVJLencsvTMk+rVoAa4NTRzZhVWwN28dmxbThXl2pH0SCR8CoTc7+DfDMe7W8+Niv8 58erjV/G7GEQZuRwDvRofdCCVzCCvGiZcG6XPJ6n4t01rPXJoak/1e+mMf2gFvMX0brL nRSAc7P/RkuIfu/zrZTEymXcA9CdPSeqdPSV+UA35xNPiM+n4WL9wAvoy42CPAus8CQI UbNAGzfQLsEqaIIRvF4xAnZvdf3P3PHCQgFKO3OSn5sp6kwWQL5zxys2QOB0ekM8PXfG BCMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hpLfcLZHJjMECLvlszpIpEdjfVF3ZYOP2Rby1VxmtQs=; b=T1tijZwpwTdVpqOo9+W3Y34RH9LTP9HFOR48Eafy26OQ/68+fpfyAZbqIjsueEtfmR 8vdXySEvNNaZpGmffA7jIBAdySgwUnyifvOWTgB3tPB5oyMLWJZpYM9rEE6i0OAMIu9c vtk7TKxeMGs3waTcKf8eqrypMFak27rNZzyXmV6dH0HEclyrTxEwHh4bKFezzZNtmREp 3yB0hpQCTYbCIFC89d+FpoMHiga7bxnE8v1ENU+IBtajP10BC2JwFiZaBcNFm/xgH/g3 OS2W47q0ZF30QeyipZfL0xpIujPPOOnZLtObl0w4nmBwD7KORhNyOlExCNIcRocF3UYf rC+w== X-Gm-Message-State: AOAM530cz6Skqt/KVtuthhhUPzjHXiYpJPFa2G/CY6eV9ULNvHUTgz36 RBzRPJOFvsSJaMX+qmysVtDPynbBRkw= X-Google-Smtp-Source: ABdhPJyqj4//RGSOw5PGMDB03WVF6Bi9xAEVW0x2WOOI9ObRrtZznQqNIwZ2boH/O6fQzViUz3AOhA== X-Received: by 2002:a17:906:4055:: with SMTP id y21mr32126202ejj.507.1617696936989; Tue, 06 Apr 2021 01:15:36 -0700 (PDT) Received: from pek-vx-bsp2.wrs.com (ec2-44-242-66-180.us-west-2.compute.amazonaws.com. [44.242.66.180]) by smtp.gmail.com with ESMTPSA id h23sm2455213ejd.103.2021.04.06.01.15.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Apr 2021 01:15:36 -0700 (PDT) From: Bin Meng To: David Gibson , qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [for-6.0 PATCH 2/3] roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support Date: Tue, 6 Apr 2021 16:15:12 +0800 Message-Id: <20210406081513.1013372-3-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210406081513.1013372-1-bmeng.cn@gmail.com> References: <20210406081513.1013372-1-bmeng.cn@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=bmeng.cn@gmail.com; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" When QEMU originally supported the ppce500 machine back in Jan 2014, it was created with a 1:1 mapping of PCI bus address. Things seemed to change rapidly that in Nov 2014 with the following QEMU commits: commit e6b4e5f4795b ("PPC: e500: Move CCSR and MMIO space to upper end of address space") and commit cb3778a0455a ("PPC: e500 pci host: Add support for ATMUs") the PCI memory and IO physical address were moved to beyond 4 GiB, but PCI bus address remained below 4 GiB, hence a non-identity mapping was created. Unfortunately corresponding U-Boot updates were missed along with the QEMU changes and the U-Boot QEMU ppce500 PCI support has been broken since then, until this issue was fixed recently in U-Boot mainline v2021.04 release, specifically by the following U-Boot series: http://patchwork.ozlabs.org/project/uboot/list/?series=230985&state=* The cross-compilation toolchain used to build the U-Boot image is: https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin/x86_64/10.1.0/x86_64-gcc-10.1.0-nolibc-powerpc-linux.tar.xz Signed-off-by: Bin Meng --- pc-bios/u-boot.e500 | Bin 349148 -> 406920 bytes roms/u-boot | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/pc-bios/u-boot.e500 b/pc-bios/u-boot.e500 index 732660f348..d2e29f81d6 100644 Binary files a/pc-bios/u-boot.e500 and b/pc-bios/u-boot.e500 differ diff --git a/roms/u-boot b/roms/u-boot index d3689267f9..b46dd116ce 160000 --- a/roms/u-boot +++ b/roms/u-boot @@ -1 +1 @@ -Subproject commit d3689267f92c5956e09cc7d1baa4700141662bff +Subproject commit b46dd116ce03e235f2a7d4843c6278e1da44b5e1 From patchwork Tue Apr 6 08:15:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 1462645 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=D+nh9PfE; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FF0ml4Hjzz9sTD for ; Tue, 6 Apr 2021 18:19:19 +1000 (AEST) Received: from localhost ([::1]:60402 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lTgvd-0007TT-Js for incoming@patchwork.ozlabs.org; Tue, 06 Apr 2021 04:19:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lTgsD-0004aU-DK; Tue, 06 Apr 2021 04:15:45 -0400 Received: from mail-ed1-x535.google.com ([2a00:1450:4864:20::535]:40823) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lTgs9-000427-Ok; Tue, 06 Apr 2021 04:15:45 -0400 Received: by mail-ed1-x535.google.com with SMTP id w23so4190326edx.7; Tue, 06 Apr 2021 01:15:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=S19Qc+S//PbgbdgB/QlzSWC1BrQPbmy03pZJgY/lqAw=; b=D+nh9PfE75mO5+3urfAsN4FuUqSS9elI0K58vVpKXsv7MyOedElLAkuEtRWZ4gaLa7 AW7htMWbN4KWufVSl22QJ/iaPEaeSyjkK5Zrw0WsQSrd2qOYtNSeTVxAwDql12lGnney 3tXX7ojBJwbC9+63A/DRx4frPeEtKNkljavTmYxKbJI5eXyKWwWUKehZHchjoikOGT94 UtrX1QE9s8DNpGbV0uo/+8A961uLthkSanS2bNJJzIH7hNP9qGP+IUEC4uhiX0HXbfXl wdtDmrkdSct30eU+jlZcDwSegeqsROXmmHGbMtw1zj4WN0L4nZmhheWhBejzvipInKwF /N0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=S19Qc+S//PbgbdgB/QlzSWC1BrQPbmy03pZJgY/lqAw=; b=XqQl1EGIFbVcdXO0b5hkPTYt6flUTbZTNJ7WYcZNzgtgM6ulnYmlzm1/pTOhEfvSEO 437o3JTt/jW9rcVVbC+O2GfpZ7M21oTtAjzESVXAaE9vt44COqwL+2OjWR9ja4mtkxoO 9NFltuK4udMSWKv5mWb6t8/cQJImz2joFQLa2Un+jscR8AuLC3++gP2wLTDJpnk6XzKd HkHZQVwGj8MXCB3iW5ITSY5OryVRtbQCsYeRLiSCIDL83JqYDnWbYaYGVgNCvMtOAoxs MQWkn0zW4t1yvg97KqMUWZUCn6cEcBsW3nCFW8jXppK9mFIuPN1YsqcZQR8hDGZCYP0D e2gA== X-Gm-Message-State: AOAM532EcuL4NWJSAg6dsdpcoJiSSQHk/q4Xl2xwgxdqal7phk8ydgsk NW7X8Q+607QdlM59jZuTQBYrIAbPC4s= X-Google-Smtp-Source: ABdhPJzL7x4KPa83CxmqwjwD8ZsLyL+/2Y0uajw7g/AApSVPMqAn2+plmfg0a8QQa0uSvvwFMQMBTQ== X-Received: by 2002:a05:6402:1004:: with SMTP id c4mr36809021edu.364.1617696940069; Tue, 06 Apr 2021 01:15:40 -0700 (PDT) Received: from pek-vx-bsp2.wrs.com (ec2-44-242-66-180.us-west-2.compute.amazonaws.com. [44.242.66.180]) by smtp.gmail.com with ESMTPSA id h23sm2455213ejd.103.2021.04.06.01.15.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Apr 2021 01:15:39 -0700 (PDT) From: Bin Meng To: David Gibson , qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [for-6.0 PATCH 3/3] docs/system: ppc: Add documentation for ppce500 machine Date: Tue, 6 Apr 2021 16:15:13 +0800 Message-Id: <20210406081513.1013372-4-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210406081513.1013372-1-bmeng.cn@gmail.com> References: <20210406081513.1013372-1-bmeng.cn@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=bmeng.cn@gmail.com; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This adds detailed documentation for PowerPC `ppce500` machine, including the following information: - Supported devices - Hardware configuration information - Boot options - Running Linux kernel - Running U-Boot Signed-off-by: Bin Meng --- docs/system/ppc/ppce500.rst | 156 ++++++++++++++++++++++++++++++++++++ docs/system/target-ppc.rst | 1 + 2 files changed, 157 insertions(+) create mode 100644 docs/system/ppc/ppce500.rst diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst new file mode 100644 index 0000000000..7a815c1881 --- /dev/null +++ b/docs/system/ppc/ppce500.rst @@ -0,0 +1,156 @@ +ppce500 generic platform (``ppce500``) +====================================== + +QEMU for PPC supports a special ``ppce500`` machine designed for emulation and +virtualization purposes. + +Supported devices +----------------- + +The ``ppce500`` machine supports the following devices: + +* PowerPC e500 series core (e500v2/e500mc/e5500/e6500) +* Configuration, Control, and Status Register (CCSR) +* Multicore Programmable Interrupt Controller (MPIC) with MSI support +* 1 16550A UART device +* 1 Freescale MPC8xxx I2C controller +* 1 Pericom pt7c4338 RTC via I2C +* 1 Freescale MPC8xxx GPIO controller +* Power-off functionality via one GPIO pin +* 1 Freescale MPC8xxx PCI host controller +* VirtIO devices via PCI bus + +Hardware configuration information +---------------------------------- + +The ``ppce500`` machine automatically generates a device tree blob ("dtb") +which it passes to the guest, if there is no ``-dtb`` option. This provides +information about the addresses, interrupt lines and other configuration of +the various devices in the system. + +If users want to provide their own DTB, they can use the ``-dtb`` option. +These DTBs should have the following requirements: + +* The number of subnodes under /cpus node should match QEMU's ``-smp`` option +* The /memory reg size should match QEMU’s selected ram_size via ``-m`` + +Both ``qemu-system-ppc`` and ``qemu-system-ppc64`` provide emulation for the +following 32-bit PowerPC CPUs: + +* e500v2 +* e500mc + +Additionally ``qemu-system-ppc64`` provides support for the following 64-bit +PowerPC CPUs: + +* e5500 +* e6500 + +The CPU type can be specified via the ``-cpu`` command line. If not specified, +it creates a machine with e500v2 core. The following example shows an e6500 +based machine creation: + +.. code-block:: bash + + $ qemu-system-ppc64 -nographic -M ppce500 -cpu e6500 + +Boot options +------------ + +The ``ppce500`` machine can start using the standard -kernel functionality +for loading a payload like an OS kernel (e.g.: Linux), or U-Boot firmware. + +When -bios is omitted, the default pc-bios/u-boot.e500 firmware image is used +as the BIOS. QEMU follows below truth table to select which payload to execute: + +===== ========== ======= +-bios -kernel payload +===== ========== ======= + N N u-boot + N Y kernel + Y don't care u-boot +===== ========== ======= + +When both -bios and -kernel are present, QEMU loads U-Boot and U-Boot in turns +automatically loads the kernel image specified by the -kernel parameter via +U-Boot's built-in "bootm" command, hence a legacy uImage format is required in +such senario. + +Running Linux kernel +-------------------- + +Linux mainline v5.11 release is tested at the time of writing. To build a +Linux mainline kernel that can be booted by the ``ppce500`` machine in +64-bit mode, simply configure the kernel using the defconfig configuration: + +.. code-block:: bash + + $ export ARCH=powerpc + $ export CROSS_COMPILE=powerpc-linux- + $ make corenet64_smp_defconfig + $ make menuconfig + +then manually select the following configuration: + + Platform support > Freescale Book-E Machine Type > QEMU generic e500 platform + +To boot the newly built Linux kernel in QEMU with the ``ppce500`` machine: + +.. code-block:: bash + + $ qemu-system-ppc64 -M ppce500 -cpu e5500 -smp 4 -m 2G \ + -display none -serial stdio \ + -kernel vmlinux \ + -initrd /path/to/rootfs.cpio \ + -append "root=/dev/ram" + +To build a Linux mainline kernel that can be booted by the ``ppce500`` machine +in 32-bit mode, use the same 64-bit configuration steps except the defconfig +file should use corenet32_smp_defconfig. + +To boot the 32-bit Linux kernel: + +.. code-block:: bash + + $ qemu-system-ppc{64|32} -M ppce500 -cpu e500mc -smp 4 -m 2G \ + -display none -serial stdio \ + -kernel vmlinux \ + -initrd /path/to/rootfs.cpio \ + -append "root=/dev/ram" + +Running U-Boot +-------------- + +U-Boot mainline v2021.04 release is tested at the time of writing. To build a +U-Boot mainline bootloader that can be booted by the ``ppce500`` machine, use +the qemu-ppce500_defconfig with similar commands as described above for Linux: + +.. code-block:: bash + + $ export CROSS_COMPILE=powerpc-linux- + $ make qemu-ppce500_defconfig + +You will get u-boot file in the build tree. + +When U-Boot boots, you will notice the following if using with ``-cpu e6500``: + +.. code-block:: none + + CPU: Unknown, Version: 0.0, (0x00000000) + Core: e6500, Version: 2.0, (0x80400020) + +This is because we only specified a core name to QEMU and it does not have a +meaningful SVR value which represents an actual SoC that integrates such core. +You can specify a real world SoC device that QEMU has built-in support but all +these SoCs are e500v2 based MPC85xx series, hence you cannot test anything +built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500). + +By default a VirtIO standard PCI networking device is connected as an ethernet +interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by: + +.. code-block:: bash + + $ qemu-system-ppc -M ppce500 -smp 4 -m 2G \ + -display none -serial stdio \ + -bios u-boot \ + -nic tap,ifname=tap0,script=no,downscript=no,model=e1000 diff --git a/docs/system/target-ppc.rst b/docs/system/target-ppc.rst index 67905b8f2a..4f6eb93b17 100644 --- a/docs/system/target-ppc.rst +++ b/docs/system/target-ppc.rst @@ -20,5 +20,6 @@ help``. ppc/embedded ppc/powermac ppc/powernv + ppc/ppce500 ppc/prep ppc/pseries