From patchwork Mon Jan 15 12:15:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 860856 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zKsm51mchz9t41 for ; Mon, 15 Jan 2018 23:16:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933201AbeAOMPS (ORCPT ); Mon, 15 Jan 2018 07:15:18 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:55914 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932596AbeAOMPQ (ORCPT ); Mon, 15 Jan 2018 07:15:16 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id 942A4273A54 From: Sebastian Reichel To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel Subject: [PATCHv2 1/5] net: dsa: Support internal phy on 'cpu' port Date: Mon, 15 Jan 2018 13:15:04 +0100 Message-Id: <20180115121508.14544-2-sebastian.reichel@collabora.co.uk> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> References: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This adds support for enabling the internal PHY for a 'cpu' port. It has been tested on GE B850v3, B650v3 and B450v3, which have a built-in MV88E6240 switch connected to a PCIe based network card. Without this patch the link does not come up and no traffic can be routed through the switch. The PHY interface, that is being used on the above test systems is part of the MV88E6240 and since mv88e6xxx driver resets the chip during probe, it is definitely disabled without this patch. Signed-off-by: Sebastian Reichel --- net/dsa/port.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/net/dsa/port.c b/net/dsa/port.c index bb4be2679904..33ea0d73350d 100644 --- a/net/dsa/port.c +++ b/net/dsa/port.c @@ -282,6 +282,10 @@ int dsa_port_fixed_link_register_of(struct dsa_port *dp) int mode; int err; + mode = of_get_phy_mode(dn); + if (mode < 0) + mode = PHY_INTERFACE_MODE_NA; + if (of_phy_is_fixed_link(dn)) { err = of_phy_register_fixed_link(dn); if (err) { @@ -292,10 +296,6 @@ int dsa_port_fixed_link_register_of(struct dsa_port *dp) } phydev = of_phy_find_device(dn); - - mode = of_get_phy_mode(dn); - if (mode < 0) - mode = PHY_INTERFACE_MODE_NA; phydev->interface = mode; genphy_config_init(phydev); @@ -305,6 +305,21 @@ int dsa_port_fixed_link_register_of(struct dsa_port *dp) ds->ops->adjust_link(ds, port, phydev); put_device(&phydev->mdio.dev); + } else if (mode == PHY_INTERFACE_MODE_INTERNAL) { + phydev = mdiobus_get_phy(ds->slave_mii_bus, port); + if (!phydev) { + dev_err(ds->dev, "port %d has no internal phy!", port); + return -ENODEV; + } + + genphy_config_init(phydev); + genphy_resume(phydev); + genphy_read_status(phydev); + + if (ds->ops->adjust_link) + ds->ops->adjust_link(ds, port, phydev); + + dev_dbg(ds->dev, "enabled port's phy: %s", phydev_name(phydev)); } return 0; From patchwork Mon Jan 15 12:15:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 860855 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zKsls1B2yz9sRW for ; Mon, 15 Jan 2018 23:16:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933284AbeAOMPW (ORCPT ); Mon, 15 Jan 2018 07:15:22 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:55924 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932596AbeAOMPU (ORCPT ); Mon, 15 Jan 2018 07:15:20 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id 03BD62701EE From: Sebastian Reichel To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel Subject: [PATCHv2 2/5] ARM: dts: imx6q-bx50v3: Add internal switch Date: Mon, 15 Jan 2018 13:15:05 +0100 Message-Id: <20180115121508.14544-3-sebastian.reichel@collabora.co.uk> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> References: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to communicate with a Marvell switch. On all devices the switch is connected to a PCI based network card, which needs to be referenced by DT, so this also adds the common PCI root node. Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/imx6q-bx50v3.dtsi | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-bx50v3.dtsi b/arch/arm/boot/dts/imx6q-bx50v3.dtsi index b915837bbb5f..aefce581c0c3 100644 --- a/arch/arm/boot/dts/imx6q-bx50v3.dtsi +++ b/arch/arm/boot/dts/imx6q-bx50v3.dtsi @@ -92,6 +92,31 @@ mux-int-port = <1>; mux-ext-port = <4>; }; + + aliases { + mdio-gpio0 = &mdio0; + }; + + mdio0: mdio-gpio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */ + <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */ + + #address-cells = <1>; + #size-cells = <0>; + + switch@0 { + compatible = "marvell,mv88e6085"; /* 88e6240*/ + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + switch_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; }; &ecspi5 { @@ -326,3 +351,15 @@ tcxo-clock-frequency = <26000000>; }; }; + +&pcie { + /* Synopsys, Inc. Device */ + pci_root: root@0,0 { + compatible = "pci16c3,abcd"; + reg = <0x00000000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + }; +}; From patchwork Mon Jan 15 12:15:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 860853 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zKsl73tdCz9sRW for ; Mon, 15 Jan 2018 23:16:03 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933371AbeAOMP0 (ORCPT ); Mon, 15 Jan 2018 07:15:26 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:55950 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933247AbeAOMPX (ORCPT ); Mon, 15 Jan 2018 07:15:23 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id AEB0F273A5D From: Sebastian Reichel To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel Subject: [PATCHv2 3/5] ARM: dts: imx6q-b850v3: Add switch port configuration Date: Mon, 15 Jan 2018 13:15:06 +0100 Message-Id: <20180115121508.14544-4-sebastian.reichel@collabora.co.uk> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> References: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors ("ID", "IX", "ePort 1", "ePort 2"). The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b850v3# lspci -tv -[0000:00]---00.0-[01]----00.0-[02-05]--+-01.0-[03]----00.0 Intel Corporation I210 Gigabit Network Connection +-02.0-[04]----00.0 Intel Corporation I210 Gigabit Network Connection \-03.0-[05]-- root@b850v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:01.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:02.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 02:03.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab) 03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) 04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/imx6q-b850v3.dts | 71 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-b850v3.dts b/arch/arm/boot/dts/imx6q-b850v3.dts index 46bdc6722715..c3a9d73a7b78 100644 --- a/arch/arm/boot/dts/imx6q-b850v3.dts +++ b/arch/arm/boot/dts/imx6q-b850v3.dts @@ -212,3 +212,74 @@ }; }; }; + +&pci_root { + /* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */ + bridge@1,0 { + compatible = "pci10b5,8605"; + reg = <0x00010000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + bridge@2,1 { + compatible = "pci10b5,8605"; + reg = <0x00020800 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + /* Intel Corporation I210 Gigabit Network Connection */ + ethernet@3,0 { + compatible = "pci8086,1533"; + reg = <0x00030000 0 0 0 0>; + }; + }; + + bridge@2,2 { + compatible = "pci10b5,8605"; + reg = <0x00021000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + /* Intel Corporation I210 Gigabit Network Connection */ + switch_nic: ethernet@4,0 { + compatible = "pci8086,1533"; + reg = <0x00040000 0 0 0 0>; + }; + }; + }; +}; + +&switch_ports { + port@0 { + reg = <0>; + label = "eneport1"; + }; + + port@1 { + reg = <1>; + label = "eneport2"; + }; + + port@2 { + reg = <2>; + label = "enix"; + }; + + port@3 { + reg = <3>; + label = "enid"; + }; + + port@4 { + reg = <4>; + label = "cpu"; + phy-mode = "internal"; + ethernet = <&switch_nic>; + }; +}; From patchwork Mon Jan 15 12:15:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 860854 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zKslT5zrnz9t3Z for ; Mon, 15 Jan 2018 23:16:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933608AbeAOMQI (ORCPT ); Mon, 15 Jan 2018 07:16:08 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:55970 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932596AbeAOMP0 (ORCPT ); Mon, 15 Jan 2018 07:15:26 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id CF35F2701F0 From: Sebastian Reichel To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel Subject: [PATCHv2 4/5] ARM: dts: imx6q-b650v3: Add switch port configuration Date: Mon, 15 Jan 2018 13:15:07 +0100 Message-Id: <20180115121508.14544-5-sebastian.reichel@collabora.co.uk> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> References: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors. The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b650v3# lspci -tv -[0000:00]---00.0-[01]----00.0 Intel Corporation I210 Gigabit Network Connection root@b650v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/imx6q-b650v3.dts | 48 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-b650v3.dts b/arch/arm/boot/dts/imx6q-b650v3.dts index 7f9f176901d4..91b5b5157655 100644 --- a/arch/arm/boot/dts/imx6q-b650v3.dts +++ b/arch/arm/boot/dts/imx6q-b650v3.dts @@ -111,3 +111,51 @@ fsl,tx-cal-45-dp-ohms = <55>; fsl,tx-d-cal = <100>; }; + +&pci_root { + /* Intel Corporation I210 Gigabit Network Connection */ + switch_nic: ethernet@3,0 { + compatible = "pci8086,1533"; + reg = <0x00010000 0 0 0 0>; + }; +}; + +&switch_ports { + port@0 { + reg = <0>; + label = "enacq"; + }; + + port@1 { + reg = <1>; + label = "eneport1"; + }; + + port@2 { + reg = <2>; + label = "enix"; + }; + + port@3 { + reg = <3>; + label = "enid"; + }; + + port@4 { + reg = <4>; + label = "cpu"; + phy-mode = "internal"; + ethernet = <&switch_nic>; + }; + + port@5 { + reg = <5>; + label = "enembc"; + + /* connected to Ethernet MAC of AT91RM9200 in MII mode */ + fixed-link { + speed = <100>; + full-duplex; + }; + }; +}; From patchwork Mon Jan 15 12:15:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 860850 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zKskp1Vh1z9sPk for ; Mon, 15 Jan 2018 23:15:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933505AbeAOMPc (ORCPT ); Mon, 15 Jan 2018 07:15:32 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:55976 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933447AbeAOMP3 (ORCPT ); Mon, 15 Jan 2018 07:15:29 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id 18B41273A5E From: Sebastian Reichel To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel Subject: [PATCHv2 5/5] ARM: dts: imx6q-b450v3: Add switch port configuration Date: Mon, 15 Jan 2018 13:15:08 +0100 Message-Id: <20180115121508.14544-6-sebastian.reichel@collabora.co.uk> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> References: <20180115121508.14544-1-sebastian.reichel@collabora.co.uk> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This adds support for the Marvell switch and names the network ports according to the labels, that can be found next to the connectors. The switch is connected to the host system using a PCI based network card. The PCI bus configuration has been written using the following information: root@b450v3# lspci -tv -[0000:00]---00.0-[01]----00.0 Intel Corporation I210 Gigabit Network Connection root@b450v3# lspci -nn 00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01) 01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03) Signed-off-by: Sebastian Reichel --- arch/arm/boot/dts/imx6q-b450v3.dts | 48 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/imx6q-b450v3.dts b/arch/arm/boot/dts/imx6q-b450v3.dts index 404a93d9596b..e0bb646e2de7 100644 --- a/arch/arm/boot/dts/imx6q-b450v3.dts +++ b/arch/arm/boot/dts/imx6q-b450v3.dts @@ -112,3 +112,51 @@ line-name = "PCA9539-P07"; }; }; + +&pci_root { + /* Intel Corporation I210 Gigabit Network Connection */ + switch_nic: ethernet@3,0 { + compatible = "pci8086,1533"; + reg = <0x00010000 0 0 0 0>; + }; +}; + +&switch_ports { + port@0 { + reg = <0>; + label = "enacq"; + }; + + port@1 { + reg = <1>; + label = "eneport1"; + }; + + port@2 { + reg = <2>; + label = "enix"; + }; + + port@3 { + reg = <3>; + label = "enid"; + }; + + port@4 { + reg = <4>; + label = "cpu"; + phy-mode = "internal"; + ethernet = <&switch_nic>; + }; + + port@5 { + reg = <5>; + label = "enembc"; + + /* connected to Ethernet MAC of AT91RM9200 in MII mode */ + fixed-link { + speed = <100>; + full-duplex; + }; + }; +};