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Thu, 18 Feb 2021 12:57:24 +0000 (GMT) Received: from vm.lan (unknown [9.171.64.123]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 6522952052; Thu, 18 Feb 2021 12:57:24 +0000 (GMT) To: Andreas Krebbel Subject: [PATCH 1/2] IBM Z: Improve FPRX2 <-> TF conversions Date: Thu, 18 Feb 2021 13:57:08 +0100 Message-Id: <20210218125709.16119-2-iii@linux.ibm.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210218125709.16119-1-iii@linux.ibm.com> References: <20210218125709.16119-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-02-18_05:2021-02-18, 2021-02-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 suspectscore=0 spamscore=0 phishscore=0 bulkscore=0 impostorscore=0 mlxscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2102180108 X-Spam-Status: No, score=-11.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Ilya Leoshkevich via Gcc-patches From: Ilya Leoshkevich Reply-To: Ilya Leoshkevich Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" gcc/ChangeLog: * config/s390/vector.md (*fprx2_to_tf): Rename to fprx2_to_tf, add memory alternative. (tf_to_fprx2): New pattern. --- gcc/config/s390/vector.md | 36 +++++++++++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index 0e3c31f5d4f..e48c965db00 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -616,12 +616,23 @@ vlvgp\t%v0,%1,%N1" [(set_attr "op_type" "VRR,VRX,VRX,VRI,VRR")]) -(define_insn "*fprx2_to_tf" - [(set (match_operand:TF 0 "nonimmediate_operand" "=v") - (subreg:TF (match_operand:FPRX2 1 "general_operand" "f") 0))] +(define_insn_and_split "fprx2_to_tf" + [(set (match_operand:TF 0 "nonimmediate_operand" "=v,AR") + (subreg:TF (match_operand:FPRX2 1 "general_operand" "f,f") 0))] "TARGET_VXE" - "vmrhg\t%v0,%1,%N1" - [(set_attr "op_type" "VRR")]) + "@ + vmrhg\t%v0,%1,%N1 + #" + "!(MEM_P (operands[0]) && MEM_VOLATILE_P (operands[0]))" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 4) (match_dup 5))] +{ + operands[2] = simplify_gen_subreg (DFmode, operands[0], TFmode, 0); + operands[3] = simplify_gen_subreg (DFmode, operands[1], FPRX2mode, 0); + operands[4] = simplify_gen_subreg (DFmode, operands[0], TFmode, 8); + operands[5] = simplify_gen_subreg (DFmode, operands[1], FPRX2mode, 8); +} + [(set_attr "op_type" "VRR,*")]) (define_insn "*vec_ti_to_v1ti" [(set (match_operand:V1TI 0 "nonimmediate_operand" "=v,v,R, v, v,v") @@ -753,6 +764,21 @@ "vpdi\t%V0,%v1,%V0,5" [(set_attr "op_type" "VRR")]) +(define_insn_and_split "tf_to_fprx2" + [(set (match_operand:FPRX2 0 "nonimmediate_operand" "=f,f") + (subreg:FPRX2 (match_operand:TF 1 "general_operand" "v,AR") 0))] + "TARGET_VXE" + "#" + "!(MEM_P (operands[1]) && MEM_VOLATILE_P (operands[1]))" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 4) (match_dup 5))] +{ + operands[2] = simplify_gen_subreg (DFmode, operands[0], FPRX2mode, 0); + operands[3] = simplify_gen_subreg (DFmode, operands[1], TFmode, 0); + operands[4] = simplify_gen_subreg (DFmode, operands[0], FPRX2mode, 8); + operands[5] = simplify_gen_subreg (DFmode, operands[1], TFmode, 8); +}) + ; vec_perm_const for V2DI using vpdi? ;; From patchwork Thu Feb 18 12:57:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1441651 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=HLJPuMUN; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4DhF9d2nlbz9sRN for ; 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Thu, 18 Feb 2021 12:57:29 +0000 (GMT) Received: from vm.lan (unknown [9.171.64.123]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 8FBA85205A; Thu, 18 Feb 2021 12:57:28 +0000 (GMT) To: Andreas Krebbel Subject: [PATCH 2/2] IBM Z: Fix long double <-> DFP conversions Date: Thu, 18 Feb 2021 13:57:09 +0100 Message-Id: <20210218125709.16119-3-iii@linux.ibm.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210218125709.16119-1-iii@linux.ibm.com> References: <20210218125709.16119-1-iii@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761 definitions=2021-02-18_05:2021-02-18, 2021-02-18 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 lowpriorityscore=0 mlxlogscore=999 suspectscore=0 impostorscore=0 clxscore=1015 bulkscore=0 phishscore=0 spamscore=0 priorityscore=1501 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2102180108 X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Ilya Leoshkevich via Gcc-patches From: Ilya Leoshkevich Reply-To: Ilya Leoshkevich Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" When switching the s390 backend to store long doubles in vector registers, the patterns for long double <-> DFP conversions were forgotten. This did not cause observable problems so far, because libdfp calls are emitted instead of pfpo. However, when building libdfp itself, this leads to infinite recursion. gcc/ChangeLog: * config/s390/vector.md (trunctf2_vr): New pattern. (trunctf2): Likewise. (trunctdtf2_vr): Likewise. (trunctdtf2): Likewise. (extendtf2_vr): Likewise. (extendtf2): Likewise. (extendtftd2_vr): Likewise. (extendtftd2): Likewise. gcc/testsuite/ChangeLog: * gcc.target/s390/vector/long-double-from-decimal128.c: New test. * gcc.target/s390/vector/long-double-from-decimal32.c: New test. * gcc.target/s390/vector/long-double-from-decimal64.c: New test. * gcc.target/s390/vector/long-double-to-decimal128.c: New test. * gcc.target/s390/vector/long-double-to-decimal32.c: New test. * gcc.target/s390/vector/long-double-to-decimal64.c: New test. --- gcc/config/s390/vector.md | 72 +++++++++++++++++++ .../s390/vector/long-double-from-decimal128.c | 20 ++++++ .../s390/vector/long-double-from-decimal32.c | 20 ++++++ .../s390/vector/long-double-from-decimal64.c | 20 ++++++ .../s390/vector/long-double-to-decimal128.c | 19 +++++ .../s390/vector/long-double-to-decimal32.c | 19 +++++ .../s390/vector/long-double-to-decimal64.c | 19 +++++ 7 files changed, 189 insertions(+) create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal128.c create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal32.c create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal64.c create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal128.c create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal32.c create mode 100644 gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal64.c diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index e48c965db00..bc52211c55e 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -2480,6 +2480,42 @@ "HAVE_TF (trunctfsf2)" { EXPAND_TF (trunctfsf2, 2); }) +(define_expand "trunctf2_vr" + [(match_operand:DFP_ALL 0 "nonimmediate_operand" "") + (match_operand:TF 1 "nonimmediate_operand" "")] + "TARGET_HARD_DFP + && GET_MODE_SIZE (TFmode) > GET_MODE_SIZE (mode) + && TARGET_VXE" +{ + rtx fprx2 = gen_reg_rtx (FPRX2mode); + emit_insn (gen_tf_to_fprx2 (fprx2, operands[1])); + emit_insn (gen_truncfprx22 (operands[0], fprx2)); + DONE; +}) + +(define_expand "trunctf2" + [(match_operand:DFP_ALL 0 "nonimmediate_operand" "") + (match_operand:TF 1 "nonimmediate_operand" "")] + "HAVE_TF (trunctf2)" + { EXPAND_TF (trunctf2, 2); }) + +(define_expand "trunctdtf2_vr" + [(match_operand:TF 0 "nonimmediate_operand" "") + (match_operand:TD 1 "nonimmediate_operand" "")] + "TARGET_HARD_DFP && TARGET_VXE" +{ + rtx fprx2 = gen_reg_rtx (FPRX2mode); + emit_insn (gen_trunctdfprx22 (fprx2, operands[1])); + emit_insn (gen_fprx2_to_tf (operands[0], fprx2)); + DONE; +}) + +(define_expand "trunctdtf2" + [(match_operand:TF 0 "nonimmediate_operand" "") + (match_operand:TD 1 "nonimmediate_operand" "")] + "HAVE_TF (trunctdtf2)" + { EXPAND_TF (trunctdtf2, 2); }) + ; load lengthened (define_insn "extenddftf2_vr" @@ -2511,6 +2547,42 @@ "HAVE_TF (extendsftf2)" { EXPAND_TF (extendsftf2, 2); }) +(define_expand "extendtf2_vr" + [(match_operand:TF 0 "nonimmediate_operand" "") + (match_operand:DFP_ALL 1 "nonimmediate_operand" "")] + "TARGET_HARD_DFP + && GET_MODE_SIZE (mode) < GET_MODE_SIZE (TFmode) + && TARGET_VXE" +{ + rtx fprx2 = gen_reg_rtx (FPRX2mode); + emit_insn (gen_extendfprx22 (fprx2, operands[1])); + emit_insn (gen_fprx2_to_tf (operands[0], fprx2)); + DONE; +}) + +(define_expand "extendtf2" + [(match_operand:TF 0 "nonimmediate_operand" "") + (match_operand:DFP_ALL 1 "nonimmediate_operand" "")] + "HAVE_TF (extendtf2)" + { EXPAND_TF (extendtf2, 2); }) + +(define_expand "extendtftd2_vr" + [(match_operand:TD 0 "nonimmediate_operand" "") + (match_operand:TF 1 "nonimmediate_operand" "")] + "TARGET_HARD_DFP && TARGET_VXE" +{ + rtx fprx2 = gen_reg_rtx (FPRX2mode); + emit_insn (gen_tf_to_fprx2 (fprx2, operands[1])); + emit_insn (gen_extendfprx2td2 (operands[0], fprx2)); + DONE; +}) + +(define_expand "extendtftd2" + [(match_operand:TD 0 "nonimmediate_operand" "") + (match_operand:TF 1 "nonimmediate_operand" "")] + "HAVE_TF (extendtftd2)" + { EXPAND_TF (extendtftd2, 2); }) + ; test data class (define_expand "signbittf2_vr" diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal128.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal128.c new file mode 100644 index 00000000000..3cd2c68f5c6 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal128.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +/* { dg-do run { target { s390_z14_hw } } } */ +#include +#include + +__attribute__ ((noipa)) static long double +long_double_from_decimal128 (_Decimal128 x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tpfpo\n} 1 } } */ + +int +main (void) +{ + assert (long_double_from_decimal128 ((_Decimal128) 42) == 42.L); + assert (long_double_from_decimal128 ((_Decimal128) -42) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal32.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal32.c new file mode 100644 index 00000000000..84e3c4b11c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal32.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +/* { dg-do run { target { s390_z14_hw } } } */ +#include +#include + +__attribute__ ((noipa)) static long double +long_double_from_decimal32 (_Decimal32 x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tpfpo\n} 1 } } */ + +int +main (void) +{ + assert (long_double_from_decimal32 ((_Decimal32) 42) == 42.L); + assert (long_double_from_decimal32 ((_Decimal32) -42) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal64.c b/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal64.c new file mode 100644 index 00000000000..f855e4b39c8 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-from-decimal64.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +/* { dg-do run { target { s390_z14_hw } } } */ +#include +#include + +__attribute__ ((noipa)) static long double +long_double_from_decimal64 (_Decimal64 x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tpfpo\n} 1 } } */ + +int +main (void) +{ + assert (long_double_from_decimal64 ((_Decimal64) 42) == 42.L); + assert (long_double_from_decimal64 ((_Decimal64) -42) == -42.L); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal128.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal128.c new file mode 100644 index 00000000000..5f7833a66e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal128.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +/* { dg-do run { target { s390_z14_hw } } } */ +#include + +__attribute__ ((noipa)) static _Decimal128 +long_double_to_decimal128 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tpfpo\n} 1 } } */ + +int +main (void) +{ + assert (long_double_to_decimal128 (42.L) == (_Decimal128) 42.); + assert (long_double_to_decimal128 (-42.L) == (_Decimal128) -42.); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal32.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal32.c new file mode 100644 index 00000000000..f09288a5177 --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal32.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +/* { dg-do run { target { s390_z14_hw } } } */ +#include + +__attribute__ ((noipa)) static _Decimal32 +long_double_to_decimal32 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tpfpo\n} 1 } } */ + +int +main (void) +{ + assert (long_double_to_decimal32 (42.L) == (_Decimal32) 42.); + assert (long_double_to_decimal32 (-42.L) == (_Decimal32) -42.); +} diff --git a/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal64.c b/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal64.c new file mode 100644 index 00000000000..08aecfea43a --- /dev/null +++ b/gcc/testsuite/gcc.target/s390/vector/long-double-to-decimal64.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -march=z14 -mzarch --save-temps" } */ +/* { dg-do run { target { s390_z14_hw } } } */ +#include + +__attribute__ ((noipa)) static _Decimal64 +long_double_to_decimal64 (long double x) +{ + return x; +} + +/* { dg-final { scan-assembler-times {\n\tpfpo\n} 1 } } */ + +int +main (void) +{ + assert (long_double_to_decimal64 (42.L) == (_Decimal64) 42.); + assert (long_double_to_decimal64 (-42.L) == (_Decimal64) -42.); +}