From patchwork Fri Jan 12 14:22:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 859965 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJ4sC1Sqsz9s72 for ; Sat, 13 Jan 2018 01:30:07 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934047AbeALO3x (ORCPT ); Fri, 12 Jan 2018 09:29:53 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:14070 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934007AbeALOXg (ORCPT ); Fri, 12 Jan 2018 09:23:36 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="10394885" Received: from exsmtp03.microchip.com (HELO email.microchip.com) ([198.175.253.49]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 12 Jan 2018 07:23:35 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Fri, 12 Jan 2018 07:23:35 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea , Mike Dunn Subject: [PATCH v2 02/16] pwm: pxa: update documentation regarding pwm-cells Date: Fri, 12 Jan 2018 16:22:49 +0200 Message-ID: <1515766983-15151-3-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org pwm-cells should be at least 2 to provide channel number and period value. Cc: Mike Dunn Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/pwm/pxa-pwm.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pxa-pwm.txt b/Documentation/devicetree/bindings/pwm/pxa-pwm.txt index 5ae9f1e3c338..a0e20edeeebc 100644 --- a/Documentation/devicetree/bindings/pwm/pxa-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/pxa-pwm.txt @@ -10,7 +10,7 @@ Required properties: Note that one device instance must be created for each PWM that is used, so the length covers only the register window for one PWM output, not that of the entire PWM controller. Currently length is 0x10 for all supported devices. -- #pwm-cells: Should be 1. This cell is used to specify the period in +- #pwm-cells: Should be 2. This cell is used to specify the period in nanoseconds. Example PWM device node: @@ -18,13 +18,13 @@ Example PWM device node: pwm0: pwm@40b00000 { compatible = "marvell,pxa250-pwm"; reg = <0x40b00000 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; }; Example PWM client node: backlight { compatible = "pwm-backlight"; - pwms = <&pwm0 5000000>; + pwms = <&pwm0 0 5000000>; ... } From patchwork Fri Jan 12 14:22:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 859964 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJ4rT4lJgz9s72 for ; Sat, 13 Jan 2018 01:29:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933778AbeALOXo (ORCPT ); Fri, 12 Jan 2018 09:23:44 -0500 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:32360 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933687AbeALOXl (ORCPT ); Fri, 12 Jan 2018 09:23:41 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="8191787" Received: from exsmtp03.microchip.com (HELO email.microchip.com) ([198.175.253.49]) by esa5.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 12 Jan 2018 07:23:40 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Fri, 12 Jan 2018 07:23:40 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea , Brian Norris Subject: [PATCH v2 03/16] pwm: cros-ec: update documentation regarding pwm-cells Date: Fri, 12 Jan 2018 16:22:50 +0200 Message-ID: <1515766983-15151-4-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org pwm-cells should be at least 2 to provide channel number and period value. Cc: Brian Norris Signed-off-by: Claudiu Beznea Nacked-by: Brian Norris --- Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt index 472bd46ab5a4..03347fd302b5 100644 --- a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt @@ -8,7 +8,7 @@ Documentation/devicetree/bindings/mfd/cros-ec.txt). Required properties: - compatible: Must contain "google,cros-ec-pwm" -- #pwm-cells: Should be 1. The cell specifies the PWM index. +- #pwm-cells: Should be 2. The cell specifies the PWM index. Example: cros-ec@0 { @@ -18,6 +18,6 @@ Example: cros_ec_pwm: ec-pwm { compatible = "google,cros-ec-pwm"; - #pwm-cells = <1>; + #pwm-cells = <2>; }; }; From patchwork Fri Jan 12 14:22:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 859962 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJ4pP6TZGz9sNw for ; Sat, 13 Jan 2018 01:27:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934049AbeALOXr (ORCPT ); Fri, 12 Jan 2018 09:23:47 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:52612 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933687AbeALOXp (ORCPT ); Fri, 12 Jan 2018 09:23:45 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="10394888" Received: from exsmtp03.microchip.com (HELO email.microchip.com) ([198.175.253.49]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 12 Jan 2018 07:23:44 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Fri, 12 Jan 2018 07:23:44 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea , Alexander Shiyan Subject: [PATCH v2 04/16] pwm: clps711x: update documentation regarding pwm-cells Date: Fri, 12 Jan 2018 16:22:51 +0200 Message-ID: <1515766983-15151-5-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org pwm-cells should be at least 2 to provide channel number and period value. Cc: Alexander Shiyan Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt b/Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt index c0b2028238d6..57f480a872e3 100644 --- a/Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/cirrus,clps711x-pwm.txt @@ -4,12 +4,12 @@ Required properties: - compatible: Shall contain "cirrus,ep7209-pwm". - reg: Physical base address and length of the controller's registers. - clocks: phandle + clock specifier pair of the PWM reference clock. -- #pwm-cells: Should be 1. The cell specifies the index of the channel. +- #pwm-cells: Should be 2. The cell specifies the index of the channel. Example: pwm: pwm@80000400 { compatible = "cirrus,ep7312-pwm", "cirrus,ep7209-pwm"; reg = <0x80000400 0x4>; clocks = <&clks 8>; - #pwm-cells = <1>; + #pwm-cells = <2>; }; From patchwork Fri Jan 12 14:22:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 859955 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJ4n758mmz9s7g for ; Sat, 13 Jan 2018 01:26:35 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934219AbeALOYP (ORCPT ); Fri, 12 Jan 2018 09:24:15 -0500 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:26916 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933687AbeALOYL (ORCPT ); Fri, 12 Jan 2018 09:24:11 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="8191797" Received: from exsmtp03.microchip.com (HELO email.microchip.com) ([198.175.253.49]) by esa5.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 12 Jan 2018 07:24:11 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Fri, 12 Jan 2018 07:24:10 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea Subject: [PATCH v2 10/16] pwm: Add PWM modes Date: Fri, 12 Jan 2018 16:22:57 +0200 Message-ID: <1515766983-15151-11-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Define a macros for PWM modes to be used by device tree sources. Signed-off-by: Claudiu Beznea --- include/dt-bindings/pwm/pwm.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/pwm/pwm.h b/include/dt-bindings/pwm/pwm.h index ab9a077e3c7d..b8617431f8ec 100644 --- a/include/dt-bindings/pwm/pwm.h +++ b/include/dt-bindings/pwm/pwm.h @@ -12,4 +12,7 @@ #define PWM_POLARITY_INVERTED (1 << 0) +#define PWM_DTMODE_NORMAL (1 << 0) +#define PWM_DTMODE_COMPLEMENTARY (1 << 1) + #endif From patchwork Fri Jan 12 14:22:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 859945 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJ4kY4B71z9t3x for ; Sat, 13 Jan 2018 01:24:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934234AbeALOYS (ORCPT ); Fri, 12 Jan 2018 09:24:18 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:45428 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933687AbeALOYQ (ORCPT ); Fri, 12 Jan 2018 09:24:16 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="10394898" Received: from exsmtp03.microchip.com (HELO email.microchip.com) ([198.175.253.49]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 12 Jan 2018 07:24:14 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Fri, 12 Jan 2018 07:24:14 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea Subject: [PATCH v2 11/16] pwm: add documentation for PWM modes Date: Fri, 12 Jan 2018 16:22:58 +0200 Message-ID: <1515766983-15151-12-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for PWM normal and complementary modes. Signed-off-by: Claudiu Beznea --- Documentation/devicetree/bindings/pwm/pwm.txt | 17 ++++++++++++++-- Documentation/pwm.txt | 29 +++++++++++++++++++++++++-- 2 files changed, 42 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm.txt b/Documentation/devicetree/bindings/pwm/pwm.txt index 8556263b8502..fdff25bad1db 100644 --- a/Documentation/devicetree/bindings/pwm/pwm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm.txt @@ -43,8 +43,8 @@ because the name "backlight" would be used as fallback anyway. pwm-specifier typically encodes the chip-relative PWM number and the PWM period in nanoseconds. -Optionally, the pwm-specifier can encode a number of flags (defined in -) in a third cell: +Optionally, the pwm-specifier can encode: +1. a number of flags (defined in ) in a third cell: - PWM_POLARITY_INVERTED: invert the PWM signal polarity Example with optional PWM specifier for inverse polarity @@ -54,6 +54,19 @@ Example with optional PWM specifier for inverse polarity pwm-names = "backlight"; }; +2. PWM working modes (defined in ) in the 4th cell: +- PWM_MODE_NORMAL: for all PWM controllers +- PWM_MODE_COMPLEMENTARY: for PWM controllers with more than one output per +PWM channel + +Example with PWM modes: + + bl: blacklight { + pwms = <&pwm 0 5000000 PWM_POLARITY_INVERTED + PWM_DTMODE_NORMAL | PWM_DTMODE_COMPLEMENTARY>; + pwm-names = "backlight"; + }; + 2) PWM controller nodes ----------------------- diff --git a/Documentation/pwm.txt b/Documentation/pwm.txt index 8fbf0aa3ba2d..58c9bd55f021 100644 --- a/Documentation/pwm.txt +++ b/Documentation/pwm.txt @@ -61,8 +61,8 @@ In addition to the PWM state, the PWM API also exposes PWM arguments, which are the reference PWM config one should use on this PWM. PWM arguments are usually platform-specific and allows the PWM user to only care about dutycycle relatively to the full period (like, duty = 50% of the -period). struct pwm_args contains 2 fields (period and polarity) and should -be used to set the initial PWM config (usually done in the probe function +period). struct pwm_args contains 3 fields (period, polarity and mode) and +should be used to set the initial PWM config (usually done in the probe function of the PWM user). PWM arguments are retrieved with pwm_get_args(). Using PWMs with the sysfs interface @@ -83,6 +83,9 @@ will find: unexport Unexports a PWM channel from sysfs (write-only). + mode + PWM chip supported modes. + The PWM channels are numbered using a per-chip index from 0 to npwm-1. When a PWM channel is exported a pwmX directory will be created in the @@ -110,6 +113,28 @@ channel that was exported. The following properties will then be available: - 0 - disabled - 1 - enabled + mode + Set PWM channel working mode (normal and complementary). PWM chip with + complementary mode could also work in normal mode by using only one physical + output. + + Normal mode - for PWM chips with one output per PWM channel; output + waveforms looks like this: + __ __ __ __ + PWM __| |__| |__| |__| |__ + <--T--> + + Complementary mode - for PWM chips with more than one output per PWM + channel; output waveforms for a PWM controller with 2 outputs per PWM + channel looks line this: + __ __ __ __ + PWMH1 __| |__| |__| |__| |__ + __ __ __ __ __ + PWML1 |__| |__| |__| |__| + <--T--> + + Where T is the signal period. + Implementing a PWM driver ------------------------- From patchwork Fri Jan 12 14:23:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 859949 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJ4lw3g16z9t3G for ; Sat, 13 Jan 2018 01:25:32 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933880AbeALOZQ (ORCPT ); Fri, 12 Jan 2018 09:25:16 -0500 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:54444 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964848AbeALOY2 (ORCPT ); Fri, 12 Jan 2018 09:24:28 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="8191807" Received: from exsmtp03.microchip.com (HELO email.microchip.com) ([198.175.253.49]) by esa5.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 12 Jan 2018 07:24:28 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Fri, 12 Jan 2018 07:24:27 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea Subject: [PATCH v2 14/16] pwm: add push-pull mode Date: Fri, 12 Jan 2018 16:23:01 +0200 Message-ID: <1515766983-15151-15-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add macro for push-pull mode to be used in DT. Signed-off-by: Claudiu Beznea --- include/dt-bindings/pwm/pwm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/pwm/pwm.h b/include/dt-bindings/pwm/pwm.h index b8617431f8ec..c6365807c30d 100644 --- a/include/dt-bindings/pwm/pwm.h +++ b/include/dt-bindings/pwm/pwm.h @@ -14,5 +14,6 @@ #define PWM_DTMODE_NORMAL (1 << 0) #define PWM_DTMODE_COMPLEMENTARY (1 << 1) +#define PWM_DTMODE_PUSH_PULL (1 << 2) #endif From patchwork Fri Jan 12 14:23:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 859947 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJ4lN3jC6z9s7g for ; Sat, 13 Jan 2018 01:25:04 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964882AbeALOYf (ORCPT ); Fri, 12 Jan 2018 09:24:35 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:45456 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964879AbeALOYd (ORCPT ); Fri, 12 Jan 2018 09:24:33 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="10394913" Received: from exsmtp03.microchip.com (HELO email.microchip.com) ([198.175.253.49]) by esa2.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 12 Jan 2018 07:24:32 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.76.4) by chn-sv-exch03.mchp-main.com (10.10.76.49) with Microsoft SMTP Server id 14.3.352.0; Fri, 12 Jan 2018 07:24:31 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea Subject: [PATCH v2 15/16] pwm: add documentation for pwm push-pull mode Date: Fri, 12 Jan 2018 16:23:02 +0200 Message-ID: <1515766983-15151-16-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add documentation for PWM push-pull mode. Signed-off-by: Claudiu Beznea Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pwm/pwm.txt | 8 +++++++- Documentation/pwm.txt | 18 ++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/pwm.txt b/Documentation/devicetree/bindings/pwm/pwm.txt index fdff25bad1db..a4562af3577c 100644 --- a/Documentation/devicetree/bindings/pwm/pwm.txt +++ b/Documentation/devicetree/bindings/pwm/pwm.txt @@ -58,15 +58,21 @@ Example with optional PWM specifier for inverse polarity - PWM_MODE_NORMAL: for all PWM controllers - PWM_MODE_COMPLEMENTARY: for PWM controllers with more than one output per PWM channel +- PWM_MODE_PUSH_PULL: for PWM controllers with more than one output per channel, +in push-pull mode Example with PWM modes: bl: blacklight { pwms = <&pwm 0 5000000 PWM_POLARITY_INVERTED - PWM_DTMODE_NORMAL | PWM_DTMODE_COMPLEMENTARY>; + PWM_DTMODE_NORMAL | PWM_DTMODE_COMPLEMENTARY | + PWM_DTMODE_PUSH_PULL>; pwm-names = "backlight"; }; +If all the available modes are given as argument of pwms binding only the first +valid one will be considered (first valid LSB bit of mode field). + 2) PWM controller nodes ----------------------- diff --git a/Documentation/pwm.txt b/Documentation/pwm.txt index 58c9bd55f021..71b538239519 100644 --- a/Documentation/pwm.txt +++ b/Documentation/pwm.txt @@ -135,6 +135,24 @@ channel that was exported. The following properties will then be available: Where T is the signal period. + Push-pull mode - for PWM chips with mode than one output per PWM channel; + output waveform for a PWM controller with 2 outputs per PWM channel, in + push-pull mode, with normal polarity looks like this: + __ __ + PWMH __| |________| |________ + __ __ + PWML ________| |________| |__ + <--T--> + + If polarity is inversed: + __ ________ ________ + PWMH |__| |__| + ________ ________ __ + PWML |__| |__| + <--T--> + + Where T is the signal period. + Implementing a PWM driver -------------------------