From patchwork Thu Feb 11 09:08:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 1439355 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=synopsys.com header.i=@synopsys.com header.a=rsa-sha256 header.s=mail header.b=PDyX1TgB; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dbrch4L3Zz9sBy for ; Thu, 11 Feb 2021 20:17:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230177AbhBKJRB (ORCPT ); Thu, 11 Feb 2021 04:17:01 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:56618 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230047AbhBKJKs (ORCPT ); Thu, 11 Feb 2021 04:10:48 -0500 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id E0F3BC00B9; Thu, 11 Feb 2021 09:09:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1613034550; bh=o99YhhL/S+jvG0gNCkzbZ8SBLAvtmKJZIIE4yLCCWFI=; h=From:To:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=PDyX1TgBM8nxjLeiprzgsX/JtNLmt3fvpRH/NVO4qkUxPkqKRgUI2Wp2c0+46xHuN 2hTLBQBH0Zrb5v3KMUyZUl03ybbII/0ihO4/k8E9HjYNzMOFjEseXZwHkqMhOKrzUU ma6kmLoLfFb9aZEtIJKcTb2JEfwqBCOKHvLr6BZsE8vy8znodE7oceFWhkES6aeosF 6YepSY00OM74E57vg1tyfNzjxThgyTzr++os3tUq8eakO09K6Xtrn5+/UCa9MAfQdL PjZ7HReTuEkCQnzX0wn5x6L+3dGAlOOyrrB91C4vZL2YPiweyK/9YRe7GXHVl9cqTU FiFqi76X7tSPQ== Received: from de02dwia024.internal.synopsys.com (de02dwia024.internal.synopsys.com [10.225.19.81]) by mailhost.synopsys.com (Postfix) with ESMTP id 9E22AA005E; Thu, 11 Feb 2021 09:09:08 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Gustavo Pimentel To: linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Andrew Morton , Greg Kroah-Hartman , Jonathan Corbet , Bjorn Helgaas , Gustavo Pimentel Subject: [PATCH v5 1/6] misc: Add Synopsys DesignWare xData IP driver Date: Thu, 11 Feb 2021 10:08:38 +0100 Message-Id: <02835da8fc8c9293fecbe666a8db3fb79276fdde.1613034397.git.gustavo.pimentel@synopsys.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add Synopsys DesignWare xData IP driver. This driver enables/disables the PCI traffic generator module pertain to the Synopsys DesignWare prototype. Signed-off-by: Gustavo Pimentel --- drivers/misc/dw-xdata-pcie.c | 394 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 394 insertions(+) create mode 100644 drivers/misc/dw-xdata-pcie.c diff --git a/drivers/misc/dw-xdata-pcie.c b/drivers/misc/dw-xdata-pcie.c new file mode 100644 index 00000000..2e023ba --- /dev/null +++ b/drivers/misc/dw-xdata-pcie.c @@ -0,0 +1,394 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 Synopsys, Inc. and/or its affiliates. + * Synopsys DesignWare xData driver + * + * Author: Gustavo Pimentel + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DW_XDATA_DRIVER_NAME "dw-xdata-pcie" + +#define DW_XDATA_EP_MEM_OFFSET 0x8000000 + +struct dw_xdata_pcie_data { + /* xData registers location */ + enum pci_barno rg_bar; + off_t rg_off; + size_t rg_sz; +}; + +static const struct dw_xdata_pcie_data snps_edda_data = { + /* xData registers location */ + .rg_bar = BAR_0, + .rg_off = 0x00000000, /* 0 Kbytes */ + .rg_sz = 0x0000012c, /* 300 bytes */ +}; + +#define STATUS_DONE BIT(0) + +#define CONTROL_DOORBELL BIT(0) +#define CONTROL_IS_WRITE BIT(1) +#define CONTROL_LENGTH(a) FIELD_PREP(GENMASK(13, 2), a) +#define CONTROL_PATTERN_INC BIT(16) +#define CONTROL_NO_ADDR_INC BIT(18) + +#define XPERF_CONTROL_ENABLE BIT(5) + +#define BURST_REPEAT BIT(31) +#define BURST_VALUE 0x1001 + +#define PATTERN_VALUE 0x0 + +struct dw_xdata_regs { + u32 addr_lsb; /* 0x000 */ + u32 addr_msb; /* 0x004 */ + u32 burst_cnt; /* 0x008 */ + u32 control; /* 0x00c */ + u32 pattern; /* 0x010 */ + u32 status; /* 0x014 */ + u32 RAM_addr; /* 0x018 */ + u32 RAM_port; /* 0x01c */ + u32 _reserved0[14]; /* 0x020..0x054 */ + u32 perf_control; /* 0x058 */ + u32 _reserved1[41]; /* 0x05c..0x0fc */ + u32 wr_cnt_lsb; /* 0x100 */ + u32 wr_cnt_msb; /* 0x104 */ + u32 rd_cnt_lsb; /* 0x108 */ + u32 rd_cnt_msb; /* 0x10c */ +} __packed; + +struct dw_xdata_region { + phys_addr_t paddr; /* physical address */ + void __iomem *vaddr; /* virtual address */ + size_t sz; /* size */ +}; + +struct dw_xdata { + struct dw_xdata_region rg_region; /* registers */ + size_t max_wr_len; /* max wr xfer len */ + size_t max_rd_len; /* max rd xfer len */ + struct mutex mutex; + struct pci_dev *pdev; +}; + +static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw) +{ + return dw->rg_region.vaddr; +} + +static void dw_xdata_stop(struct dw_xdata *dw) +{ + u32 burst = readl(&(__dw_regs(dw)->burst_cnt)); + + if (burst & BURST_REPEAT) { + burst &= ~(u32)BURST_REPEAT; + writel(burst, &(__dw_regs(dw)->burst_cnt)); + } +} + +static void dw_xdata_start(struct dw_xdata *dw, bool write) +{ + u32 control, status; + + /* Stop first if xfer in progress */ + dw_xdata_stop(dw); + + /* Clear status register */ + writel(0x0, &(__dw_regs(dw)->status)); + + /* Burst count register set for continuous until stopped */ + writel(BURST_REPEAT | BURST_VALUE, &(__dw_regs(dw)->burst_cnt)); + + /* Pattern register */ + writel(PATTERN_VALUE, &(__dw_regs(dw)->pattern)); + + /* Control register */ + control = CONTROL_DOORBELL | CONTROL_PATTERN_INC | CONTROL_NO_ADDR_INC; + if (write) { + control |= CONTROL_IS_WRITE; + control |= CONTROL_LENGTH(dw->max_wr_len); + } else { + control |= CONTROL_LENGTH(dw->max_rd_len); + } + writel(control, &(__dw_regs(dw)->control)); + + /* + * The xData HW block needs about 100 ms to initiate the traffic + * generation according this HW block datasheet. + */ + usleep_range(100, 150); + + status = readl(&(__dw_regs(dw)->status)); + if (!(status & STATUS_DONE)) + pci_dbg(dw->pdev, "xData: started %s direction\n", + write ? "write" : "read"); +} + +static void dw_xdata_perf_meas(struct dw_xdata *dw, u64 *data, bool write) +{ + if (write) { + *data = readl(&(__dw_regs(dw)->wr_cnt_msb)); + *data <<= 32; + *data |= readl(&(__dw_regs(dw)->wr_cnt_lsb)); + } else { + *data = readl(&(__dw_regs(dw)->rd_cnt_msb)); + *data <<= 32; + *data |= readl(&(__dw_regs(dw)->rd_cnt_lsb)); + } +} + +static u64 dw_xdata_perf_diff(u64 *m1, u64 *m2, u64 time) +{ + u64 rate = (*m1 - *m2); + + rate *= (1000 * 1000 * 1000); + rate >>= 20; + rate = DIV_ROUND_CLOSEST_ULL(rate, time); + + return rate; +} + +static void dw_xdata_perf(struct dw_xdata *dw, u64 *rate, bool write) +{ + u64 data[2], time[2], diff; + + /* First acquisition of current count frames */ + writel(0x0, &(__dw_regs(dw)->perf_control)); + dw_xdata_perf_meas(dw, &data[0], write); + time[0] = jiffies; + writel((u32)XPERF_CONTROL_ENABLE, &(__dw_regs(dw)->perf_control)); + + /* + * Wait 100ms between the 1st count frame acquisition and the 2nd + * count frame acquisition, in order to calculate the speed later + */ + mdelay(100); + + /* Second acquisition of current count frames */ + writel(0x0, &(__dw_regs(dw)->perf_control)); + dw_xdata_perf_meas(dw, &data[1], write); + time[1] = jiffies; + writel((u32)XPERF_CONTROL_ENABLE, &(__dw_regs(dw)->perf_control)); + + /* + * Speed calculation + * + * rate = (2nd count frames - 1st count frames) / (time elapsed) + */ + diff = jiffies_to_nsecs(time[1] - time[0]); + *rate = dw_xdata_perf_diff(&data[1], &data[0], diff); + + pci_dbg(dw->pdev, "xData: time=%llu us, %s=%llu MB/s\n", + diff, write ? "write" : "read", *rate); +} + +static ssize_t write_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct dw_xdata *dw = pci_get_drvdata(pdev); + u64 rate; + + mutex_lock(&dw->mutex); + dw_xdata_perf(dw, &rate, true); + mutex_unlock(&dw->mutex); + + return sysfs_emit(buf, "%llu MB/s\n", rate); +} + +static ssize_t write_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct dw_xdata *dw = pci_get_drvdata(pdev); + + pci_dbg(pdev, "xData: requested write transfer\n"); + + mutex_lock(&dw->mutex); + dw_xdata_start(dw, true); + mutex_unlock(&dw->mutex); + + return size; +} + +static DEVICE_ATTR_RW(write); + +static ssize_t read_show(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct dw_xdata *dw = pci_get_drvdata(pdev); + u64 rate; + + mutex_lock(&dw->mutex); + dw_xdata_perf(dw, &rate, false); + mutex_unlock(&dw->mutex); + + return sysfs_emit(buf, "%llu MB/s\n", rate); +} + +static ssize_t read_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct dw_xdata *dw = pci_get_drvdata(pdev); + + pci_dbg(pdev, "xData: requested read transfer\n"); + + mutex_lock(&dw->mutex); + dw_xdata_start(dw, false); + mutex_unlock(&dw->mutex); + + return size; +} + +static DEVICE_ATTR_RW(read); + +static ssize_t stop_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t size) +{ + struct pci_dev *pdev = to_pci_dev(dev); + struct dw_xdata *dw = pci_get_drvdata(pdev); + + pci_dbg(pdev, "xData: requested stop any transfer\n"); + + mutex_lock(&dw->mutex); + dw_xdata_stop(dw); + mutex_unlock(&dw->mutex); + + return size; +} + +static DEVICE_ATTR_WO(stop); + +static struct attribute *default_attrs[] = { + &dev_attr_write.attr, + &dev_attr_read.attr, + &dev_attr_stop.attr, + NULL, +}; + +static const struct attribute_group xdata_attr_group = { + .attrs = default_attrs, + .name = DW_XDATA_DRIVER_NAME, +}; + +static int dw_xdata_pcie_probe(struct pci_dev *pdev, + const struct pci_device_id *pid) +{ + const struct dw_xdata_pcie_data *pdata = (void *)pid->driver_data; + struct dw_xdata *dw; + u64 addr; + int err; + + /* Enable PCI device */ + err = pcim_enable_device(pdev); + if (err) { + pci_err(pdev, "enabling device failed\n"); + return err; + } + + /* Mapping PCI BAR regions */ + err = pcim_iomap_regions(pdev, BIT(pdata->rg_bar), pci_name(pdev)); + if (err) { + pci_err(pdev, "xData BAR I/O remapping failed\n"); + return err; + } + + pci_set_master(pdev); + + /* Allocate memory */ + dw = devm_kzalloc(&pdev->dev, sizeof(*dw), GFP_KERNEL); + if (!dw) + return -ENOMEM; + + /* Data structure initialization */ + mutex_init(&dw->mutex); + + dw->rg_region.vaddr = pcim_iomap_table(pdev)[pdata->rg_bar]; + if (!dw->rg_region.vaddr) + return -ENOMEM; + + dw->rg_region.vaddr += pdata->rg_off; + dw->rg_region.paddr = pdev->resource[pdata->rg_bar].start; + dw->rg_region.paddr += pdata->rg_off; + dw->rg_region.sz = pdata->rg_sz; + + dw->max_wr_len = pcie_get_mps(pdev); + dw->max_wr_len >>= 2; + + dw->max_rd_len = pcie_get_readrq(pdev); + dw->max_rd_len >>= 2; + + dw->pdev = pdev; + + writel(0x0, &(__dw_regs(dw)->RAM_addr)); + writel(0x0, &(__dw_regs(dw)->RAM_port)); + + addr = dw->rg_region.paddr + DW_XDATA_EP_MEM_OFFSET; + writel(lower_32_bits(addr), &(__dw_regs(dw)->addr_lsb)); + writel(upper_32_bits(addr), &(__dw_regs(dw)->addr_msb)); + pci_dbg(pdev, "xData: target address = 0x%.16llx\n", addr); + + pci_dbg(pdev, "xData: wr_len=%zu, rd_len=%zu\n", + dw->max_wr_len * 4, dw->max_rd_len * 4); + + /* Saving data structure reference */ + pci_set_drvdata(pdev, dw); + + /* Sysfs */ + err = sysfs_create_group(&pdev->dev.kobj, &xdata_attr_group); + if (err) + return err; + + err = sysfs_create_link(kernel_kobj, &pdev->dev.kobj, + DW_XDATA_DRIVER_NAME); + if (err) + return err; + + return 0; +} + +static void dw_xdata_pcie_remove(struct pci_dev *pdev) +{ + struct dw_xdata *dw = pci_get_drvdata(pdev); + + if (dw) { + mutex_lock(&dw->mutex); + dw_xdata_stop(dw); + mutex_unlock(&dw->mutex); + } + + sysfs_remove_link(kernel_kobj, DW_XDATA_DRIVER_NAME); + sysfs_remove_group(&pdev->dev.kobj, &xdata_attr_group); +} + +static const struct pci_device_id dw_xdata_pcie_id_table[] = { + { PCI_DEVICE_DATA(SYNOPSYS, EDDA, &snps_edda_data) }, + { } +}; +MODULE_DEVICE_TABLE(pci, dw_xdata_pcie_id_table); + +static struct pci_driver dw_xdata_pcie_driver = { + .name = DW_XDATA_DRIVER_NAME, + .id_table = dw_xdata_pcie_id_table, + .probe = dw_xdata_pcie_probe, + .remove = dw_xdata_pcie_remove, +}; + +module_pci_driver(dw_xdata_pcie_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("Synopsys DesignWare xData PCIe driver"); +MODULE_AUTHOR("Gustavo Pimentel "); + From patchwork Thu Feb 11 09:08:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 1439353 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=synopsys.com header.i=@synopsys.com header.a=rsa-sha256 header.s=mail header.b=axmNSDqn; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dbrcg6Bfcz9sRf for ; Thu, 11 Feb 2021 20:17:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230159AbhBKJQz (ORCPT ); Thu, 11 Feb 2021 04:16:55 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:34052 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230050AbhBKJKr (ORCPT ); Thu, 11 Feb 2021 04:10:47 -0500 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 2AA23400E6; Thu, 11 Feb 2021 09:09:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1613034552; bh=jSQ7gPD0eg5i7tdOXR7I0dbZcd3MOQ43M0ZUh6bw2F0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=axmNSDqnwpI/ta3MHVe9xGArkhzKXPWzVTF749twbQszkead0wZx+CVqMWF1crcYu W6mA/sZp5QgSNTUbAYARk4HYFqxDtKs0kYHA6PO88JCeiVdfd5pjzQnMiwdolrJdwr YggBesk+SH0t2e8cvb8IjvRiWjESJKO98ca7kajTRmmk9gHyIMr/x8G8JTEM15SIfF zI6Vl5mHagX6olNWllwsaOKYNQS2h6hMA7VpuefzXlw5PCidiEzk3MQHuQdAvDRX4e uANizhu6xHVK9vFK4uWx84aPqk2yEjGuRvdoGEr/4PNUMdA3i1DtPPHMRsHBJJjQil 1MUSgzF2GIJ8Q== Received: from de02dwia024.internal.synopsys.com (de02dwia024.internal.synopsys.com [10.225.19.81]) by mailhost.synopsys.com (Postfix) with ESMTP id 7A3BFA005D; Thu, 11 Feb 2021 09:09:09 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Gustavo Pimentel To: linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Andrew Morton , Greg Kroah-Hartman , Jonathan Corbet , Bjorn Helgaas Cc: Gustavo Pimentel Subject: [PATCH v5 2/6] misc: Add Synopsys DesignWare xData IP driver to Makefile Date: Thu, 11 Feb 2021 10:08:39 +0100 Message-Id: <04060811848603958d9d3c1f2b577169c9021ce4.1613034397.git.gustavo.pimentel@synopsys.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add Synopsys DesignWare xData IP driver to Makefile. This driver enables/disables the PCIe traffic generator module pertain to the Synopsys DesignWare prototype. Signed-off-by: Gustavo Pimentel --- drivers/misc/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d23231e..bf22021 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -49,6 +49,7 @@ obj-$(CONFIG_SRAM_EXEC) += sram-exec.o obj-$(CONFIG_GENWQE) += genwqe/ obj-$(CONFIG_ECHO) += echo/ obj-$(CONFIG_CXL_BASE) += cxl/ +obj-$(CONFIG_DW_XDATA_PCIE) += dw-xdata-pcie.o obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o obj-$(CONFIG_OCXL) += ocxl/ obj-y += cardreader/ From patchwork Thu Feb 11 09:08:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 1439352 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=synopsys.com header.i=@synopsys.com header.a=rsa-sha256 header.s=mail header.b=LVzntpfs; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dbrcg2wzdz9sBy for ; Thu, 11 Feb 2021 20:17:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230155AbhBKJQx (ORCPT ); Thu, 11 Feb 2021 04:16:53 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:34040 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230049AbhBKJKr (ORCPT ); Thu, 11 Feb 2021 04:10:47 -0500 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 88B8540172; Thu, 11 Feb 2021 09:09:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1613034552; bh=e3LkhEF0r+Hvu+QsHepihtZhy6rasoZLBH/wwPPORDg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=LVzntpfsDVlvVER3vJEl0mP+vQk78IG/oSaD6889Xl4agA6bR93iVqurl8geePCzs wuZEHvrlFqTcStbP/8WxoGemEd6w0sFSy9zW0fnVJ1f9uRA97218jzsWoj8IVkVGLG vQXG8QLFb8dRc7jD4V5vcc08PWCpKSXR4pd8rngZyVctGpJoQVjGWnfl1rL160C+B4 y61Y2oh4OYUPh9aUtLml1q5k1up2jix/IXAwa7DFTIcg85ntB1BwncQLO28cqxJ31j GTAeZ3z0rDcCVTbl1SkoqL8V/kwkvZuq4IayiL4gAAry6RR2pPZyYon10s9KVoQMeO u6pGikkjYUkQw== Received: from de02dwia024.internal.synopsys.com (de02dwia024.internal.synopsys.com [10.225.19.81]) by mailhost.synopsys.com (Postfix) with ESMTP id 50D63A005C; Thu, 11 Feb 2021 09:09:10 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Gustavo Pimentel To: linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Andrew Morton , Greg Kroah-Hartman , Jonathan Corbet , Bjorn Helgaas Cc: Gustavo Pimentel Subject: [PATCH v5 3/6] misc: Add Synopsys DesignWare xData IP driver to Kconfig Date: Thu, 11 Feb 2021 10:08:40 +0100 Message-Id: <1b76d5e1a47bf3a30a863319587195037ac3e4d7.1613034397.git.gustavo.pimentel@synopsys.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add Synopsys DesignWare xData IP driver to Kconfig. This driver enables/disables the PCIe traffic generator module pertain to the Synopsys DesignWare prototype. Signed-off-by: Gustavo Pimentel --- drivers/misc/Kconfig | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index fafa8b0..41684fe 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -423,6 +423,16 @@ config SRAM config SRAM_EXEC bool +config DW_XDATA_PCIE + depends on PCI + tristate "Synopsys DesignWare xData PCIe driver" + help + This driver allows controlling Synopsys DesignWare PCIe traffic + generator IP also known as xData, present in Synopsys Designware + PCIe Endpoint prototype. + + If unsure, say N. + config PCI_ENDPOINT_TEST depends on PCI select CRC32 From patchwork Thu Feb 11 09:08:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 1439356 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=synopsys.com header.i=@synopsys.com header.a=rsa-sha256 header.s=mail header.b=c9oa8/Jo; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dbrch6zQzz9sB4 for ; Thu, 11 Feb 2021 20:17:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230182AbhBKJRJ (ORCPT ); Thu, 11 Feb 2021 04:17:09 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:56634 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230051AbhBKJKs (ORCPT ); Thu, 11 Feb 2021 04:10:48 -0500 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 8598FC00C1; Thu, 11 Feb 2021 09:09:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1613034552; bh=xjFl0ry1f4kLV7eWV2SxeXcHKekFmdWi7FGEn+fooAU=; h=From:To:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=c9oa8/JoSw7uSH9p6L4Ib+NqMZwFbIFN25ltKb0zXddqcxTf6q8lJC3R4UCZYzHx+ MMBjrnZtUEjuDl8OGGcPBU7BjTXN1EBRIymoLXpl0DJgss3OgP6AHIegvrV6Kn+Ymh PziBW+HVMDa3YYBScHub/TVmVcnCbf9BOqlnCANwbs0ffJ/crMGLxLRF0y3MdEUbRc 5MScTwJHe7uC5hpWGNloqevPohQygy87OcGgAZPtwbgUh+oJ2cFMLK4aHDYTsC59A1 e5R5+emiwh8cNylEd+4KtNVBVR+XuYV/vYujqQxgGzvX+9m/hxMWWdWKVq9eUDIzoY eTJVhvmctLqrQ== Received: from de02dwia024.internal.synopsys.com (de02dwia024.internal.synopsys.com [10.225.19.81]) by mailhost.synopsys.com (Postfix) with ESMTP id 4AB11A005F; Thu, 11 Feb 2021 09:09:11 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Gustavo Pimentel To: linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Andrew Morton , Greg Kroah-Hartman , Jonathan Corbet , Bjorn Helgaas , Gustavo Pimentel Subject: [PATCH v5 4/6] Documentation: misc-devices: Add Documentation for dw-xdata-pcie driver Date: Thu, 11 Feb 2021 10:08:41 +0100 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add Documentation for dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/misc-devices/dw-xdata-pcie.rst | 40 ++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/misc-devices/dw-xdata-pcie.rst diff --git a/Documentation/misc-devices/dw-xdata-pcie.rst b/Documentation/misc-devices/dw-xdata-pcie.rst new file mode 100644 index 00000000..3af9fad --- /dev/null +++ b/Documentation/misc-devices/dw-xdata-pcie.rst @@ -0,0 +1,40 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================================================================== +Driver for Synopsys DesignWare PCIe traffic generator (also known as xData) +=========================================================================== + +This driver should be used as a host-side (Root Complex) driver and Synopsys +DesignWare prototype that includes this IP. + +The "dw-xdata-pcie" driver can be used to enable/disable PCIe traffic +generator in either direction (mutual exclusion) besides allowing the +PCIe link performance analysis. + +The interaction with this driver is done through the module parameter and +can be changed in runtime. The driver outputs the requested command state +information to /var/log/kern.log or dmesg. + +Request write TLPs traffic generation - Root Complex to Endpoint direction +- Command: + echo 1 > /sys/kernel/dw-xdata-pcie/write + +Get write TLPs traffic link throughput +- Command: + cat /sys/kernel/dw-xdata-pcie/write +- Output example: + 204 MB/s + +Request read TLPs traffic generation - Endpoint to Root Complex direction: +- Command: + echo 1 > /sys/kernel/dw-xdata-pcie/read + +Get read TLPs traffic link throughput +- Command: + cat /sys/kernel/dw-xdata-pcie/read +- Output example: + 199 MB/s + +Request to stop any current TLP transfer: +- Command: + echo 1 > /sys/kernel/dw-xdata-pcie/stop From patchwork Thu Feb 11 09:08:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 1439351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=synopsys.com header.i=@synopsys.com header.a=rsa-sha256 header.s=mail header.b=OLtSWyt1; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dbrcd5ZBzz9sB4 for ; Thu, 11 Feb 2021 20:17:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230009AbhBKJQu (ORCPT ); Thu, 11 Feb 2021 04:16:50 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.73.133]:34068 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230052AbhBKJKr (ORCPT ); Thu, 11 Feb 2021 04:10:47 -0500 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 6EE13401D9; Thu, 11 Feb 2021 09:09:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1613034553; bh=x6qwlQ3unob1xa78MC32IMOFOlfkiuMvvCbd1vCCzC8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=OLtSWyt1IrHosK6QLJkU19M9Rrlv3ASey1ySvQ6Ao1Gi+ykbo6yH9KiSyfAbVqsQR Su0AB85Q2O+ZGfbY378P0e7wVLKWfBw+yS+wFQsfGrCuPJaJWk+TeG/ffIO/29jLD0 WcvIMIWutp8pIheVlEbh88HT1hV2X0K2a4Ihs0HIG7nY/cgsk3oIb8qBjufEayRFQs kkAz4pAU6S9mMFmZAsCAIgqr0zCbaeHAtL1hlJ9q2SmE1Fw5KUm327jQJIA4EITQro XiRQU3hfHrUYLXlN0JEDcdxdXHc9MCVHlsxNxp7e+nQcmz/pQRYvVAOcqq7U6bhuw8 qywi3nGKDjq8A== Received: from de02dwia024.internal.synopsys.com (de02dwia024.internal.synopsys.com [10.225.19.81]) by mailhost.synopsys.com (Postfix) with ESMTP id 3496AA005E; Thu, 11 Feb 2021 09:09:12 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Gustavo Pimentel To: linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Andrew Morton , Greg Kroah-Hartman , Jonathan Corbet , Bjorn Helgaas Cc: Gustavo Pimentel Subject: [PATCH v5 5/6] MAINTAINERS: Add Synopsys xData IP driver maintainer Date: Thu, 11 Feb 2021 10:08:42 +0100 Message-Id: <748e23c798df091835577037ed75fab130e3dfb8.1613034397.git.gustavo.pimentel@synopsys.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add Synopsys xData IP driver maintainer. This driver aims to support Synopsys xData IP and is normally distributed along with Synopsys PCIe EndPoint IP as a PCIe traffic generator (depends of the use and licensing agreement). Signed-off-by: Gustavo Pimentel --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 546aa66..f9d681b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5061,6 +5061,13 @@ S: Maintained F: drivers/dma/dw-edma/ F: include/linux/dma/edma.h +DESIGNWARE XDATA IP DRIVER +M: Gustavo Pimentel +L: linux-pci@vger.kernel.org +S: Maintained +F: Documentation/misc-devices/dw-xdata-pcie.rst +F: drivers/misc/dw-xdata-pcie.c + DESIGNWARE USB2 DRD IP DRIVER M: Minas Harutyunyan L: linux-usb@vger.kernel.org From patchwork Thu Feb 11 09:08:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 1439357 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=synopsys.com header.i=@synopsys.com header.a=rsa-sha256 header.s=mail header.b=HNw0YtZt; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Dbrcj2W5Mz9sRf for ; Thu, 11 Feb 2021 20:17:25 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229965AbhBKJRO (ORCPT ); Thu, 11 Feb 2021 04:17:14 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:56644 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230054AbhBKJKs (ORCPT ); Thu, 11 Feb 2021 04:10:48 -0500 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 8EF98C00C5; Thu, 11 Feb 2021 09:09:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1613034554; bh=im9YPeIOIOX6v4VKPr6LIGB+a/nLiNTjVu6zUPMNTcw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=HNw0YtZtjRjWYZ4k0IPCCoIVTYw81Nd+HXb4SdsYHkZwfs/IiA569sJZXp1uZAgft 1wdWCbLpRte5l109pvlqeZCDYCER87r/guTNqZk5NLFYOEUQN0yKoKaZsecdqqZlHB 3DQDEu4COjkAVPfHwitO+MVJssHSHRnOplaZH+oBRhF+2w0hxdmYSpG7QsKian8TZz sjbWRgPEzZ9yVd3GM5zfsxpvtG+s8tG+f7nQDwREAtZbWI6q65BfL8I+0JbM7iPItx 99HuW3T1+BsYnrzq3Jf5cgQuz0c+/mwJS+CidetTmTIUjbfw3+zF782hpg2/eg9ozS QY9NRZC6YGzrA== Received: from de02dwia024.internal.synopsys.com (de02dwia024.internal.synopsys.com [10.225.19.81]) by mailhost.synopsys.com (Postfix) with ESMTP id 549A9A005C; Thu, 11 Feb 2021 09:09:13 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Gustavo Pimentel To: linux-doc@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Derek Kiernan , Dragan Cvetic , Arnd Bergmann , Andrew Morton , Greg Kroah-Hartman , Jonathan Corbet , Bjorn Helgaas Cc: Gustavo Pimentel Subject: [PATCH v5 6/6] docs: ABI: Add sysfs documentation interface of dw-xdata-pcie driver Date: Thu, 11 Feb 2021 10:08:43 +0100 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch describes the sysfs interface implemented on the dw-xdata-pcie driver. Signed-off-by: Gustavo Pimentel --- Documentation/ABI/testing/sysfs-driver-xdata | 46 ++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-driver-xdata diff --git a/Documentation/ABI/testing/sysfs-driver-xdata b/Documentation/ABI/testing/sysfs-driver-xdata new file mode 100644 index 00000000..a7bb44b --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-xdata @@ -0,0 +1,46 @@ +What: /sys/kernel/dw-xdata-pcie/write +Date: February 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create write TLPs frames - from the Root Complex to the + Endpoint direction. + Usage e.g. + echo 1 > /sys/kernel/dw-xdata-pcie/write + + The user can read the current PCIe link throughput generated + through this generator. + Usage e.g. + cat /sys/kernel/dw-xdata-pcie/write + 204 MB/s + + The file is read and write. + +What: /sys/kernel/dw-xdata-pcie/read +Date: February 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to enable the PCIe traffic generator which + will create read TLPs frames - from the Endpoint to the Root + Complex direction. + Usage e.g. + echo 1 > /sys/kernel/dw-xdata-pcie/read + + The user can read the current PCIe link throughput generated + through this generator. + Usage e.g. + cat /sys/kernel/dw-xdata-pcie/read + 199 MB/s + + The file is read and write. + +What: /sys/kernel/dw-xdata-pcie/stop +Date: February 2021 +KernelVersion: 5.12 +Contact: Gustavo Pimentel +Description: Allows the user to disable the PCIe traffic generator in all + directions. + Usage e.g. + echo 1 > /sys/kernel/dw-xdata-pcie/stop + + The file is write only.